forked from Minki/linux
clocksource: qcom: split building of legacy vs multiplatform support
The majority of the clocksource code for the Qualcomm platform is shared between newer (multiplatform) and older platforms. However there is a bit of code that isn't, so only build it for the appropriate config. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Kumar Gala <galak@codeaurora.org>
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@ -106,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
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return readl_relaxed(source_base + TIMER_COUNT_VAL);
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}
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static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
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{
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/*
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* Shift timer count down by a constant due to unreliable lower bits
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* on some targets.
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*/
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return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
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}
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static struct clocksource msm_clocksource = {
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.name = "dg_timer",
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.rating = 300,
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@ -228,7 +219,7 @@ err:
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sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
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}
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#ifdef CONFIG_OF
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#ifdef CONFIG_ARCH_QCOM
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static void __init msm_dt_timer_init(struct device_node *np)
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{
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u32 freq;
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@ -281,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np)
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}
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CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
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CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
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#endif
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#else
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static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
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u32 sts)
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@ -301,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
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return 0;
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}
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static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
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{
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/*
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* Shift timer count down by a constant due to unreliable lower bits
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* on some targets.
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*/
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return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
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}
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void __init msm7x01_timer_init(void)
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{
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struct clocksource *cs = &msm_clocksource;
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@ -327,3 +327,4 @@ void __init qsd8x50_timer_init(void)
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return;
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msm_timer_init(19200000 / 4, 32, 7, false);
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}
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#endif
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