forked from Minki/linux
pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
Some GPIO EINT control registers needs to be preserved across suspend/resume cycle. This patch extends the driver to take care of this. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Tomasz Figa
Linus Walleij
parent
3385474c3a
commit
7ccbc60cd9
@ -196,6 +196,12 @@ static irqreturn_t exynos_eint_gpio_irq(int irq, void *data)
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return IRQ_HANDLED;
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}
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struct exynos_eint_gpio_save {
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u32 eint_con;
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u32 eint_fltcon0;
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u32 eint_fltcon1;
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};
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/*
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* exynos_eint_gpio_init() - setup handling of external gpio interrupts.
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* @d: driver data of samsung pinctrl driver.
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@ -204,8 +210,8 @@ static int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d)
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{
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struct samsung_pin_bank *bank;
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struct device *dev = d->dev;
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unsigned int ret;
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unsigned int i;
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int ret;
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int i;
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if (!d->irq) {
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dev_err(dev, "irq number not available\n");
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@ -227,11 +233,29 @@ static int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d)
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bank->nr_pins, &exynos_gpio_irqd_ops, bank);
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if (!bank->irq_domain) {
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dev_err(dev, "gpio irq domain add failed\n");
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return -ENXIO;
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ret = -ENXIO;
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goto err_domains;
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}
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bank->soc_priv = devm_kzalloc(d->dev,
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sizeof(struct exynos_eint_gpio_save), GFP_KERNEL);
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if (!bank->soc_priv) {
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irq_domain_remove(bank->irq_domain);
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ret = -ENOMEM;
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goto err_domains;
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}
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}
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return 0;
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err_domains:
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for (--i, --bank; i >= 0; --i, --bank) {
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if (bank->eint_type != EINT_TYPE_GPIO)
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continue;
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irq_domain_remove(bank->irq_domain);
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}
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return ret;
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}
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static void exynos_wkup_irq_unmask(struct irq_data *irqd)
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@ -528,6 +552,72 @@ static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
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return 0;
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}
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static void exynos_pinctrl_suspend_bank(
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struct samsung_pinctrl_drv_data *drvdata,
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struct samsung_pin_bank *bank)
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{
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struct exynos_eint_gpio_save *save = bank->soc_priv;
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void __iomem *regs = drvdata->virt_base;
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save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
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+ bank->eint_offset);
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save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
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+ 2 * bank->eint_offset);
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save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
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+ 2 * bank->eint_offset + 4);
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pr_debug("%s: save con %#010x\n", bank->name, save->eint_con);
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pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0);
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pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1);
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}
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static void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata)
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{
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struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
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struct samsung_pin_bank *bank = ctrl->pin_banks;
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int i;
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for (i = 0; i < ctrl->nr_banks; ++i, ++bank)
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if (bank->eint_type == EINT_TYPE_GPIO)
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exynos_pinctrl_suspend_bank(drvdata, bank);
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}
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static void exynos_pinctrl_resume_bank(
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struct samsung_pinctrl_drv_data *drvdata,
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struct samsung_pin_bank *bank)
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{
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struct exynos_eint_gpio_save *save = bank->soc_priv;
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void __iomem *regs = drvdata->virt_base;
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pr_debug("%s: con %#010x => %#010x\n", bank->name,
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readl(regs + EXYNOS_GPIO_ECON_OFFSET
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+ bank->eint_offset), save->eint_con);
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pr_debug("%s: fltcon0 %#010x => %#010x\n", bank->name,
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readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
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+ 2 * bank->eint_offset), save->eint_fltcon0);
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pr_debug("%s: fltcon1 %#010x => %#010x\n", bank->name,
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readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
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+ 2 * bank->eint_offset + 4), save->eint_fltcon1);
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writel(save->eint_con, regs + EXYNOS_GPIO_ECON_OFFSET
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+ bank->eint_offset);
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writel(save->eint_fltcon0, regs + EXYNOS_GPIO_EFLTCON_OFFSET
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+ 2 * bank->eint_offset);
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writel(save->eint_fltcon1, regs + EXYNOS_GPIO_EFLTCON_OFFSET
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+ 2 * bank->eint_offset + 4);
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}
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static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
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{
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struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
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struct samsung_pin_bank *bank = ctrl->pin_banks;
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int i;
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for (i = 0; i < ctrl->nr_banks; ++i, ++bank)
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if (bank->eint_type == EINT_TYPE_GPIO)
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exynos_pinctrl_resume_bank(drvdata, bank);
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}
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/* pin banks of exynos4210 pin-controller 0 */
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static struct samsung_pin_bank exynos4210_pin_banks0[] = {
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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@ -591,6 +681,8 @@ struct samsung_pin_ctrl exynos4210_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos4210-gpio-ctrl0",
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}, {
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/* pin-controller instance 1 data */
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@ -605,6 +697,8 @@ struct samsung_pin_ctrl exynos4210_pin_ctrl[] = {
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.eint_wkup_init = exynos_eint_wkup_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos4210-gpio-ctrl1",
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}, {
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/* pin-controller instance 2 data */
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@ -686,6 +780,8 @@ struct samsung_pin_ctrl exynos4x12_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos4x12-gpio-ctrl0",
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}, {
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/* pin-controller instance 1 data */
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@ -700,6 +796,8 @@ struct samsung_pin_ctrl exynos4x12_pin_ctrl[] = {
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.eint_wkup_init = exynos_eint_wkup_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos4x12-gpio-ctrl1",
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}, {
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/* pin-controller instance 2 data */
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@ -710,6 +808,8 @@ struct samsung_pin_ctrl exynos4x12_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos4x12-gpio-ctrl2",
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}, {
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/* pin-controller instance 3 data */
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@ -720,6 +820,8 @@ struct samsung_pin_ctrl exynos4x12_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos4x12-gpio-ctrl3",
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},
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};
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@ -798,6 +900,8 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = {
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.eint_wkup_init = exynos_eint_wkup_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos5250-gpio-ctrl0",
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}, {
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/* pin-controller instance 1 data */
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@ -808,6 +912,8 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos5250-gpio-ctrl1",
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}, {
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/* pin-controller instance 2 data */
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@ -818,6 +924,8 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos5250-gpio-ctrl2",
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}, {
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/* pin-controller instance 3 data */
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@ -828,6 +936,8 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = {
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.geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
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.svc = EXYNOS_SVC_OFFSET,
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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.label = "exynos5250-gpio-ctrl3",
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},
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};
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@ -19,6 +19,7 @@
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/* External GPIO and wakeup interrupt related definitions */
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#define EXYNOS_GPIO_ECON_OFFSET 0x700
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#define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
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#define EXYNOS_GPIO_EMASK_OFFSET 0x900
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#define EXYNOS_GPIO_EPEND_OFFSET 0xA00
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#define EXYNOS_WKUP_ECON_OFFSET 0xE00
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