gpio: omap: avoid clang warning
clang warns about a tentative array definition in the gpio-omap driver: drivers/gpio/gpio-omap.c:1282:34: error: tentative array definition assumed to have one element [-Werror] static const struct of_device_id omap_gpio_match[]; It's best to just reorder the entire file to avoid forward declarations, which lets us use the regular declaration. To do this, the unnecessary CONFIG_OF check must also be removed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
430c1ce304
commit
7c68571f77
@ -1251,8 +1251,195 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
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return ret;
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}
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static void omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context);
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static void omap_gpio_unidle(struct gpio_bank *bank);
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static void omap_gpio_init_context(struct gpio_bank *p)
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{
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struct omap_gpio_reg_offs *regs = p->regs;
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void __iomem *base = p->base;
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p->context.ctrl = readl_relaxed(base + regs->ctrl);
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p->context.oe = readl_relaxed(base + regs->direction);
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p->context.wake_en = readl_relaxed(base + regs->wkup_en);
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p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0);
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p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1);
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p->context.risingdetect = readl_relaxed(base + regs->risingdetect);
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p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect);
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p->context.irqenable1 = readl_relaxed(base + regs->irqenable);
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p->context.irqenable2 = readl_relaxed(base + regs->irqenable2);
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if (regs->set_dataout && p->regs->clr_dataout)
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p->context.dataout = readl_relaxed(base + regs->set_dataout);
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else
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p->context.dataout = readl_relaxed(base + regs->dataout);
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p->context_valid = true;
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}
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static void omap_gpio_restore_context(struct gpio_bank *bank)
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{
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writel_relaxed(bank->context.wake_en,
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bank->base + bank->regs->wkup_en);
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writel_relaxed(bank->context.ctrl, bank->base + bank->regs->ctrl);
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writel_relaxed(bank->context.leveldetect0,
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bank->base + bank->regs->leveldetect0);
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writel_relaxed(bank->context.leveldetect1,
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bank->base + bank->regs->leveldetect1);
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writel_relaxed(bank->context.risingdetect,
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bank->base + bank->regs->risingdetect);
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writel_relaxed(bank->context.fallingdetect,
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bank->base + bank->regs->fallingdetect);
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if (bank->regs->set_dataout && bank->regs->clr_dataout)
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writel_relaxed(bank->context.dataout,
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bank->base + bank->regs->set_dataout);
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else
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writel_relaxed(bank->context.dataout,
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bank->base + bank->regs->dataout);
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writel_relaxed(bank->context.oe, bank->base + bank->regs->direction);
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if (bank->dbck_enable_mask) {
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writel_relaxed(bank->context.debounce, bank->base +
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bank->regs->debounce);
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writel_relaxed(bank->context.debounce_en,
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bank->base + bank->regs->debounce_en);
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}
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writel_relaxed(bank->context.irqenable1,
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bank->base + bank->regs->irqenable);
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writel_relaxed(bank->context.irqenable2,
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bank->base + bank->regs->irqenable2);
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}
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static void omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context)
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{
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struct device *dev = bank->chip.parent;
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u32 l1 = 0, l2 = 0;
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if (bank->funcs.idle_enable_level_quirk)
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bank->funcs.idle_enable_level_quirk(bank);
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if (!bank->enabled_non_wakeup_gpios)
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goto update_gpio_context_count;
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if (!may_lose_context)
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goto update_gpio_context_count;
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/*
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* If going to OFF, remove triggering for all
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* non-wakeup GPIOs. Otherwise spurious IRQs will be
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* generated. See OMAP2420 Errata item 1.101.
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*/
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bank->saved_datain = readl_relaxed(bank->base +
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bank->regs->datain);
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l1 = bank->context.fallingdetect;
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l2 = bank->context.risingdetect;
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l1 &= ~bank->enabled_non_wakeup_gpios;
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l2 &= ~bank->enabled_non_wakeup_gpios;
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writel_relaxed(l1, bank->base + bank->regs->fallingdetect);
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writel_relaxed(l2, bank->base + bank->regs->risingdetect);
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bank->workaround_enabled = true;
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update_gpio_context_count:
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(dev);
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omap_gpio_dbck_disable(bank);
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}
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static void omap_gpio_unidle(struct gpio_bank *bank)
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{
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struct device *dev = bank->chip.parent;
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u32 l = 0, gen, gen0, gen1;
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int c;
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/*
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* On the first resume during the probe, the context has not
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* been initialised and so initialise it now. Also initialise
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* the context loss count.
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*/
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if (bank->loses_context && !bank->context_valid) {
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omap_gpio_init_context(bank);
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(dev);
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}
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omap_gpio_dbck_enable(bank);
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if (bank->funcs.idle_disable_level_quirk)
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bank->funcs.idle_disable_level_quirk(bank);
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if (bank->loses_context) {
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if (!bank->get_context_loss_count) {
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omap_gpio_restore_context(bank);
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} else {
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c = bank->get_context_loss_count(dev);
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if (c != bank->context_loss_count) {
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omap_gpio_restore_context(bank);
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} else {
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return;
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}
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}
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}
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if (!bank->workaround_enabled)
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return;
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l = readl_relaxed(bank->base + bank->regs->datain);
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/*
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* Check if any of the non-wakeup interrupt GPIOs have changed
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* state. If so, generate an IRQ by software. This is
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* horribly racy, but it's the best we can do to work around
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* this silicon bug.
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*/
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l ^= bank->saved_datain;
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l &= bank->enabled_non_wakeup_gpios;
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/*
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* No need to generate IRQs for the rising edge for gpio IRQs
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* configured with falling edge only; and vice versa.
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*/
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gen0 = l & bank->context.fallingdetect;
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gen0 &= bank->saved_datain;
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gen1 = l & bank->context.risingdetect;
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gen1 &= ~(bank->saved_datain);
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/* FIXME: Consider GPIO IRQs with level detections properly! */
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gen = l & (~(bank->context.fallingdetect) &
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~(bank->context.risingdetect));
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/* Consider all GPIO IRQs needed to be updated */
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gen |= gen0 | gen1;
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if (gen) {
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u32 old0, old1;
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old0 = readl_relaxed(bank->base + bank->regs->leveldetect0);
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old1 = readl_relaxed(bank->base + bank->regs->leveldetect1);
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if (!bank->regs->irqstatus_raw0) {
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writel_relaxed(old0 | gen, bank->base +
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bank->regs->leveldetect0);
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writel_relaxed(old1 | gen, bank->base +
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bank->regs->leveldetect1);
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}
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if (bank->regs->irqstatus_raw0) {
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writel_relaxed(old0 | l, bank->base +
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bank->regs->leveldetect0);
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writel_relaxed(old1 | l, bank->base +
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bank->regs->leveldetect1);
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}
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writel_relaxed(old0, bank->base + bank->regs->leveldetect0);
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writel_relaxed(old1, bank->base + bank->regs->leveldetect1);
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}
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bank->workaround_enabled = false;
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}
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static int gpio_omap_cpu_notifier(struct notifier_block *nb,
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unsigned long cmd, void *v)
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@ -1281,7 +1468,93 @@ static int gpio_omap_cpu_notifier(struct notifier_block *nb,
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return NOTIFY_OK;
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}
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static const struct of_device_id omap_gpio_match[];
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static struct omap_gpio_reg_offs omap2_gpio_regs = {
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.revision = OMAP24XX_GPIO_REVISION,
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.direction = OMAP24XX_GPIO_OE,
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.datain = OMAP24XX_GPIO_DATAIN,
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.dataout = OMAP24XX_GPIO_DATAOUT,
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.set_dataout = OMAP24XX_GPIO_SETDATAOUT,
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.clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT,
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.irqstatus = OMAP24XX_GPIO_IRQSTATUS1,
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.irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2,
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.irqenable = OMAP24XX_GPIO_IRQENABLE1,
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.irqenable2 = OMAP24XX_GPIO_IRQENABLE2,
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.set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1,
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.clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1,
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.debounce = OMAP24XX_GPIO_DEBOUNCE_VAL,
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.debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN,
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.ctrl = OMAP24XX_GPIO_CTRL,
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.wkup_en = OMAP24XX_GPIO_WAKE_EN,
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.leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
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.leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
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.risingdetect = OMAP24XX_GPIO_RISINGDETECT,
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.fallingdetect = OMAP24XX_GPIO_FALLINGDETECT,
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};
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static struct omap_gpio_reg_offs omap4_gpio_regs = {
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.revision = OMAP4_GPIO_REVISION,
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.direction = OMAP4_GPIO_OE,
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.datain = OMAP4_GPIO_DATAIN,
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.dataout = OMAP4_GPIO_DATAOUT,
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.set_dataout = OMAP4_GPIO_SETDATAOUT,
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.clr_dataout = OMAP4_GPIO_CLEARDATAOUT,
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.irqstatus = OMAP4_GPIO_IRQSTATUS0,
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.irqstatus2 = OMAP4_GPIO_IRQSTATUS1,
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.irqenable = OMAP4_GPIO_IRQSTATUSSET0,
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.irqenable2 = OMAP4_GPIO_IRQSTATUSSET1,
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.set_irqenable = OMAP4_GPIO_IRQSTATUSSET0,
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.clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0,
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.debounce = OMAP4_GPIO_DEBOUNCINGTIME,
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.debounce_en = OMAP4_GPIO_DEBOUNCENABLE,
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.ctrl = OMAP4_GPIO_CTRL,
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.wkup_en = OMAP4_GPIO_IRQWAKEN0,
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.leveldetect0 = OMAP4_GPIO_LEVELDETECT0,
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.leveldetect1 = OMAP4_GPIO_LEVELDETECT1,
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.risingdetect = OMAP4_GPIO_RISINGDETECT,
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.fallingdetect = OMAP4_GPIO_FALLINGDETECT,
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};
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/*
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* Note that omap2 does not currently support idle modes with context loss so
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* no need to add OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER quirk flag to save
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* and restore context.
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*/
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static const struct omap_gpio_platform_data omap2_pdata = {
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.regs = &omap2_gpio_regs,
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.bank_width = 32,
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.dbck_flag = false,
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};
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static const struct omap_gpio_platform_data omap3_pdata = {
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.regs = &omap2_gpio_regs,
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.bank_width = 32,
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.dbck_flag = true,
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.quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,
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};
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static const struct omap_gpio_platform_data omap4_pdata = {
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.regs = &omap4_gpio_regs,
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.bank_width = 32,
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.dbck_flag = true,
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.quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,
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};
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static const struct of_device_id omap_gpio_match[] = {
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{
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.compatible = "ti,omap4-gpio",
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.data = &omap4_pdata,
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},
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{
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.compatible = "ti,omap3-gpio",
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.data = &omap3_pdata,
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},
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{
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.compatible = "ti,omap2-gpio",
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.data = &omap2_pdata,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, omap_gpio_match);
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static int omap_gpio_probe(struct platform_device *pdev)
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{
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@ -1439,200 +1712,6 @@ static int omap_gpio_remove(struct platform_device *pdev)
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return 0;
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}
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static void omap_gpio_restore_context(struct gpio_bank *bank);
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static void omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context)
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{
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struct device *dev = bank->chip.parent;
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u32 l1 = 0, l2 = 0;
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if (bank->funcs.idle_enable_level_quirk)
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bank->funcs.idle_enable_level_quirk(bank);
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if (!bank->enabled_non_wakeup_gpios)
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goto update_gpio_context_count;
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if (!may_lose_context)
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goto update_gpio_context_count;
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/*
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* If going to OFF, remove triggering for all
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* non-wakeup GPIOs. Otherwise spurious IRQs will be
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* generated. See OMAP2420 Errata item 1.101.
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*/
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bank->saved_datain = readl_relaxed(bank->base +
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bank->regs->datain);
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l1 = bank->context.fallingdetect;
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l2 = bank->context.risingdetect;
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l1 &= ~bank->enabled_non_wakeup_gpios;
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l2 &= ~bank->enabled_non_wakeup_gpios;
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writel_relaxed(l1, bank->base + bank->regs->fallingdetect);
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writel_relaxed(l2, bank->base + bank->regs->risingdetect);
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bank->workaround_enabled = true;
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update_gpio_context_count:
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(dev);
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omap_gpio_dbck_disable(bank);
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}
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static void omap_gpio_init_context(struct gpio_bank *p);
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static void omap_gpio_unidle(struct gpio_bank *bank)
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{
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struct device *dev = bank->chip.parent;
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u32 l = 0, gen, gen0, gen1;
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int c;
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/*
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* On the first resume during the probe, the context has not
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* been initialised and so initialise it now. Also initialise
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* the context loss count.
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*/
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if (bank->loses_context && !bank->context_valid) {
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omap_gpio_init_context(bank);
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(dev);
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}
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omap_gpio_dbck_enable(bank);
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if (bank->funcs.idle_disable_level_quirk)
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bank->funcs.idle_disable_level_quirk(bank);
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if (bank->loses_context) {
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if (!bank->get_context_loss_count) {
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omap_gpio_restore_context(bank);
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} else {
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c = bank->get_context_loss_count(dev);
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if (c != bank->context_loss_count) {
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omap_gpio_restore_context(bank);
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} else {
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return;
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}
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}
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}
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if (!bank->workaround_enabled)
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return;
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l = readl_relaxed(bank->base + bank->regs->datain);
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/*
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* Check if any of the non-wakeup interrupt GPIOs have changed
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* state. If so, generate an IRQ by software. This is
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* horribly racy, but it's the best we can do to work around
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* this silicon bug.
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*/
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l ^= bank->saved_datain;
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l &= bank->enabled_non_wakeup_gpios;
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/*
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* No need to generate IRQs for the rising edge for gpio IRQs
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* configured with falling edge only; and vice versa.
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*/
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gen0 = l & bank->context.fallingdetect;
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gen0 &= bank->saved_datain;
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gen1 = l & bank->context.risingdetect;
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gen1 &= ~(bank->saved_datain);
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/* FIXME: Consider GPIO IRQs with level detections properly! */
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gen = l & (~(bank->context.fallingdetect) &
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~(bank->context.risingdetect));
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/* Consider all GPIO IRQs needed to be updated */
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gen |= gen0 | gen1;
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if (gen) {
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u32 old0, old1;
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old0 = readl_relaxed(bank->base + bank->regs->leveldetect0);
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old1 = readl_relaxed(bank->base + bank->regs->leveldetect1);
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if (!bank->regs->irqstatus_raw0) {
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writel_relaxed(old0 | gen, bank->base +
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bank->regs->leveldetect0);
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writel_relaxed(old1 | gen, bank->base +
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bank->regs->leveldetect1);
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}
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if (bank->regs->irqstatus_raw0) {
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writel_relaxed(old0 | l, bank->base +
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bank->regs->leveldetect0);
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writel_relaxed(old1 | l, bank->base +
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bank->regs->leveldetect1);
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}
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writel_relaxed(old0, bank->base + bank->regs->leveldetect0);
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writel_relaxed(old1, bank->base + bank->regs->leveldetect1);
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}
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bank->workaround_enabled = false;
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}
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static void omap_gpio_init_context(struct gpio_bank *p)
|
||||
{
|
||||
struct omap_gpio_reg_offs *regs = p->regs;
|
||||
void __iomem *base = p->base;
|
||||
|
||||
p->context.ctrl = readl_relaxed(base + regs->ctrl);
|
||||
p->context.oe = readl_relaxed(base + regs->direction);
|
||||
p->context.wake_en = readl_relaxed(base + regs->wkup_en);
|
||||
p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0);
|
||||
p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1);
|
||||
p->context.risingdetect = readl_relaxed(base + regs->risingdetect);
|
||||
p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect);
|
||||
p->context.irqenable1 = readl_relaxed(base + regs->irqenable);
|
||||
p->context.irqenable2 = readl_relaxed(base + regs->irqenable2);
|
||||
|
||||
if (regs->set_dataout && p->regs->clr_dataout)
|
||||
p->context.dataout = readl_relaxed(base + regs->set_dataout);
|
||||
else
|
||||
p->context.dataout = readl_relaxed(base + regs->dataout);
|
||||
|
||||
p->context_valid = true;
|
||||
}
|
||||
|
||||
static void omap_gpio_restore_context(struct gpio_bank *bank)
|
||||
{
|
||||
writel_relaxed(bank->context.wake_en,
|
||||
bank->base + bank->regs->wkup_en);
|
||||
writel_relaxed(bank->context.ctrl, bank->base + bank->regs->ctrl);
|
||||
writel_relaxed(bank->context.leveldetect0,
|
||||
bank->base + bank->regs->leveldetect0);
|
||||
writel_relaxed(bank->context.leveldetect1,
|
||||
bank->base + bank->regs->leveldetect1);
|
||||
writel_relaxed(bank->context.risingdetect,
|
||||
bank->base + bank->regs->risingdetect);
|
||||
writel_relaxed(bank->context.fallingdetect,
|
||||
bank->base + bank->regs->fallingdetect);
|
||||
if (bank->regs->set_dataout && bank->regs->clr_dataout)
|
||||
writel_relaxed(bank->context.dataout,
|
||||
bank->base + bank->regs->set_dataout);
|
||||
else
|
||||
writel_relaxed(bank->context.dataout,
|
||||
bank->base + bank->regs->dataout);
|
||||
writel_relaxed(bank->context.oe, bank->base + bank->regs->direction);
|
||||
|
||||
if (bank->dbck_enable_mask) {
|
||||
writel_relaxed(bank->context.debounce, bank->base +
|
||||
bank->regs->debounce);
|
||||
writel_relaxed(bank->context.debounce_en,
|
||||
bank->base + bank->regs->debounce_en);
|
||||
}
|
||||
|
||||
writel_relaxed(bank->context.irqenable1,
|
||||
bank->base + bank->regs->irqenable);
|
||||
writel_relaxed(bank->context.irqenable2,
|
||||
bank->base + bank->regs->irqenable2);
|
||||
}
|
||||
|
||||
static int __maybe_unused omap_gpio_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct gpio_bank *bank = dev_get_drvdata(dev);
|
||||
@ -1673,104 +1752,10 @@ unlock:
|
||||
return error;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
static const struct dev_pm_ops gpio_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
|
||||
NULL)
|
||||
};
|
||||
#else
|
||||
static const struct dev_pm_ops gpio_pm_ops;
|
||||
#endif /* CONFIG_ARCH_OMAP2PLUS */
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static struct omap_gpio_reg_offs omap2_gpio_regs = {
|
||||
.revision = OMAP24XX_GPIO_REVISION,
|
||||
.direction = OMAP24XX_GPIO_OE,
|
||||
.datain = OMAP24XX_GPIO_DATAIN,
|
||||
.dataout = OMAP24XX_GPIO_DATAOUT,
|
||||
.set_dataout = OMAP24XX_GPIO_SETDATAOUT,
|
||||
.clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT,
|
||||
.irqstatus = OMAP24XX_GPIO_IRQSTATUS1,
|
||||
.irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2,
|
||||
.irqenable = OMAP24XX_GPIO_IRQENABLE1,
|
||||
.irqenable2 = OMAP24XX_GPIO_IRQENABLE2,
|
||||
.set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1,
|
||||
.clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1,
|
||||
.debounce = OMAP24XX_GPIO_DEBOUNCE_VAL,
|
||||
.debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN,
|
||||
.ctrl = OMAP24XX_GPIO_CTRL,
|
||||
.wkup_en = OMAP24XX_GPIO_WAKE_EN,
|
||||
.leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
|
||||
.leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
|
||||
.risingdetect = OMAP24XX_GPIO_RISINGDETECT,
|
||||
.fallingdetect = OMAP24XX_GPIO_FALLINGDETECT,
|
||||
};
|
||||
|
||||
static struct omap_gpio_reg_offs omap4_gpio_regs = {
|
||||
.revision = OMAP4_GPIO_REVISION,
|
||||
.direction = OMAP4_GPIO_OE,
|
||||
.datain = OMAP4_GPIO_DATAIN,
|
||||
.dataout = OMAP4_GPIO_DATAOUT,
|
||||
.set_dataout = OMAP4_GPIO_SETDATAOUT,
|
||||
.clr_dataout = OMAP4_GPIO_CLEARDATAOUT,
|
||||
.irqstatus = OMAP4_GPIO_IRQSTATUS0,
|
||||
.irqstatus2 = OMAP4_GPIO_IRQSTATUS1,
|
||||
.irqenable = OMAP4_GPIO_IRQSTATUSSET0,
|
||||
.irqenable2 = OMAP4_GPIO_IRQSTATUSSET1,
|
||||
.set_irqenable = OMAP4_GPIO_IRQSTATUSSET0,
|
||||
.clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0,
|
||||
.debounce = OMAP4_GPIO_DEBOUNCINGTIME,
|
||||
.debounce_en = OMAP4_GPIO_DEBOUNCENABLE,
|
||||
.ctrl = OMAP4_GPIO_CTRL,
|
||||
.wkup_en = OMAP4_GPIO_IRQWAKEN0,
|
||||
.leveldetect0 = OMAP4_GPIO_LEVELDETECT0,
|
||||
.leveldetect1 = OMAP4_GPIO_LEVELDETECT1,
|
||||
.risingdetect = OMAP4_GPIO_RISINGDETECT,
|
||||
.fallingdetect = OMAP4_GPIO_FALLINGDETECT,
|
||||
};
|
||||
|
||||
/*
|
||||
* Note that omap2 does not currently support idle modes with context loss so
|
||||
* no need to add OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER quirk flag to save
|
||||
* and restore context.
|
||||
*/
|
||||
static const struct omap_gpio_platform_data omap2_pdata = {
|
||||
.regs = &omap2_gpio_regs,
|
||||
.bank_width = 32,
|
||||
.dbck_flag = false,
|
||||
};
|
||||
|
||||
static const struct omap_gpio_platform_data omap3_pdata = {
|
||||
.regs = &omap2_gpio_regs,
|
||||
.bank_width = 32,
|
||||
.dbck_flag = true,
|
||||
.quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,
|
||||
};
|
||||
|
||||
static const struct omap_gpio_platform_data omap4_pdata = {
|
||||
.regs = &omap4_gpio_regs,
|
||||
.bank_width = 32,
|
||||
.dbck_flag = true,
|
||||
.quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,
|
||||
};
|
||||
|
||||
static const struct of_device_id omap_gpio_match[] = {
|
||||
{
|
||||
.compatible = "ti,omap4-gpio",
|
||||
.data = &omap4_pdata,
|
||||
},
|
||||
{
|
||||
.compatible = "ti,omap3-gpio",
|
||||
.data = &omap3_pdata,
|
||||
},
|
||||
{
|
||||
.compatible = "ti,omap2-gpio",
|
||||
.data = &omap2_pdata,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, omap_gpio_match);
|
||||
#endif
|
||||
|
||||
static struct platform_driver omap_gpio_driver = {
|
||||
.probe = omap_gpio_probe,
|
||||
@ -1778,7 +1763,7 @@ static struct platform_driver omap_gpio_driver = {
|
||||
.driver = {
|
||||
.name = "omap_gpio",
|
||||
.pm = &gpio_pm_ops,
|
||||
.of_match_table = of_match_ptr(omap_gpio_match),
|
||||
.of_match_table = omap_gpio_match,
|
||||
},
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user