ACPI: DPTF: Add new PCH FIVR methods

Some additional information is required for updating PCH FIVR values
upon WiFi channel changes.

New attributes added to the existing sysfs:

fivr_switching_freq_mhz	: Get the FIVR switching control frequency.
			  Uses ACPI method GFCS.

fivr_switching_fault_status: Read the FIVR switching frequency control
			     fault status. Uses ACPI method GFFS.

ssc_clock_info : Presents SSC (spread spectrum clock) information for
		 EMI (Electro magnetic interference) control. Use ACPI
		 method GEMI (refer to the description of GEMI method
		 below).

GFFS
This ACPI method is used to read the FIVR switching frequency control
fault status.
Bits	Description
[0:0]	Fault status when set to 1
[31:1]	Reserved

GFCS
This ACPI method is used to read the FIVR switching control frequency.
Bits	Description
[11:0]	Actual Frequency = value * XTAL_FREQ / 128
[31:12]	Reserved

GEMI
This ACPI method is used to read the programmed register value for
EMI (Electro magnetic interference) control.

Bits	Description
[7:0]	Sets clock spectrum spread percentage:
	0x00=0.2% , 0x3F=10%
	1 LSB = 0.1% increase in spread (for
	settings 0x01 thru 0x1C)
	1 LSB = 0.2% increase in spread (for
	settings 0x1E thru 0x3F)
[8]	When set to 1, enables spread
	spectrum clock
[9]	0: Triangle mode. FFC frequency
	walks around the Fcenter in a linear
	fashion
	1: Random walk mode. FFC frequency
	changes randomly within the SSC
	(Spread spectrum clock) range
[10]	0: No white noise. 1: Add white noise
	to spread waveform
[11]	When 1, future writes are ignored.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Srinivas Pandruvada 2021-07-27 09:22:40 -07:00 committed by Rafael J. Wysocki
parent c500bee1c5
commit 7a6226db07
2 changed files with 49 additions and 0 deletions

View File

@ -111,3 +111,43 @@ Contact: linux-acpi@vger.kernel.org
Description:
(RW) The PCH FIVR (Fully Integrated Voltage Regulator) switching frequency in MHz,
when FIVR clock is 38.4MHz.
What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/fivr_switching_freq_mhz
Date: September, 2021
KernelVersion: v5.15
Contact: linux-acpi@vger.kernel.org
Description:
(RO) Get the FIVR switching control frequency in MHz.
What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/fivr_switching_fault_status
Date: September, 2021
KernelVersion: v5.15
Contact: linux-acpi@vger.kernel.org
Description:
(RO) Read the FIVR switching frequency control fault status.
What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/ssc_clock_info
Date: September, 2021
KernelVersion: v5.15
Contact: linux-acpi@vger.kernel.org
Description:
(RO) Presents SSC (spread spectrum clock) information for EMI
(Electro magnetic interference) control. This is a bit mask.
Bits Description
[7:0] Sets clock spectrum spread percentage:
0x00=0.2% , 0x3F=10%
1 LSB = 0.1% increase in spread (for
settings 0x01 thru 0x1C)
1 LSB = 0.2% increase in spread (for
settings 0x1E thru 0x3F)
[8] When set to 1, enables spread
spectrum clock
[9] 0: Triangle mode. FFC frequency
walks around the Fcenter in a linear
fashion
1: Random walk mode. FFC frequency
changes randomly within the SSC
(Spread spectrum clock) range
[10] 0: No white noise. 1: Add white noise
to spread waveform
[11] When 1, future writes are ignored.

View File

@ -90,15 +90,24 @@ static ssize_t name##_store(struct device *dev,\
PCH_FIVR_SHOW(freq_mhz_low_clock, GFC0)
PCH_FIVR_SHOW(freq_mhz_high_clock, GFC1)
PCH_FIVR_SHOW(ssc_clock_info, GEMI)
PCH_FIVR_SHOW(fivr_switching_freq_mhz, GFCS)
PCH_FIVR_SHOW(fivr_switching_fault_status, GFFS)
PCH_FIVR_STORE(freq_mhz_low_clock, RFC0)
PCH_FIVR_STORE(freq_mhz_high_clock, RFC1)
static DEVICE_ATTR_RW(freq_mhz_low_clock);
static DEVICE_ATTR_RW(freq_mhz_high_clock);
static DEVICE_ATTR_RO(ssc_clock_info);
static DEVICE_ATTR_RO(fivr_switching_freq_mhz);
static DEVICE_ATTR_RO(fivr_switching_fault_status);
static struct attribute *fivr_attrs[] = {
&dev_attr_freq_mhz_low_clock.attr,
&dev_attr_freq_mhz_high_clock.attr,
&dev_attr_ssc_clock_info.attr,
&dev_attr_fivr_switching_freq_mhz.attr,
&dev_attr_fivr_switching_fault_status.attr,
NULL
};