parisc: Define CONFIG_CPU_BIG_ENDIAN
While working on enabling queued rwlock on SPARC, found this following
code in include/asm-generic/qrwlock.h which uses CONFIG_CPU_BIG_ENDIAN
to clear a byte.
static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
{
return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
}
Problem is many of the fixed big endian architectures don't define
CPU_BIG_ENDIAN and clears the wrong byte.
Define CPU_BIG_ENDIAN for parisc architecture to fix it.
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
@@ -47,6 +47,9 @@ config PARISC
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and later HP3000 series). The PA-RISC Linux project home page is
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and later HP3000 series). The PA-RISC Linux project home page is
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at <http://www.parisc-linux.org/>.
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at <http://www.parisc-linux.org/>.
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config CPU_BIG_ENDIAN
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def_bool y
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config MMU
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config MMU
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def_bool y
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def_bool y
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