omap dts changes for minimal dm814x support for v4.3 merge window.
These changes make dm814x boot and adds minimal board support for dm814x-evm and hp t410. Note that to boot these depend on omap-for-v4.3/soc-signed branch, but as dm814x support is currently broken, these can be merged separately with the other dts changes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVsdAPAAoJEBvUPslcq6VzYCcP/iKG90+TAEz/r4Si5OrK+N2B lszU2Ztm8I8SMdgfnlXqkllddFBCaCeQvD0yDFQxR2cF7v85LQ94BXhrfiuWAkgf Rl8yFginoDhB8nrI/ftU9RRP3Fw8XVI6+dKXTLfm81A+4ZwCZkXJqXqZ/w7bx/cm O3NdSXn96kwZUTC/6bSOlz8T/Y4vb6SGV4Ac38SraHpjgGtlSH7MQbwvKo90ubet RjMdbmwuWMGOyYQHf1DQgZ0mBPZEVefOFV9NVLFBfbVIVCMlAN8JF6v3AWzB8U8I e5a71p0C72Xc8z6E/byEX0NJNAoQ5d6VKwoPRz5WdpHcM/1U0Ep5PKk3f0bqs5WY H2XQeB1wR9avQNyXlfrIPpZ7z8gJxJeSbaQRYTtwbBAzXK9KADgnBjejiLUIRCKT tfl+Yw6Y841KGvIyccTcW4ZhlkDdArLlTmf+4YtcOtkXKYAyiJYWQ2i98TaiRa3m 14G/wiUeNlb2VKrS2VrYd8+8aocFwJRrC4JBNheSKckmMpS64VposgTTTkIj2pYd cjafc0GZaXhi+SrmQbn4j7hRnXeMwcnHQ3qpMxsE46hap21Toe9IpniJqXRseibl ibDV6ZABHvVbnJaHgPz7Y8qJQFEZ9o5u6HgOeRgG9Byoz8e5geRHSbR6wYh+np03 Y2YRo/lloq8koKMEEEuE =TVm+ -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.3/dt-dm814x' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt omap dts changes for minimal dm814x support for v4.3 merge window. These changes make dm814x boot and adds minimal board support for dm814x-evm and hp t410. Note that to boot these depend on omap-for-v4.3/soc-signed branch, but as dm814x support is currently broken, these can be merged separately with the other dts changes. * tag 'omap-for-v4.3/dt-dm814x' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Add custom abort handler for t410 ARM: dts: Add minimal support for HP T410 ARM: dts: Add minimal dts support for dm8148-evm ARM: dts: Add minimal clocks for dm814x ARM: dts: Add minimal dm814x support Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
743ca9e9f8
@ -433,6 +433,8 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
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omap3-thunder.dtb \
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omap3-zoom3.dtb
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dtb-$(CONFIG_SOC_TI81XX) += \
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dm8148-evm.dtb \
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dm8148-t410.dtb \
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dm8168-evm.dtb
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dtb-$(CONFIG_SOC_AM33XX) += \
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am335x-baltos-ir5221.dtb \
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28
arch/arm/boot/dts/dm8148-evm.dts
Normal file
28
arch/arm/boot/dts/dm8148-evm.dts
Normal file
@ -0,0 +1,28 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "dm814x.dtsi"
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/ {
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model = "DM8148 EVM";
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compatible = "ti,dm8148-evm", "ti,dm8148";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "mii";
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "mii";
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};
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28
arch/arm/boot/dts/dm8148-t410.dts
Normal file
28
arch/arm/boot/dts/dm8148-t410.dts
Normal file
@ -0,0 +1,28 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "dm814x.dtsi"
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/ {
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model = "DM8148 EVM";
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compatible = "hp,t410", "ti,dm8148";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "mii";
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "mii";
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};
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109
arch/arm/boot/dts/dm814x-clocks.dtsi
Normal file
109
arch/arm/boot/dts/dm814x-clocks.dtsi
Normal file
@ -0,0 +1,109 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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&scm_clocks {
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tclkin_ck: tclkin_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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devosc_ck: devosc_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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/* Optional auxosc, 20 - 30 MHz range, assume 27 MHz by default */
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auxosc_ck: auxosc_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <27000000>;
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};
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mpu_ck: mpu_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <1000000000>;
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};
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sysclk4_ck: sysclk4_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <222000000>;
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};
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sysclk6_ck: sysclk6_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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};
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sysclk10_ck: sysclk10_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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};
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sysclk18_ck: sysclk18_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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cpsw_125mhz_gclk: cpsw_125mhz_gclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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};
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cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <250000000>;
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};
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};
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&pllss_clocks {
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aud_clkin0_ck: aud_clkin0_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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aud_clkin1_ck: aud_clkin1_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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aud_clkin2_ck: aud_clkin2_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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timer1_mux_ck: timer1_mux_ck {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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&aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
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ti,bit-shift = <3>;
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reg = <0x2e0>;
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};
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timer2_mux_ck: timer2_mux_ck {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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&aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
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ti,bit-shift = <6>;
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reg = <0x2e0>;
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};
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};
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333
arch/arm/boot/dts/dm814x.dtsi
Normal file
333
arch/arm/boot/dts/dm814x.dtsi
Normal file
@ -0,0 +1,333 @@
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/*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/omap.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,dm814";
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interrupt-parent = <&intc>;
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aliases {
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0>;
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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interrupts = <3>;
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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/*
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* See TRM "Table 1-317. L4LS Instance Summary", just deduct
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* 0x1000 from the 1-317 addresses to get the device address
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*/
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l4ls: l4ls@48000000 {
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compatible = "ti,dm814-l4ls", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x48000000 0x2000000>;
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i2c1: i2c@28000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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reg = <0x28000 0x1000>;
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interrupts = <70>;
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};
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elm: elm@80000 {
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compatible = "ti,814-elm";
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ti,hwmods = "elm";
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reg = <0x80000 0x2000>;
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interrupts = <4>;
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};
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gpio1: gpio@32000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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ti,gpio-always-on;
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reg = <0x32000 0x2000>;
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interrupts = <96>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@4c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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ti,gpio-always-on;
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reg = <0x4c000 0x2000>;
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interrupts = <98>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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i2c2: i2c@2a000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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reg = <0x2a000 0x1000>;
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interrupts = <71>;
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};
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mcspi1: spi@30000 {
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compatible = "ti,omap4-mcspi";
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reg = <0x30000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <65>;
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ti,spi-num-cs = <4>;
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ti,hwmods = "mcspi1";
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dmas = <&edma 16 &edma 17
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&edma 18 &edma 19>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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};
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timer1: timer@2e000 {
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compatible = "ti,dm814-timer";
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reg = <0x2e000 0x2000>;
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interrupts = <67>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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uart1: uart@20000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart1";
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reg = <0x20000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <72>;
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dmas = <&edma 26 &edma 27>;
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dma-names = "tx", "rx";
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};
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uart2: uart@22000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart2";
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reg = <0x22000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <73>;
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dmas = <&edma 28 &edma 29>;
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dma-names = "tx", "rx";
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};
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uart3: uart@24000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart3";
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reg = <0x24000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <74>;
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dmas = <&edma 30 &edma 31>;
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dma-names = "tx", "rx";
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};
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timer2: timer@40000 {
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compatible = "ti,dm814-timer";
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reg = <0x40000 0x2000>;
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interrupts = <68>;
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ti,hwmods = "timer2";
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};
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timer3: timer@42000 {
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compatible = "ti,dm814-timer";
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reg = <0x42000 0x2000>;
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interrupts = <69>;
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ti,hwmods = "timer3";
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};
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control: control@160000 {
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compatible = "ti,dm814-scm", "simple-bus";
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reg = <0x160000 0x16d000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x160000 0x16d000>;
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scm_conf: scm_conf@0 {
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compatible = "syscon";
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reg = <0x0 0x800>;
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#address-cells = <1>;
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#size-cells = <1>;
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scm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scm_clockdomains: clockdomains {
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};
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||||
};
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||||
|
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pincntl: pinmux@800 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x800 0xc38>;
|
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#address-cells = <1>;
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||||
#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x300ff>;
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};
|
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};
|
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|
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prcm: prcm@180000 {
|
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compatible = "ti,dm814-prcm", "simple-bus";
|
||||
reg = <0x180000 0x4000>;
|
||||
|
||||
prcm_clocks: clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
prcm_clockdomains: clockdomains {
|
||||
};
|
||||
};
|
||||
|
||||
pllss: pllss@1c5000 {
|
||||
compatible = "ti,dm814-pllss", "simple-bus";
|
||||
reg = <0x1c5000 0x2000>;
|
||||
|
||||
pllss_clocks: clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
pllss_clockdomains: clockdomains {
|
||||
};
|
||||
};
|
||||
|
||||
wdt1: wdt@1c7000 {
|
||||
compatible = "ti,omap3-wdt";
|
||||
ti,hwmods = "wd_timer";
|
||||
reg = <0x1c7000 0x1000>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
};
|
||||
|
||||
intc: interrupt-controller@48200000 {
|
||||
compatible = "ti,dm814-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x48200000 0x1000>;
|
||||
};
|
||||
|
||||
edma: edma@49000000 {
|
||||
compatible = "ti,edma3";
|
||||
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
|
||||
reg = <0x49000000 0x10000>,
|
||||
<0x44e10f90 0x40>;
|
||||
interrupts = <12 13 14>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
/* See TRM "Table 1-318. L4HS Instance Summary" */
|
||||
l4hs: l4hs@4a000000 {
|
||||
compatible = "ti,dm814-l4hs", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a000000 0x1b4040>;
|
||||
};
|
||||
|
||||
/* REVISIT: Move to live under l4hs once driver is fixed */
|
||||
mac: ethernet@4a100000 {
|
||||
compatible = "ti,cpsw";
|
||||
ti,hwmods = "cpgmac0";
|
||||
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
|
||||
clock-names = "fck", "cpts";
|
||||
cpdma_channels = <8>;
|
||||
ale_entries = <1024>;
|
||||
bd_ram_size = <0x2000>;
|
||||
no_bd_ram = <0>;
|
||||
rx_descs = <64>;
|
||||
mac_control = <0x20>;
|
||||
slaves = <2>;
|
||||
active_slave = <0>;
|
||||
cpts_clock_mult = <0x80000000>;
|
||||
cpts_clock_shift = <29>;
|
||||
reg = <0x4a100000 0x800
|
||||
0x4a100900 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&intc>;
|
||||
/*
|
||||
* c0_rx_thresh_pend
|
||||
* c0_rx_pend
|
||||
* c0_tx_pend
|
||||
* c0_misc_pend
|
||||
*/
|
||||
interrupts = <40 41 42 43>;
|
||||
ranges;
|
||||
syscon = <&scm_conf>;
|
||||
|
||||
davinci_mdio: mdio@4a100800 {
|
||||
compatible = "ti,davinci_mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "davinci_mdio";
|
||||
bus_freq = <1000000>;
|
||||
reg = <0x4a100800 0x100>;
|
||||
};
|
||||
|
||||
cpsw_emac0: slave@4a100200 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
cpsw_emac1: slave@4a100300 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
phy_sel: cpsw-phy-sel@0x48160650 {
|
||||
compatible = "ti,am3352-cpsw-phy-sel";
|
||||
reg= <0x48160650 0x4>;
|
||||
reg-names = "gmii-sel";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "dm814x-clocks.dtsi"
|
||||
@ -24,6 +24,9 @@
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
#include <linux/platform_data/wkup_m3.h>
|
||||
|
||||
#include <asm/siginfo.h>
|
||||
#include <asm/signal.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "common-board-devices.h"
|
||||
#include "dss-common.h"
|
||||
@ -382,6 +385,29 @@ static void __init omap3_pandora_legacy_init(void)
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
#ifdef CONFIG_SOC_TI81XX
|
||||
static int fault_fixed_up;
|
||||
|
||||
static int t410_abort_handler(unsigned long addr, unsigned int fsr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
|
||||
pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
|
||||
addr, fsr);
|
||||
fault_fixed_up = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void __init t410_abort_init(void)
|
||||
{
|
||||
hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
|
||||
"imprecise external abort");
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
static struct iommu_platform_data omap4_iommu_pdata = {
|
||||
.reset_name = "mmu_cache",
|
||||
@ -510,6 +536,9 @@ static struct pdata_init pdata_quirks[] __initdata = {
|
||||
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
|
||||
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_TI81XX
|
||||
{ "hp,t410", t410_abort_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_OMAP5
|
||||
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user