forked from Minki/linux
scsi: ufs: ufs-mediatek: gate ref-clk during Auto-Hibern8
In current UFS driver design, hba->uic_link_state will not be changed after link enters Hibern8 state by Auto-Hibern8 mechanism. In this case, reference clock gating will be skipped unless special handling is implemented in vendor's callbacks. Support reference clock gating during Auto-Hibern8 period in MediaTek Chipsets: If link state is already in Hibern8 while Auto-Hibern8 feature is enabled, gate reference clock in setup_clocks callback. Link: https://lore.kernel.org/r/20200129105251.12466-5-stanley.chu@mediatek.com Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -143,6 +143,17 @@ out:
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return 0;
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}
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static u32 ufs_mtk_link_get_state(struct ufs_hba *hba)
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{
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u32 val;
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ufshcd_writel(hba, 0x20, REG_UFS_DEBUG_SEL);
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val = ufshcd_readl(hba, REG_UFS_PROBE);
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val = val >> 28;
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return val;
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}
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/**
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* ufs_mtk_setup_clocks - enables/disable clocks
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* @hba: host controller instance
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@ -155,7 +166,7 @@ static int ufs_mtk_setup_clocks(struct ufs_hba *hba, bool on,
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enum ufs_notify_change_status status)
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{
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struct ufs_mtk_host *host = ufshcd_get_variant(hba);
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int ret = -EINVAL;
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int ret = 0;
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/*
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* In case ufs_mtk_init() is not yet done, simply ignore.
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@ -165,19 +176,24 @@ static int ufs_mtk_setup_clocks(struct ufs_hba *hba, bool on,
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if (!host)
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return 0;
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switch (status) {
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case PRE_CHANGE:
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if (!on && !ufshcd_is_link_active(hba)) {
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if (!on && status == PRE_CHANGE) {
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if (!ufshcd_is_link_active(hba)) {
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ufs_mtk_setup_ref_clk(hba, on);
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ret = phy_power_off(host->mphy);
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} else {
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/*
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* Gate ref-clk if link state is in Hibern8
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* triggered by Auto-Hibern8.
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*/
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if (!ufshcd_can_hibern8_during_gating(hba) &&
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ufshcd_is_auto_hibern8_enabled(hba) &&
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ufs_mtk_link_get_state(hba) ==
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VS_LINK_HIBERN8)
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ufs_mtk_setup_ref_clk(hba, on);
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}
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break;
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case POST_CHANGE:
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if (on) {
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ret = phy_power_on(host->mphy);
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ufs_mtk_setup_ref_clk(hba, on);
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}
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break;
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} else if (on && status == POST_CHANGE) {
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ret = phy_power_on(host->mphy);
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ufs_mtk_setup_ref_clk(hba, on);
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}
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return ret;
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@ -53,6 +53,18 @@
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#define VS_SAVEPOWERCONTROL 0xD0A6
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#define VS_UNIPROPOWERDOWNCONTROL 0xD0A8
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/*
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* Vendor specific link state
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*/
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enum {
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VS_LINK_DISABLED = 0,
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VS_LINK_DOWN = 1,
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VS_LINK_UP = 2,
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VS_LINK_HIBERN8 = 3,
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VS_LINK_LOST = 4,
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VS_LINK_CFG = 5,
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};
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/*
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* SiP commands
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*/
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