forked from Minki/linux
gpio: Add GPIO support for the Diamond Systems GPIO-MM
The Diamond Systems GPIO-MM device features 48 lines of digital I/O via the emulation of dual 82C55A PPI chips. This driver provides GPIO support for these 48 channels of digital I/O. The base port addresses for the devices may be configured via the base array module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
William Breathitt Gray
Linus Walleij
parent
0ba19cfc2a
commit
6ea5dcdf79
@ -3768,6 +3768,12 @@ F: include/linux/regulator/da9211.h
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F: include/sound/da[79]*.h
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F: sound/soc/codecs/da[79]*.[ch]
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DIAMOND SYSTEMS GPIO-MM GPIO DRIVER
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M: William Breathitt Gray <vilhelm.gray@gmail.com>
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L: linux-gpio@vger.kernel.org
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S: Maintained
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F: drivers/gpio/gpio-gpio-mm.c
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DIGI NEO AND CLASSIC PCI PRODUCTS
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M: Lidza Louina <lidza.louina@gmail.com>
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M: Mark Hounschell <markh@compro.net>
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@ -558,6 +558,19 @@ config GPIO_F7188X
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To compile this driver as a module, choose M here: the module will
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be called f7188x-gpio.
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config GPIO_GPIO_MM
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tristate "Diamond Systems GPIO-MM GPIO support"
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depends on ISA_BUS_API
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help
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Enables GPIO support for the Diamond Systems GPIO-MM and GPIO-MM-12.
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The Diamond Systems GPIO-MM device features 48 lines of digital I/O
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via the emulation of dual 82C55A PPI chips. This driver provides GPIO
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support for these 48 channels of digital I/O.
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The base port addresses for the devices may be configured via the base
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array module parameter.
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config GPIO_IT87
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tristate "IT87xx GPIO support"
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help
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@ -45,6 +45,7 @@ obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
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obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etraxfs.o
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obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o
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obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o
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obj-$(CONFIG_GPIO_GPIO_MM) += gpio-gpio-mm.o
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obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o
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obj-$(CONFIG_GPIO_ICH) += gpio-ich.o
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obj-$(CONFIG_GPIO_IOP) += gpio-iop.o
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267
drivers/gpio/gpio-gpio-mm.c
Normal file
267
drivers/gpio/gpio-gpio-mm.c
Normal file
@ -0,0 +1,267 @@
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/*
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* GPIO driver for the Diamond Systems GPIO-MM
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* Copyright (C) 2016 William Breathitt Gray
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* This driver supports the following Diamond Systems devices: GPIO-MM and
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* GPIO-MM-12.
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/gpio/driver.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/isa.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/spinlock.h>
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#define GPIOMM_EXTENT 8
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#define MAX_NUM_GPIOMM max_num_isa_dev(GPIOMM_EXTENT)
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static unsigned int base[MAX_NUM_GPIOMM];
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static unsigned int num_gpiomm;
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module_param_array(base, uint, &num_gpiomm, 0);
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MODULE_PARM_DESC(base, "Diamond Systems GPIO-MM base addresses");
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/**
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* struct gpiomm_gpio - GPIO device private data structure
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* @chip: instance of the gpio_chip
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* @io_state: bit I/O state (whether bit is set to input or output)
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* @out_state: output bits state
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* @control: Control registers state
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* @lock: synchronization lock to prevent I/O race conditions
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* @base: base port address of the GPIO device
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*/
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struct gpiomm_gpio {
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struct gpio_chip chip;
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unsigned char io_state[6];
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unsigned char out_state[6];
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unsigned char control[2];
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spinlock_t lock;
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unsigned int base;
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};
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static int gpiomm_gpio_get_direction(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
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const unsigned int port = offset / 8;
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const unsigned int mask = BIT(offset % 8);
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return !!(gpiommgpio->io_state[port] & mask);
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}
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static int gpiomm_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
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const unsigned int io_port = offset / 8;
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const unsigned int control_port = io_port / 3;
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const unsigned int control_addr = gpiommgpio->base + 3 + control_port*4;
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unsigned long flags;
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unsigned int control;
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spin_lock_irqsave(&gpiommgpio->lock, flags);
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/* Check if configuring Port C */
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if (io_port == 2 || io_port == 5) {
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/* Port C can be configured by nibble */
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if (offset % 8 > 3) {
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gpiommgpio->io_state[io_port] |= 0xF0;
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gpiommgpio->control[control_port] |= BIT(3);
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} else {
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gpiommgpio->io_state[io_port] |= 0x0F;
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gpiommgpio->control[control_port] |= BIT(0);
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}
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} else {
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gpiommgpio->io_state[io_port] |= 0xFF;
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if (io_port == 0 || io_port == 3)
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gpiommgpio->control[control_port] |= BIT(4);
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else
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gpiommgpio->control[control_port] |= BIT(1);
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}
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control = BIT(7) | gpiommgpio->control[control_port];
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outb(control, control_addr);
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spin_unlock_irqrestore(&gpiommgpio->lock, flags);
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return 0;
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}
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static int gpiomm_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset, int value)
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{
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struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
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const unsigned int io_port = offset / 8;
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const unsigned int control_port = io_port / 3;
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const unsigned int mask = BIT(offset % 8);
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const unsigned int control_addr = gpiommgpio->base + 3 + control_port*4;
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const unsigned int out_port = (io_port > 2) ? io_port + 1 : io_port;
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unsigned long flags;
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unsigned int control;
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spin_lock_irqsave(&gpiommgpio->lock, flags);
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/* Check if configuring Port C */
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if (io_port == 2 || io_port == 5) {
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/* Port C can be configured by nibble */
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if (offset % 8 > 3) {
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gpiommgpio->io_state[io_port] &= 0x0F;
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gpiommgpio->control[control_port] &= ~BIT(3);
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} else {
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gpiommgpio->io_state[io_port] &= 0xF0;
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gpiommgpio->control[control_port] &= ~BIT(0);
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}
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} else {
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gpiommgpio->io_state[io_port] &= 0x00;
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if (io_port == 0 || io_port == 3)
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gpiommgpio->control[control_port] &= ~BIT(4);
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else
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gpiommgpio->control[control_port] &= ~BIT(1);
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}
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if (value)
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gpiommgpio->out_state[io_port] |= mask;
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else
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gpiommgpio->out_state[io_port] &= ~mask;
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control = BIT(7) | gpiommgpio->control[control_port];
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outb(control, control_addr);
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outb(gpiommgpio->out_state[io_port], gpiommgpio->base + out_port);
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spin_unlock_irqrestore(&gpiommgpio->lock, flags);
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return 0;
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}
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static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
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const unsigned int port = offset / 8;
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const unsigned int mask = BIT(offset % 8);
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const unsigned int in_port = (port > 2) ? port + 1 : port;
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unsigned long flags;
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unsigned int port_state;
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spin_lock_irqsave(&gpiommgpio->lock, flags);
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/* ensure that GPIO is set for input */
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if (!(gpiommgpio->io_state[port] & mask)) {
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spin_unlock_irqrestore(&gpiommgpio->lock, flags);
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return -EINVAL;
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}
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port_state = inb(gpiommgpio->base + in_port);
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spin_unlock_irqrestore(&gpiommgpio->lock, flags);
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return !!(port_state & mask);
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}
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static void gpiomm_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
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const unsigned int port = offset / 8;
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const unsigned int mask = BIT(offset % 8);
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const unsigned int out_port = (port > 2) ? port + 1 : port;
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unsigned long flags;
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spin_lock_irqsave(&gpiommgpio->lock, flags);
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if (value)
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gpiommgpio->out_state[port] |= mask;
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else
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gpiommgpio->out_state[port] &= ~mask;
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outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port);
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spin_unlock_irqrestore(&gpiommgpio->lock, flags);
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}
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static int gpiomm_probe(struct device *dev, unsigned int id)
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{
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struct gpiomm_gpio *gpiommgpio;
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const char *const name = dev_name(dev);
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int err;
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gpiommgpio = devm_kzalloc(dev, sizeof(*gpiommgpio), GFP_KERNEL);
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if (!gpiommgpio)
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return -ENOMEM;
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if (!devm_request_region(dev, base[id], GPIOMM_EXTENT, name)) {
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dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
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base[id], base[id] + GPIOMM_EXTENT);
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return -EBUSY;
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}
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gpiommgpio->chip.label = name;
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gpiommgpio->chip.parent = dev;
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gpiommgpio->chip.owner = THIS_MODULE;
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gpiommgpio->chip.base = -1;
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gpiommgpio->chip.ngpio = 48;
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gpiommgpio->chip.get_direction = gpiomm_gpio_get_direction;
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gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input;
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gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output;
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gpiommgpio->chip.get = gpiomm_gpio_get;
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gpiommgpio->chip.set = gpiomm_gpio_set;
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gpiommgpio->base = base[id];
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spin_lock_init(&gpiommgpio->lock);
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dev_set_drvdata(dev, gpiommgpio);
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err = gpiochip_add_data(&gpiommgpio->chip, gpiommgpio);
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if (err) {
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dev_err(dev, "GPIO registering failed (%d)\n", err);
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return err;
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}
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/* initialize all GPIO as output */
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outb(0x80, base[id] + 3);
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outb(0x00, base[id]);
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outb(0x00, base[id] + 1);
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outb(0x00, base[id] + 2);
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outb(0x80, base[id] + 7);
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outb(0x00, base[id] + 4);
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outb(0x00, base[id] + 5);
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outb(0x00, base[id] + 6);
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return 0;
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}
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static int gpiomm_remove(struct device *dev, unsigned int id)
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{
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struct gpiomm_gpio *const gpiommgpio = dev_get_drvdata(dev);
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gpiochip_remove(&gpiommgpio->chip);
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return 0;
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}
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static struct isa_driver gpiomm_driver = {
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.probe = gpiomm_probe,
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.driver = {
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.name = "gpio-mm"
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},
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.remove = gpiomm_remove
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};
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module_isa_driver(gpiomm_driver, num_gpiomm);
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MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
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MODULE_DESCRIPTION("Diamond Systems GPIO-MM GPIO driver");
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MODULE_LICENSE("GPL v2");
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