arm-soc fixes for 3.9-rc2
These bug fixes are for the largest part for mvebu/kirkwood, which saw a few regressions after the clock infrastructure was enabled, and for OMAP, which showed a few more preexisting bugs with the new multiplatform support. Other small fixes are for imx, mxs, tegra, spear and socfpga. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUT8rl2CrR//JCVInAQK0CBAAu3FXixFj1LG/19BFE0pdnTXYH5IyYhvJ WMonGc4oVThNVMKAF2LpCVeWsl3fRzcvSbuH2XLWKjJF1HjprHImTmWN50BzQzpo swejfdkfXL9WPapELKui/Vupim+xiUPa1JAmAeon0p8WsJEbw2fGBOXtIwPjax6r Y5T614EYwB+a8LCn33fgFxmdmsUbnQ/XHUtWKxurOtQg+bhAv+PTiL+/ADJl05TW usplLLHejoVxfCV0RFkWztJZy2I4YPx21hkBFQAG5kyB8csa4oJn4nS5c2LQjIPj 2TFCPDncxxMTz15WuDMpttNF1IB8BBRYeuneC5UadKQrgyjgIHn5Qcl+IyrQwIA+ xtxa8cuVyw9r6iNjBiVENDNXeHX3KAj0dbSwWaMpwFKVMGd1lFy4rQaVQsTubcPr O70vvPfbhql0jZQbq0OtUQPzrz+gkFFecJNuf9dj1ILnBNER7AElDMrApDlX5qSM jpI0qaAzYEsA9wLen0Zuklod5nG8hiZOqt1pNawiZqrAmwWsIZ+DnDVzJHXfg4xB ZWR0j1l5XBT0vgggl6abFyaXxXvXztrlht0cqMC3J0ixoZYmGZI+yICx+1neScQY Ed4kCjfamdenT2YfdJI1rMTBYbvRLZ7itFUZ6L7c5DjDztJCeZyfhKATzKnW3FOQ Mq+1KC/9oT0= =yq5v -----END PGP SIGNATURE----- Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "These bug fixes are for the largest part for mvebu/kirkwood, which saw a few regressions after the clock infrastructure was enabled, and for OMAP, which showed a few more preexisting bugs with the new multiplatform support. Other small fixes are for imx, mxs, tegra, spear and socfpga" * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: spear3xx: Use correct pl080 header file Arm: socfpga: pl330: Add #dma-cells for generic dma binding support ARM: multiplatform: Sort the max gpio numbers. ARM: imx: fix typo "DEBUG_IMX50_IMX53_UART" ARM: imx: pll1_sys should be an initial on clk arm: mach-orion5x: fix typo in compatible string of a .dts file arm: mvebu: fix address-cells in mpic DT node arm: plat-orion: fix address decoding when > 4GB is used arm: mvebu: Reduce reg-io-width with UARTs ARM: Dove: add RTC device node arm: mvebu: enable the USB ports on Armada 370 Reference Design board ARM: dove: drop "select COMMON_CLK_DOVE" rtc: rtc-mv: Add support for clk to avoid lockups gpio: mvebu: Add clk support to prevent lockup ARM: kirkwood: fix to retain gbe MAC addresses for DT kernels ARM: kirkwood: of_serial: fix clock gating by removing clock-frequency ARM: mxs: cfa10049: Fix fb initialisation function ARM: SPEAr13xx: Fix typo "ARCH_HAVE_CPUFREQ" ARM: OMAP: RX-51: add missing USB phy binding clk: Tegra: Remove duplicate smp_twd clock ...
This commit is contained in:
commit
6d9431a749
@ -556,7 +556,6 @@ config ARCH_IXP4XX
|
||||
config ARCH_DOVE
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||||
bool "Marvell Dove"
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||||
select ARCH_REQUIRE_GPIOLIB
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select COMMON_CLK_DOVE
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select CPU_V7
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select GENERIC_CLOCKEVENTS
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select MIGHT_HAVE_PCI
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@ -1657,13 +1656,16 @@ config LOCAL_TIMERS
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accounting to be spread across the timer interval, preventing a
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"thundering herd" at every timer tick.
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# The GPIO number here must be sorted by descending number. In case of
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# a multiplatform kernel, we just want the highest value required by the
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# selected platforms.
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config ARCH_NR_GPIO
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int
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default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
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default 355 if ARCH_U8500
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default 264 if MACH_H4700
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default 512 if SOC_OMAP5
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default 355 if ARCH_U8500
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default 288 if ARCH_VT8500 || ARCH_SUNXI
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default 264 if MACH_H4700
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default 0
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help
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Maximum number of GPIOs in the system.
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|
@ -492,7 +492,7 @@ config DEBUG_IMX_UART_PORT
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DEBUG_IMX31_UART || \
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DEBUG_IMX35_UART || \
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DEBUG_IMX51_UART || \
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DEBUG_IMX50_IMX53_UART || \
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DEBUG_IMX53_UART || \
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DEBUG_IMX6Q_UART
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default 1
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help
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|
@ -115,4 +115,4 @@ i:
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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$(obj)/Image System.map "$(INSTALL_PATH)"
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subdir- := bootp compressed
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subdir- := bootp compressed dts
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|
@ -64,5 +64,13 @@
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status = "okay";
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/* No CD or WP GPIOs */
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};
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usb@d0050000 {
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status = "okay";
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};
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usb@d0051000 {
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status = "okay";
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};
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};
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};
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|
@ -31,7 +31,6 @@
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mpic: interrupt-controller@d0020000 {
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compatible = "marvell,mpic";
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-controller;
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};
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@ -54,7 +53,7 @@
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reg = <0xd0012000 0x100>;
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reg-shift = <2>;
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interrupts = <41>;
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reg-io-width = <4>;
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reg-io-width = <1>;
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status = "disabled";
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};
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serial@d0012100 {
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@ -62,7 +61,7 @@
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reg = <0xd0012100 0x100>;
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reg-shift = <2>;
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interrupts = <42>;
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reg-io-width = <4>;
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reg-io-width = <1>;
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status = "disabled";
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};
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|
@ -46,7 +46,7 @@
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reg = <0xd0012200 0x100>;
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reg-shift = <2>;
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interrupts = <43>;
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reg-io-width = <4>;
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reg-io-width = <1>;
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status = "disabled";
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};
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serial@d0012300 {
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@ -54,7 +54,7 @@
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reg = <0xd0012300 0x100>;
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reg-shift = <2>;
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interrupts = <44>;
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reg-io-width = <4>;
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reg-io-width = <1>;
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status = "disabled";
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};
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|
@ -105,7 +105,7 @@
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compatible = "fixed-clock";
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reg = <1>;
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#clock-cells = <0>;
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clock-frequency = <150000000>;
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clock-frequency = <250000000>;
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};
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};
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};
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|
@ -197,6 +197,11 @@
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status = "disabled";
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};
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rtc@d8500 {
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compatible = "marvell,orion-rtc";
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reg = <0xd8500 0x20>;
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};
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crypto: crypto@30000 {
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compatible = "marvell,orion-crypto";
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reg = <0x30000 0x10000>,
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|
@ -42,10 +42,9 @@
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fsl,pins = <689 0x10000 /* DISP1_DRDY */
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482 0x10000 /* DISP1_HSYNC */
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489 0x10000 /* DISP1_VSYNC */
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684 0x10000 /* DISP1_DAT_0 */
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515 0x10000 /* DISP1_DAT_22 */
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523 0x10000 /* DISP1_DAT_23 */
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543 0x10000 /* DISP1_DAT_21 */
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545 0x10000 /* DISP1_DAT_21 */
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553 0x10000 /* DISP1_DAT_20 */
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558 0x10000 /* DISP1_DAT_19 */
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564 0x10000 /* DISP1_DAT_18 */
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|
@ -42,12 +42,10 @@
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ocp@f1000000 {
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serial@12000 {
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clock-frequency = <166666667>;
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status = "okay";
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};
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|
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serial@12100 {
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clock-frequency = <166666667>;
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status = "okay";
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};
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};
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|
@ -50,7 +50,6 @@
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||||
};
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "okay";
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};
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};
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|
@ -37,7 +37,6 @@
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};
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -38,7 +38,6 @@
|
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};
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -73,7 +73,6 @@
|
||||
};
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||||
};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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||||
|
@ -51,7 +51,6 @@
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};
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "okay";
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};
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|
@ -78,7 +78,6 @@
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};
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -115,7 +115,6 @@
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -34,7 +34,6 @@
|
||||
};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -13,7 +13,6 @@
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||||
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ocp@f1000000 {
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serial@12000 {
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clock-frequency = <166666667>;
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status = "okay";
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};
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};
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|
@ -13,7 +13,6 @@
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||||
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ocp@f1000000 {
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serial@12000 {
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clock-frequency = <200000000>;
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status = "okay";
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||||
};
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||||
};
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|
@ -90,7 +90,6 @@
|
||||
};
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||||
|
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
||||
|
@ -23,7 +23,6 @@
|
||||
};
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|
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serial@12000 {
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clock-frequency = <166666667>;
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status = "okay";
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};
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|
@ -117,7 +117,6 @@
|
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -18,12 +18,10 @@
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ocp@f1000000 {
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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serial@12100 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
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|
@ -108,7 +108,6 @@
|
||||
};
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|
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serial@12000 {
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clock-frequency = <200000000>;
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status = "ok";
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};
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|
@ -38,6 +38,7 @@
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <35>, <36>, <37>, <38>;
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clocks = <&gate_clk 7>;
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};
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gpio1: gpio@10140 {
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@ -49,6 +50,7 @@
|
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <39>, <40>, <41>;
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clocks = <&gate_clk 7>;
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};
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serial@12000 {
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@ -57,7 +59,6 @@
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reg-shift = <2>;
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interrupts = <33>;
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clocks = <&gate_clk 7>;
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/* set clock-frequency in board dts */
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status = "disabled";
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};
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@ -67,7 +68,6 @@
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reg-shift = <2>;
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interrupts = <34>;
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clocks = <&gate_clk 7>;
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/* set clock-frequency in board dts */
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status = "disabled";
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};
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@ -75,6 +75,7 @@
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compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
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reg = <0x10300 0x20>;
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interrupts = <53>;
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clocks = <&gate_clk 7>;
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};
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spi@10600 {
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|
@ -11,7 +11,7 @@
|
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|
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/ {
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model = "LaCie Ethernet Disk mini V2";
|
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compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x";
|
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compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
|
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|
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memory {
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reg = <0x00000000 0x4000000>; /* 64 MB */
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|
@ -75,6 +75,9 @@
|
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compatible = "arm,pl330", "arm,primecell";
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reg = <0xffe01000 0x1000>;
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interrupts = <0 180 4>;
|
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#dma-cells = <1>;
|
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#dma-channels = <8>;
|
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#dma-requests = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -118,6 +118,7 @@
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
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reg = <0x50040600 0x20>;
|
||||
interrupts = <1 13 0x304>;
|
||||
clocks = <&tegra_car 132>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
@ -119,6 +119,7 @@
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x50040600 0x20>;
|
||||
interrupts = <1 13 0xf04>;
|
||||
clocks = <&tegra_car 214>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
@ -116,6 +116,7 @@ CONFIG_SND_SOC=y
|
||||
CONFIG_SND_MXS_SOC=y
|
||||
CONFIG_SND_SOC_MXS_SGTL5000=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
@ -126,6 +126,8 @@ CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_TWL4030_PWRBUTTON=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=32
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||
|
@ -172,7 +172,7 @@ static struct clk *clk[clk_max];
|
||||
static struct clk_onecell_data clk_data;
|
||||
|
||||
static enum mx6q_clks const clks_init_on[] __initconst = {
|
||||
mmdc_ch0_axi, rom,
|
||||
mmdc_ch0_axi, rom, pll1_sys,
|
||||
};
|
||||
|
||||
static struct clk_div_table clk_enet_ref_table[] = {
|
||||
|
@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
/*
|
||||
* The following code is located into the .data section. This is to
|
||||
* allow phys_l2x0_saved_regs to be accessed with a relative load
|
||||
* as we are running on physical address here.
|
||||
* The following code must assume it is running from physical address
|
||||
* where absolute virtual addresses to the data section have to be
|
||||
* turned into relative ones.
|
||||
*/
|
||||
.data
|
||||
.align
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
.macro pl310_resume
|
||||
ldr r2, phys_l2x0_saved_regs
|
||||
adr r0, l2x0_saved_regs_offset
|
||||
ldr r2, [r0]
|
||||
add r2, r2, r0
|
||||
ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
|
||||
ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
|
||||
str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
|
||||
@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
|
||||
str r1, [r0, #L2X0_CTRL] @ re-enable L2
|
||||
.endm
|
||||
|
||||
.globl phys_l2x0_saved_regs
|
||||
phys_l2x0_saved_regs:
|
||||
.long 0
|
||||
l2x0_saved_regs_offset:
|
||||
.word l2x0_saved_regs - .
|
||||
|
||||
#else
|
||||
.macro pl310_resume
|
||||
.endm
|
||||
|
@ -22,8 +22,6 @@
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
extern unsigned long phys_l2x0_saved_regs;
|
||||
|
||||
static int imx6q_suspend_finish(unsigned long val)
|
||||
{
|
||||
cpu_do_idle();
|
||||
@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
|
||||
|
||||
void __init imx6q_pm_init(void)
|
||||
{
|
||||
/*
|
||||
* The l2x0 core code provides an infrastucture to save and restore
|
||||
* l2x0 registers across suspend/resume cycle. But because imx6q
|
||||
* retains L2 content during suspend and needs to resume L2 before
|
||||
* MMU is enabled, it can only utilize register saving support and
|
||||
* have to take care of restoring on its own. So we save physical
|
||||
* address of the data structure used by l2x0 core to save registers,
|
||||
* and later restore the necessary ones in imx6q resume entry.
|
||||
*/
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
|
||||
#endif
|
||||
|
||||
suspend_set_ops(&imx6q_pm_ops);
|
||||
}
|
||||
|
@ -41,16 +41,12 @@ static void __init kirkwood_legacy_clk_init(void)
|
||||
|
||||
struct device_node *np = of_find_compatible_node(
|
||||
NULL, NULL, "marvell,kirkwood-gating-clock");
|
||||
|
||||
struct of_phandle_args clkspec;
|
||||
struct clk *clk;
|
||||
|
||||
clkspec.np = np;
|
||||
clkspec.args_count = 1;
|
||||
|
||||
clkspec.args[0] = CGC_BIT_GE0;
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.0",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
clkspec.args[0] = CGC_BIT_PEX0;
|
||||
orion_clkdev_add("0", "pcie",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
@ -59,9 +55,24 @@ static void __init kirkwood_legacy_clk_init(void)
|
||||
orion_clkdev_add("1", "pcie",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
clkspec.args[0] = CGC_BIT_GE1;
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.1",
|
||||
clkspec.args[0] = CGC_BIT_SDIO;
|
||||
orion_clkdev_add(NULL, "mvsdio",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
/*
|
||||
* The ethernet interfaces forget the MAC address assigned by
|
||||
* u-boot if the clocks are turned off. Until proper DT support
|
||||
* is available we always enable them for now.
|
||||
*/
|
||||
clkspec.args[0] = CGC_BIT_GE0;
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
|
||||
clk_prepare_enable(clk);
|
||||
|
||||
clkspec.args[0] = CGC_BIT_GE1;
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
|
||||
clk_prepare_enable(clk);
|
||||
}
|
||||
|
||||
static void __init kirkwood_of_clk_init(void)
|
||||
|
@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = {
|
||||
.xlate = irq_domain_xlate_onecell,
|
||||
};
|
||||
|
||||
void __init icoll_of_init(struct device_node *np,
|
||||
static void __init icoll_of_init(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
/*
|
||||
|
@ -402,17 +402,17 @@ static void __init cfa10049_init(void)
|
||||
{
|
||||
enable_clk_enet_out();
|
||||
update_fec_mac_prop(OUI_CRYSTALFONTZ);
|
||||
|
||||
mxsfb_pdata.mode_list = cfa10049_video_modes;
|
||||
mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
|
||||
mxsfb_pdata.default_bpp = 32;
|
||||
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
|
||||
}
|
||||
|
||||
static void __init cfa10037_init(void)
|
||||
{
|
||||
enable_clk_enet_out();
|
||||
update_fec_mac_prop(OUI_CRYSTALFONTZ);
|
||||
|
||||
mxsfb_pdata.mode_list = cfa10049_video_modes;
|
||||
mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
|
||||
mxsfb_pdata.default_bpp = 32;
|
||||
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
|
||||
}
|
||||
|
||||
static void __init apf28_init(void)
|
||||
|
@ -18,6 +18,7 @@
|
||||
|
||||
#include <mach/mx23.h>
|
||||
#include <mach/mx28.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
/*
|
||||
* Define the MX23 memory map.
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <asm/processor.h> /* for cpu_relax() */
|
||||
|
||||
#include <mach/mxs.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define OCOTP_WORD_OFFSET 0x20
|
||||
#define OCOTP_WORD_COUNT 0x20
|
||||
|
@ -31,6 +31,8 @@
|
||||
|
||||
#include <plat/i2c.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
|
||||
void omap7xx_map_io(void);
|
||||
#else
|
||||
|
@ -311,9 +311,6 @@ config MACH_OMAP_ZOOM2
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SERIAL_8250
|
||||
select SERIAL_8250_CONSOLE
|
||||
select SERIAL_CORE_CONSOLE
|
||||
|
||||
config MACH_OMAP_ZOOM3
|
||||
bool "OMAP3630 Zoom3 board"
|
||||
@ -321,9 +318,6 @@ config MACH_OMAP_ZOOM3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBP
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SERIAL_8250
|
||||
select SERIAL_8250_CONSOLE
|
||||
select SERIAL_CORE_CONSOLE
|
||||
|
||||
config MACH_CM_T35
|
||||
bool "CompuLab CM-T35/CM-T3730 modules"
|
||||
|
@ -102,6 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
|
||||
.init_irq = omap_intc_of_init,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap3_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.dt_compat = omap3_boards_compat,
|
||||
.restart = omap3xxx_restart,
|
||||
@ -119,6 +120,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
|
||||
.init_irq = omap_intc_of_init,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap3_init_late,
|
||||
.init_time = omap3_secure_sync32k_timer_init,
|
||||
.dt_compat = omap3_gp_boards_compat,
|
||||
.restart = omap3xxx_restart,
|
||||
|
@ -17,6 +17,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/usb/phy.h>
|
||||
#include <linux/usb/musb.h>
|
||||
#include <linux/platform_data/spi-omap2-mcspi.h>
|
||||
|
||||
@ -98,6 +99,7 @@ static void __init rx51_init(void)
|
||||
sdrc_params = nokia_get_sdram_timings();
|
||||
omap_sdrc_init(sdrc_params, sdrc_params);
|
||||
|
||||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(&musb_board_data);
|
||||
rx51_peripherals_init();
|
||||
|
||||
|
@ -108,7 +108,6 @@ void omap35xx_init_late(void);
|
||||
void omap3630_init_late(void);
|
||||
void am35xx_init_late(void);
|
||||
void ti81xx_init_late(void);
|
||||
void omap4430_init_late(void);
|
||||
int omap2_common_pm_late_init(void);
|
||||
|
||||
#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
|
||||
|
@ -1122,9 +1122,6 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
|
||||
/* TODO: remove, see function definition */
|
||||
gpmc_convert_ps_to_ns(gpmc_t);
|
||||
|
||||
/* Now the GPMC is initialised, unreserve the chip-selects */
|
||||
gpmc_cs_map = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1383,6 +1380,9 @@ static int gpmc_probe(struct platform_device *pdev)
|
||||
if (IS_ERR_VALUE(gpmc_setup_irq()))
|
||||
dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
|
||||
|
||||
/* Now the GPMC is initialised, unreserve the chip-selects */
|
||||
gpmc_cs_map = 0;
|
||||
|
||||
rc = gpmc_probe_dt(pdev);
|
||||
if (rc < 0) {
|
||||
clk_disable_unprepare(gpmc_l3_clk);
|
||||
|
@ -211,8 +211,6 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pr_err("%s: Could not find signal %s\n", __func__, muxname);
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@ -234,6 +232,8 @@ int __init omap_mux_get_by_name(const char *muxname,
|
||||
return mux_mode;
|
||||
}
|
||||
|
||||
pr_err("%s: Could not find signal %s\n", __func__, muxname);
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@ -739,8 +739,9 @@ static void __init omap_mux_dbg_create_entry(
|
||||
list_for_each_entry(e, &partition->muxmodes, node) {
|
||||
struct omap_mux *m = &e->mux;
|
||||
|
||||
(void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir,
|
||||
m, &omap_mux_dbg_signal_fops);
|
||||
(void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO,
|
||||
mux_dbg_dir, m,
|
||||
&omap_mux_dbg_signal_fops);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -14,7 +14,7 @@
|
||||
#define pr_fmt(fmt) "SPEAr3xx: " fmt
|
||||
|
||||
#include <linux/amba/pl022.h>
|
||||
#include <linux/amba/pl08x.h>
|
||||
#include <linux/amba/pl080.h>
|
||||
#include <linux/io.h>
|
||||
#include <plat/pl080.h>
|
||||
#include <mach/generic.h>
|
||||
|
@ -157,9 +157,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
|
||||
u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
|
||||
|
||||
/*
|
||||
* Chip select enabled?
|
||||
* We only take care of entries for which the chip
|
||||
* select is enabled, and that don't have high base
|
||||
* address bits set (devices can only access the first
|
||||
* 32 bits of the memory).
|
||||
*/
|
||||
if (size & 1) {
|
||||
if ((size & 1) && !(base & 0xF)) {
|
||||
struct mbus_dram_window *w;
|
||||
|
||||
w = &orion_mbus_dram_info.cs[cs++];
|
||||
|
@ -10,7 +10,7 @@ choice
|
||||
|
||||
config ARCH_SPEAR13XX
|
||||
bool "ST SPEAr13xx with Device Tree"
|
||||
select ARCH_HAVE_CPUFREQ
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select GPIO_SPEAR_SPICS
|
||||
|
@ -1292,7 +1292,6 @@ static struct tegra_clk_duplicate tegra_clk_duplicates[] = {
|
||||
TEGRA_CLK_DUPLICATE(usbd, "tegra-ehci.0", NULL),
|
||||
TEGRA_CLK_DUPLICATE(usbd, "tegra-otg", NULL),
|
||||
TEGRA_CLK_DUPLICATE(cclk, NULL, "cpu"),
|
||||
TEGRA_CLK_DUPLICATE(twd, "smp_twd", NULL),
|
||||
TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* Must be the last entry */
|
||||
};
|
||||
|
||||
|
@ -1931,7 +1931,6 @@ static struct tegra_clk_duplicate tegra_clk_duplicates[] = {
|
||||
TEGRA_CLK_DUPLICATE(cml1, "tegra_sata_cml", NULL),
|
||||
TEGRA_CLK_DUPLICATE(cml0, "tegra_pcie", "cml"),
|
||||
TEGRA_CLK_DUPLICATE(pciex, "tegra_pcie", "pciex"),
|
||||
TEGRA_CLK_DUPLICATE(twd, "smp_twd", NULL),
|
||||
TEGRA_CLK_DUPLICATE(vcp, "nvavp", "vcp"),
|
||||
TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* MUST be the last entry */
|
||||
};
|
||||
|
@ -42,6 +42,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
|
||||
/*
|
||||
@ -496,6 +497,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
|
||||
struct resource *res;
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
struct clk *clk;
|
||||
unsigned int ngpios;
|
||||
int soc_variant;
|
||||
int i, cpu, id;
|
||||
@ -529,6 +531,11 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
|
||||
return id;
|
||||
}
|
||||
|
||||
clk = devm_clk_get(&pdev->dev, NULL);
|
||||
/* Not all SoCs require a clock.*/
|
||||
if (!IS_ERR(clk))
|
||||
clk_prepare_enable(clk);
|
||||
|
||||
mvchip->soc_variant = soc_variant;
|
||||
mvchip->chip.label = dev_name(&pdev->dev);
|
||||
mvchip->chip.dev = &pdev->dev;
|
||||
|
@ -648,7 +648,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
|
||||
|
||||
/* Convert our logical CPU mask into a physical one. */
|
||||
for_each_cpu(cpu, mask)
|
||||
map |= 1 << cpu_logical_map(cpu);
|
||||
map |= gic_cpu_map[cpu];
|
||||
|
||||
/*
|
||||
* Ensure that stores to Normal memory are visible to the
|
||||
|
@ -14,6 +14,7 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/gfp.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
@ -41,6 +42,7 @@ struct rtc_plat_data {
|
||||
struct rtc_device *rtc;
|
||||
void __iomem *ioaddr;
|
||||
int irq;
|
||||
struct clk *clk;
|
||||
};
|
||||
|
||||
static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm)
|
||||
@ -221,6 +223,7 @@ static int mv_rtc_probe(struct platform_device *pdev)
|
||||
struct rtc_plat_data *pdata;
|
||||
resource_size_t size;
|
||||
u32 rtc_time;
|
||||
int ret = 0;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res)
|
||||
@ -239,11 +242,17 @@ static int mv_rtc_probe(struct platform_device *pdev)
|
||||
if (!pdata->ioaddr)
|
||||
return -ENOMEM;
|
||||
|
||||
pdata->clk = devm_clk_get(&pdev->dev, NULL);
|
||||
/* Not all SoCs require a clock.*/
|
||||
if (!IS_ERR(pdata->clk))
|
||||
clk_prepare_enable(pdata->clk);
|
||||
|
||||
/* make sure the 24 hours mode is enabled */
|
||||
rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
|
||||
if (rtc_time & RTC_HOURS_12H_MODE) {
|
||||
dev_err(&pdev->dev, "24 Hours mode not supported.\n");
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* make sure it is actually functional */
|
||||
@ -252,7 +261,8 @@ static int mv_rtc_probe(struct platform_device *pdev)
|
||||
rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
|
||||
if (rtc_time == 0x01000000) {
|
||||
dev_err(&pdev->dev, "internal RTC not ticking\n");
|
||||
return -ENODEV;
|
||||
ret = -ENODEV;
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
@ -268,8 +278,10 @@ static int mv_rtc_probe(struct platform_device *pdev)
|
||||
} else
|
||||
pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
|
||||
&mv_rtc_ops, THIS_MODULE);
|
||||
if (IS_ERR(pdata->rtc))
|
||||
return PTR_ERR(pdata->rtc);
|
||||
if (IS_ERR(pdata->rtc)) {
|
||||
ret = PTR_ERR(pdata->rtc);
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (pdata->irq >= 0) {
|
||||
writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
|
||||
@ -282,6 +294,11 @@ static int mv_rtc_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
return 0;
|
||||
out:
|
||||
if (!IS_ERR(pdata->clk))
|
||||
clk_disable_unprepare(pdata->clk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __exit mv_rtc_remove(struct platform_device *pdev)
|
||||
@ -292,6 +309,9 @@ static int __exit mv_rtc_remove(struct platform_device *pdev)
|
||||
device_init_wakeup(&pdev->dev, 0);
|
||||
|
||||
rtc_device_unregister(pdata->rtc);
|
||||
if (!IS_ERR(pdata->clk))
|
||||
clk_disable_unprepare(pdata->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -27,6 +27,7 @@
|
||||
#include <linux/lcd.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/board-ams-delta.h>
|
||||
|
||||
#include "omapfb.h"
|
||||
|
@ -24,7 +24,10 @@
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/gpio.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#include "omapfb.h"
|
||||
|
||||
static int osk_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev)
|
||||
|
Loading…
Reference in New Issue
Block a user