forked from Minki/linux
powerpc/sysdev: Add __init attribute to eligible functions
Some files functions in 'arch/powerpc/sysdev' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-6-nick.child@ibm.com
This commit is contained in:
parent
c49f5d88ff
commit
6c552983d0
@ -1133,8 +1133,8 @@ enum cpm_clk {
|
||||
CPM_CLK_DUMMY
|
||||
};
|
||||
|
||||
extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
|
||||
extern int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock);
|
||||
int __init cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
|
||||
int __init cpm2_smc_clk_setup(enum cpm_clk_target target, int clock);
|
||||
|
||||
#define CPM_PIN_INPUT 0
|
||||
#define CPM_PIN_OUTPUT 1
|
||||
@ -1143,7 +1143,7 @@ extern int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock);
|
||||
#define CPM_PIN_GPIO 4
|
||||
#define CPM_PIN_OPENDRAIN 8
|
||||
|
||||
void cpm2_set_pin(int port, int pin, int flags);
|
||||
void __init cpm2_set_pin(int port, int pin, int flags);
|
||||
|
||||
#endif /* __CPM2__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
@ -7,7 +7,7 @@
|
||||
|
||||
extern void i8259_init(struct device_node *node, unsigned long intack_addr);
|
||||
extern unsigned int i8259_irq(void);
|
||||
extern struct irq_domain *i8259_get_host(void);
|
||||
struct irq_domain *__init i8259_get_host(void);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_I8259_H */
|
||||
|
@ -65,7 +65,7 @@ enum ipic_mcp_irq {
|
||||
IPIC_MCP_MU = 7,
|
||||
};
|
||||
|
||||
extern void ipic_set_default_priority(void);
|
||||
void __init ipic_set_default_priority(void);
|
||||
extern u32 ipic_get_mcp_status(void);
|
||||
extern void ipic_clear_mcp_status(u32 mask);
|
||||
|
||||
|
@ -472,7 +472,7 @@ extern int mpic_cpu_get_priority(void);
|
||||
extern void mpic_cpu_set_priority(int prio);
|
||||
|
||||
/* Request IPIs on primary mpic */
|
||||
extern void mpic_request_ipis(void);
|
||||
void __init mpic_request_ipis(void);
|
||||
|
||||
/* Send a message (IPI) to a given target (cpu number or MSG_*) */
|
||||
void smp_mpic_message_pass(int target, int msg);
|
||||
|
@ -38,13 +38,13 @@ static inline int icp_native_init(void) { return -ENODEV; }
|
||||
|
||||
/* PAPR ICP */
|
||||
#ifdef CONFIG_PPC_ICP_HV
|
||||
extern int icp_hv_init(void);
|
||||
int __init icp_hv_init(void);
|
||||
#else
|
||||
static inline int icp_hv_init(void) { return -ENODEV; }
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_POWERNV
|
||||
extern int icp_opal_init(void);
|
||||
int __init icp_opal_init(void);
|
||||
extern void icp_opal_flush_interrupt(void);
|
||||
#else
|
||||
static inline int icp_opal_init(void) { return -ENODEV; }
|
||||
|
@ -135,7 +135,7 @@ void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src)
|
||||
}
|
||||
EXPORT_SYMBOL(__cpm2_setbrg);
|
||||
|
||||
int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
|
||||
int __init cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
|
||||
{
|
||||
int ret = 0;
|
||||
int shift;
|
||||
@ -265,7 +265,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
|
||||
return ret;
|
||||
}
|
||||
|
||||
int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
|
||||
int __init cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
|
||||
{
|
||||
int ret = 0;
|
||||
int shift;
|
||||
@ -326,7 +326,7 @@ struct cpm2_ioports {
|
||||
u32 res[3];
|
||||
};
|
||||
|
||||
void cpm2_set_pin(int port, int pin, int flags)
|
||||
void __init cpm2_set_pin(int port, int pin, int flags)
|
||||
{
|
||||
struct cpm2_ioports __iomem *iop =
|
||||
(struct cpm2_ioports __iomem *)&cpm2_immr->im_ioport;
|
||||
|
@ -226,7 +226,7 @@ static void dart_free(struct iommu_table *tbl, long index, long npages)
|
||||
dart_cache_sync(orig_dp, orig_npages);
|
||||
}
|
||||
|
||||
static void allocate_dart(void)
|
||||
static void __init allocate_dart(void)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
|
@ -58,7 +58,7 @@ static struct irq_chip fsl_mpic_err_chip = {
|
||||
.irq_unmask = fsl_mpic_unmask_err,
|
||||
};
|
||||
|
||||
int mpic_setup_error_int(struct mpic *mpic, int intvec)
|
||||
int __init mpic_setup_error_int(struct mpic *mpic, int intvec)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -121,7 +121,7 @@ static irqreturn_t fsl_error_int_handler(int irq, void *data)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
|
||||
void __init mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
|
||||
{
|
||||
unsigned int virq;
|
||||
int ret;
|
||||
|
@ -1106,7 +1106,7 @@ static const struct of_device_id pci_ids[] = {
|
||||
|
||||
struct device_node *fsl_pci_primary;
|
||||
|
||||
void fsl_pci_assign_primary(void)
|
||||
void __init fsl_pci_assign_primary(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
|
@ -120,7 +120,7 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose);
|
||||
extern struct device_node *fsl_pci_primary;
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
void fsl_pci_assign_primary(void);
|
||||
void __init fsl_pci_assign_primary(void);
|
||||
#else
|
||||
static inline void fsl_pci_assign_primary(void) {}
|
||||
#endif
|
||||
|
@ -208,7 +208,7 @@ static const struct irq_domain_ops i8259_host_ops = {
|
||||
.xlate = i8259_host_xlate,
|
||||
};
|
||||
|
||||
struct irq_domain *i8259_get_host(void)
|
||||
struct irq_domain *__init i8259_get_host(void)
|
||||
{
|
||||
return i8259_host;
|
||||
}
|
||||
|
@ -767,7 +767,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
|
||||
return ipic;
|
||||
}
|
||||
|
||||
void ipic_set_default_priority(void)
|
||||
void __init ipic_set_default_priority(void)
|
||||
{
|
||||
ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT);
|
||||
ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT);
|
||||
|
@ -1839,7 +1839,7 @@ unsigned int mpic_get_mcirq(void)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
void mpic_request_ipis(void)
|
||||
void __init mpic_request_ipis(void)
|
||||
{
|
||||
struct mpic *mpic = mpic_primary;
|
||||
int i;
|
||||
|
@ -8,8 +8,8 @@
|
||||
|
||||
#ifdef CONFIG_PCI_MSI
|
||||
extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
|
||||
extern int mpic_msi_init_allocator(struct mpic *mpic);
|
||||
extern int mpic_u3msi_init(struct mpic *mpic);
|
||||
int __init mpic_msi_init_allocator(struct mpic *mpic);
|
||||
int __init mpic_u3msi_init(struct mpic *mpic);
|
||||
#else
|
||||
static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
|
||||
irq_hw_number_t hwirq)
|
||||
@ -37,8 +37,8 @@ extern void mpic_reset_core(int cpu);
|
||||
|
||||
#ifdef CONFIG_FSL_SOC
|
||||
extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);
|
||||
extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
|
||||
extern int mpic_setup_error_int(struct mpic *mpic, int intvec);
|
||||
void __init mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
|
||||
int __init mpic_setup_error_int(struct mpic *mpic, int intvec);
|
||||
#else
|
||||
static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)
|
||||
{
|
||||
|
@ -24,7 +24,7 @@ void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MPIC_U3_HT_IRQS
|
||||
static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
|
||||
static int __init mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
|
||||
{
|
||||
irq_hw_number_t hwirq;
|
||||
const struct irq_domain_ops *ops = mpic->irqhost->ops;
|
||||
@ -68,13 +68,13 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
|
||||
static int __init mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
#endif
|
||||
|
||||
int mpic_msi_init_allocator(struct mpic *mpic)
|
||||
int __init mpic_msi_init_allocator(struct mpic *mpic)
|
||||
{
|
||||
int rc;
|
||||
|
||||
|
@ -384,7 +384,7 @@ struct mpic_timer *mpic_request_timer(irq_handler_t fn, void *dev,
|
||||
}
|
||||
EXPORT_SYMBOL(mpic_request_timer);
|
||||
|
||||
static int timer_group_get_freq(struct device_node *np,
|
||||
static int __init timer_group_get_freq(struct device_node *np,
|
||||
struct timer_group_priv *priv)
|
||||
{
|
||||
u32 div;
|
||||
@ -411,7 +411,7 @@ static int timer_group_get_freq(struct device_node *np,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int timer_group_get_irq(struct device_node *np,
|
||||
static int __init timer_group_get_irq(struct device_node *np,
|
||||
struct timer_group_priv *priv)
|
||||
{
|
||||
const u32 all_timer[] = { 0, TIMERS_PER_GROUP };
|
||||
@ -459,7 +459,7 @@ static int timer_group_get_irq(struct device_node *np,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void timer_group_init(struct device_node *np)
|
||||
static void __init timer_group_init(struct device_node *np)
|
||||
{
|
||||
struct timer_group_priv *priv;
|
||||
unsigned int i = 0;
|
||||
|
@ -174,7 +174,7 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mpic_u3msi_init(struct mpic *mpic)
|
||||
int __init mpic_u3msi_init(struct mpic *mpic)
|
||||
{
|
||||
int rc;
|
||||
struct pci_controller *phb;
|
||||
|
@ -257,7 +257,7 @@ static void tsi108_pci_int_unmask(u_int irq)
|
||||
mb();
|
||||
}
|
||||
|
||||
static void init_pci_source(void)
|
||||
static void __init init_pci_source(void)
|
||||
{
|
||||
tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL,
|
||||
0x0000ff00);
|
||||
|
@ -92,7 +92,7 @@ int memcons_getc(void)
|
||||
return c;
|
||||
}
|
||||
|
||||
void udbg_init_memcons(void)
|
||||
void __init udbg_init_memcons(void)
|
||||
{
|
||||
udbg_putc = memcons_putc;
|
||||
udbg_getc = memcons_getc;
|
||||
|
@ -162,7 +162,7 @@ static const struct icp_ops icp_hv_ops = {
|
||||
#endif
|
||||
};
|
||||
|
||||
int icp_hv_init(void)
|
||||
int __init icp_hv_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
|
@ -184,7 +184,7 @@ static const struct icp_ops icp_opal_ops = {
|
||||
#endif
|
||||
};
|
||||
|
||||
int icp_opal_init(void)
|
||||
int __init icp_opal_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
|
@ -121,7 +121,7 @@ void xics_mask_unknown_vec(unsigned int vec)
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
static void xics_request_ipi(void)
|
||||
static void __init xics_request_ipi(void)
|
||||
{
|
||||
unsigned int ipi;
|
||||
|
||||
|
@ -492,7 +492,7 @@ static const struct xive_ops xive_native_ops = {
|
||||
.name = "native",
|
||||
};
|
||||
|
||||
static bool xive_parse_provisioning(struct device_node *np)
|
||||
static bool __init xive_parse_provisioning(struct device_node *np)
|
||||
{
|
||||
int rc;
|
||||
|
||||
@ -532,7 +532,7 @@ static bool xive_parse_provisioning(struct device_node *np)
|
||||
return true;
|
||||
}
|
||||
|
||||
static void xive_native_setup_pools(void)
|
||||
static void __init xive_native_setup_pools(void)
|
||||
{
|
||||
/* Allocate a pool big enough */
|
||||
pr_debug("XIVE: Allocating VP block for pool size %u\n", nr_cpu_ids);
|
||||
|
@ -44,7 +44,7 @@ struct xive_irq_bitmap {
|
||||
|
||||
static LIST_HEAD(xive_irq_bitmaps);
|
||||
|
||||
static int xive_irq_bitmap_add(int base, int count)
|
||||
static int __init xive_irq_bitmap_add(int base, int count)
|
||||
{
|
||||
struct xive_irq_bitmap *xibm;
|
||||
|
||||
@ -687,7 +687,7 @@ static const struct xive_ops xive_spapr_ops = {
|
||||
/*
|
||||
* get max priority from "/ibm,plat-res-int-priorities"
|
||||
*/
|
||||
static bool xive_get_max_prio(u8 *max_prio)
|
||||
static bool __init xive_get_max_prio(u8 *max_prio)
|
||||
{
|
||||
struct device_node *rootdn;
|
||||
const __be32 *reg;
|
||||
@ -741,7 +741,7 @@ static bool xive_get_max_prio(u8 *max_prio)
|
||||
return true;
|
||||
}
|
||||
|
||||
static const u8 *get_vec5_feature(unsigned int index)
|
||||
static const u8 *__init get_vec5_feature(unsigned int index)
|
||||
{
|
||||
unsigned long root, chosen;
|
||||
int size;
|
||||
|
Loading…
Reference in New Issue
Block a user