From 73a985a140cd0f1b17fa1438af0359d6b9b32b16 Mon Sep 17 00:00:00 2001 From: Mariusz Kozlowski Date: Tue, 31 Jul 2007 19:14:28 +0200 Subject: [PATCH 01/37] PCI Hotplug: cpqphp_ctrl.c: kmalloc + memset conversion to kzalloc drivers/pci/hotplug/cpqphp_ctrl.c | 79698 -> 79638 (-60 bytes) drivers/pci/hotplug/cpqphp_ctrl.o | 192896 -> 192736 (-160 bytes) Signed-off-by: Mariusz Kozlowski Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/cpqphp_ctrl.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c index 37d72f123a80..dcafa2aaef8a 100644 --- a/drivers/pci/hotplug/cpqphp_ctrl.c +++ b/drivers/pci/hotplug/cpqphp_ctrl.c @@ -973,16 +973,13 @@ struct pci_func *cpqhp_slot_create(u8 busnumber) struct pci_func *new_slot; struct pci_func *next; - new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL); - + new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL); if (new_slot == NULL) { /* I'm not dead yet! * You will be. */ return new_slot; } - memset(new_slot, 0, sizeof(struct pci_func)); - new_slot->next = NULL; new_slot->configured = 1; From 89913bf77a60fdb6ff204a670d3e191848a7b2c8 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:30 -0700 Subject: [PATCH 02/37] pciehp: remove CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE Remove unnecessary CONFIG_HOTPLUG_PCI_PCIE_EVENT_MODE. The CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE option is not needed because polling mechanism can be enabled through 'pciehp_poll_mode' module option. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_core.c | 4 ---- drivers/pci/pcie/Kconfig | 9 --------- 2 files changed, 13 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index e5d3f0b4f45a..3d692a971218 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -540,10 +540,6 @@ static int __init pcied_init(void) { int retval = 0; -#ifdef CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE - pciehp_poll_mode = 1; -#endif - retval = pcie_port_service_register(&hpdriver_portdrv); dbg("pcie_port_service_register = %d\n", retval); info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig index 0ad92a8ad8b1..287a9311716c 100644 --- a/drivers/pci/pcie/Kconfig +++ b/drivers/pci/pcie/Kconfig @@ -25,13 +25,4 @@ config HOTPLUG_PCI_PCIE When in doubt, say N. -config HOTPLUG_PCI_PCIE_POLL_EVENT_MODE - bool "Use polling mechanism for hot-plug events (for testing purpose)" - depends on HOTPLUG_PCI_PCIE - help - Say Y here if you want to use the polling mechanism for hot-plug - events for early platform testing. - - When in doubt, say N. - source "drivers/pci/pcie/aer/Kconfig" From 1cf53d5ddb93b77ce1e277da85fe695e4c2a667d Mon Sep 17 00:00:00 2001 From: Kristen Carlson Accardi Date: Thu, 9 Aug 2007 16:09:31 -0700 Subject: [PATCH 03/37] PCI Hotplug: pciehp: Dont check bridge control on remove When removing a device with a bridge on it, only read the bridge control register if the adapter is actually present. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_pci.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c index 854aaea09e4d..8f2b25c49f84 100644 --- a/drivers/pci/hotplug/pciehp_pci.c +++ b/drivers/pci/hotplug/pciehp_pci.c @@ -243,9 +243,10 @@ int pciehp_configure_device(struct slot *p_slot) int pciehp_unconfigure_device(struct slot *p_slot) { - int rc = 0; + int ret, rc = 0; int j; u8 bctl = 0; + u8 presence = 0; struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, @@ -263,12 +264,17 @@ int pciehp_unconfigure_device(struct slot *p_slot) continue; } if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { - pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl); - if (bctl & PCI_BRIDGE_CTL_VGA) { - err("Cannot remove display device %s\n", + ret = p_slot->hpc_ops->get_adapter_status(p_slot, + &presence); + if (!ret && presence) { + pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, + &bctl); + if (bctl & PCI_BRIDGE_CTL_VGA) { + err("Cannot remove display device %s\n", pci_name(temp)); - pci_dev_put(temp); - continue; + pci_dev_put(temp); + continue; + } } } pci_remove_bus_device(temp); From 57d90c027641169b0724f94d355704e28895bcd6 Mon Sep 17 00:00:00 2001 From: Kristen Carlson Accardi Date: Thu, 9 Aug 2007 16:09:32 -0700 Subject: [PATCH 04/37] PCI Hotplug: pciehp: Request control over PCI Express Capability as well as Native hotplug According to the PCI firmware spec (3.0), the OS must claim control over the PCI Express Capability bits in addition to the PCI Express Native Hot Plug feature when executing _OSC. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_hpc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 016eea94a8a5..dbd04660babb 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -1138,6 +1138,7 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) dbg("Trying to get hotplug control for %s \n", (char *)string.pointer); status = pci_osc_control_set(handle, + OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL); if (status == AE_NOT_FOUND) status = acpi_run_oshp(handle); From c8426483776d913c5bdc3d698a7633496a885b78 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:33 -0700 Subject: [PATCH 05/37] pciehp: remove DBG_XXX_ROUTINE This patch removes DBG_ENTER_ROUTIN, DBG_LEAVE_ROUTINE and related code, which seem no longer needed. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_hpc.c | 111 ++----------------------------- 1 file changed, 5 insertions(+), 106 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index dbd04660babb..f6143175de71 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -39,37 +39,6 @@ #include "../pci.h" #include "pciehp.h" -#ifdef DEBUG -#define DBG_K_TRACE_ENTRY ((unsigned int)0x00000001) /* On function entry */ -#define DBG_K_TRACE_EXIT ((unsigned int)0x00000002) /* On function exit */ -#define DBG_K_INFO ((unsigned int)0x00000004) /* Info messages */ -#define DBG_K_ERROR ((unsigned int)0x00000008) /* Error messages */ -#define DBG_K_TRACE (DBG_K_TRACE_ENTRY|DBG_K_TRACE_EXIT) -#define DBG_K_STANDARD (DBG_K_INFO|DBG_K_ERROR|DBG_K_TRACE) -/* Redefine this flagword to set debug level */ -#define DEBUG_LEVEL DBG_K_STANDARD - -#define DEFINE_DBG_BUFFER char __dbg_str_buf[256]; - -#define DBG_PRINT( dbg_flags, args... ) \ - do { \ - if ( DEBUG_LEVEL & ( dbg_flags ) ) \ - { \ - int len; \ - len = sprintf( __dbg_str_buf, "%s:%d: %s: ", \ - __FILE__, __LINE__, __FUNCTION__ ); \ - sprintf( __dbg_str_buf + len, args ); \ - printk( KERN_NOTICE "%s\n", __dbg_str_buf ); \ - } \ - } while (0) - -#define DBG_ENTER_ROUTINE DBG_PRINT (DBG_K_TRACE_ENTRY, "%s", "[Entry]"); -#define DBG_LEAVE_ROUTINE DBG_PRINT (DBG_K_TRACE_EXIT, "%s", "[Exit]"); -#else -#define DEFINE_DBG_BUFFER -#define DBG_ENTER_ROUTINE -#define DBG_LEAVE_ROUTINE -#endif /* DEBUG */ static atomic_t pciehp_num_controllers = ATOMIC_INIT(0); @@ -221,8 +190,6 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) #define EMI_STATE 0x0080 #define EMI_STATUS_BIT 7 -DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ - static irqreturn_t pcie_isr(int irq, void *dev_id); static void start_int_poll_timer(struct controller *ctrl, int sec); @@ -231,8 +198,6 @@ static void int_poll_timeout(unsigned long data) { struct controller *ctrl = (struct controller *)data; - DBG_ENTER_ROUTINE - /* Poll for interrupt events. regs == NULL => polling */ pcie_isr(0, ctrl); @@ -289,8 +254,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) u16 slot_ctrl; unsigned long flags; - DBG_ENTER_ROUTINE - mutex_lock(&ctrl->ctrl_lock); retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); @@ -332,7 +295,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) retval = pcie_wait_cmd(ctrl); out: mutex_unlock(&ctrl->ctrl_lock); - DBG_LEAVE_ROUTINE return retval; } @@ -341,8 +303,6 @@ static int hpc_check_lnk_status(struct controller *ctrl) u16 lnk_status; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); if (retval) { err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); @@ -357,7 +317,6 @@ static int hpc_check_lnk_status(struct controller *ctrl) return retval; } - DBG_LEAVE_ROUTINE return retval; } @@ -368,8 +327,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status) u16 slot_ctrl; u8 atten_led_state; int retval = 0; - - DBG_ENTER_ROUTINE retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); if (retval) { @@ -400,7 +357,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status) break; } - DBG_LEAVE_ROUTINE return 0; } @@ -410,8 +366,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) u16 slot_ctrl; u8 pwr_state; int retval = 0; - - DBG_ENTER_ROUTINE retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); if (retval) { @@ -435,7 +389,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) break; } - DBG_LEAVE_ROUTINE return retval; } @@ -446,8 +399,6 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status) u16 slot_status; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (retval) { err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); @@ -456,7 +407,6 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status) *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; - DBG_LEAVE_ROUTINE return 0; } @@ -467,8 +417,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) u8 card_state; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (retval) { err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); @@ -477,7 +425,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) card_state = (u8)((slot_status & PRSN_STATE) >> 6); *status = (card_state == 1) ? 1 : 0; - DBG_LEAVE_ROUTINE return 0; } @@ -488,8 +435,6 @@ static int hpc_query_power_fault(struct slot *slot) u8 pwr_fault; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (retval) { err("%s: Cannot check for power fault\n", __FUNCTION__); @@ -497,7 +442,6 @@ static int hpc_query_power_fault(struct slot *slot) } pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); - DBG_LEAVE_ROUTINE return pwr_fault; } @@ -507,8 +451,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) u16 slot_status; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (retval) { err("%s : Cannot check EMI status\n", __FUNCTION__); @@ -516,7 +458,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) } *status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT; - DBG_LEAVE_ROUTINE return retval; } @@ -526,8 +467,6 @@ static int hpc_toggle_emi(struct slot *slot) u16 cmd_mask; int rc; - DBG_ENTER_ROUTINE - slot_cmd = EMI_CTRL; cmd_mask = EMI_CTRL; if (!pciehp_poll_mode) { @@ -537,7 +476,7 @@ static int hpc_toggle_emi(struct slot *slot) rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); slot->last_emi_toggle = get_seconds(); - DBG_LEAVE_ROUTINE + return rc; } @@ -548,8 +487,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) u16 cmd_mask; int rc; - DBG_ENTER_ROUTINE - cmd_mask = ATTN_LED_CTRL; switch (value) { case 0 : /* turn off */ @@ -573,7 +510,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - DBG_LEAVE_ROUTINE return rc; } @@ -584,8 +520,6 @@ static void hpc_set_green_led_on(struct slot *slot) u16 slot_cmd; u16 cmd_mask; - DBG_ENTER_ROUTINE - slot_cmd = 0x0100; cmd_mask = PWR_LED_CTRL; if (!pciehp_poll_mode) { @@ -597,8 +531,6 @@ static void hpc_set_green_led_on(struct slot *slot) dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - DBG_LEAVE_ROUTINE - return; } static void hpc_set_green_led_off(struct slot *slot) @@ -607,8 +539,6 @@ static void hpc_set_green_led_off(struct slot *slot) u16 slot_cmd; u16 cmd_mask; - DBG_ENTER_ROUTINE - slot_cmd = 0x0300; cmd_mask = PWR_LED_CTRL; if (!pciehp_poll_mode) { @@ -619,9 +549,6 @@ static void hpc_set_green_led_off(struct slot *slot) pcie_write_cmd(slot, slot_cmd, cmd_mask); dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - - DBG_LEAVE_ROUTINE - return; } static void hpc_set_green_led_blink(struct slot *slot) @@ -630,8 +557,6 @@ static void hpc_set_green_led_blink(struct slot *slot) u16 slot_cmd; u16 cmd_mask; - DBG_ENTER_ROUTINE - slot_cmd = 0x0200; cmd_mask = PWR_LED_CTRL; if (!pciehp_poll_mode) { @@ -643,14 +568,10 @@ static void hpc_set_green_led_blink(struct slot *slot) dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - DBG_LEAVE_ROUTINE - return; } static void hpc_release_ctlr(struct controller *ctrl) { - DBG_ENTER_ROUTINE - if (pciehp_poll_mode) del_timer(&ctrl->poll_timer); else @@ -662,8 +583,6 @@ static void hpc_release_ctlr(struct controller *ctrl) */ if (atomic_dec_and_test(&pciehp_num_controllers)) destroy_workqueue(pciehp_wq); - - DBG_LEAVE_ROUTINE } static int hpc_power_on_slot(struct slot * slot) @@ -674,8 +593,6 @@ static int hpc_power_on_slot(struct slot * slot) u16 slot_status; int retval = 0; - DBG_ENTER_ROUTINE - dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); /* Clear sticky power-fault bit from previous power failures */ @@ -719,8 +636,6 @@ static int hpc_power_on_slot(struct slot * slot) dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - DBG_LEAVE_ROUTINE - return retval; } @@ -731,8 +646,6 @@ static int hpc_power_off_slot(struct slot * slot) u16 cmd_mask; int retval = 0; - DBG_ENTER_ROUTINE - dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); slot_cmd = POWER_OFF; @@ -764,8 +677,6 @@ static int hpc_power_off_slot(struct slot * slot) dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - DBG_LEAVE_ROUTINE - return retval; } @@ -915,8 +826,6 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) u32 lnk_cap; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); if (retval) { err("%s: Cannot read LNKCAP register\n", __FUNCTION__); @@ -934,7 +843,7 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) *value = lnk_speed; dbg("Max link speed = %d\n", lnk_speed); - DBG_LEAVE_ROUTINE + return retval; } @@ -945,8 +854,6 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value u32 lnk_cap; int retval = 0; - DBG_ENTER_ROUTINE - retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); if (retval) { err("%s: Cannot read LNKCAP register\n", __FUNCTION__); @@ -985,7 +892,7 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value *value = lnk_wdth; dbg("Max link width = %d\n", lnk_wdth); - DBG_LEAVE_ROUTINE + return retval; } @@ -996,8 +903,6 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) int retval = 0; u16 lnk_status; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); if (retval) { err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); @@ -1015,7 +920,7 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) *value = lnk_speed; dbg("Current link speed = %d\n", lnk_speed); - DBG_LEAVE_ROUTINE + return retval; } @@ -1026,8 +931,6 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value int retval = 0; u16 lnk_status; - DBG_ENTER_ROUTINE - retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); if (retval) { err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); @@ -1066,7 +969,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value *value = lnk_wdth; dbg("Current link width = %d\n", lnk_wdth); - DBG_LEAVE_ROUTINE + return retval; } @@ -1177,8 +1080,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) u16 slot_status, slot_ctrl; struct pci_dev *pdev; - DBG_ENTER_ROUTINE - pdev = dev->port; ctrl->pci_dev = pdev; /* save pci_dev in context */ @@ -1376,7 +1277,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) ctrl->hpc_ops = &pciehp_hpc_ops; - DBG_LEAVE_ROUTINE return 0; /* We end up here for the many possible ways to fail this API. */ @@ -1396,6 +1296,5 @@ abort_free_irq: free_irq(ctrl->pci_dev->irq, ctrl); abort_free_ctlr: - DBG_LEAVE_ROUTINE return -1; } From 71ad556dadcd303b4d32e9b890dcf1ccfbe9aeb3 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:34 -0700 Subject: [PATCH 06/37] pciehp: remove trailing whitespace from pciehp_hpc.c Remove trailing whitespaces from pciehp_hpc.c. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_hpc.c | 50 ++++++++++++++++---------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index f6143175de71..2e501f73c3b6 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -129,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) /* Link Width Encoding */ #define LNK_X1 0x01 #define LNK_X2 0x02 -#define LNK_X4 0x04 +#define LNK_X4 0x04 #define LNK_X8 0x08 #define LNK_X12 0x0C -#define LNK_X16 0x10 +#define LNK_X16 0x10 #define LNK_X32 0x20 /*Field definitions of Link Status Register */ @@ -262,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) goto out; } - if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { + if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue the next command according to spec. Just print out the error message */ @@ -310,7 +310,7 @@ static int hpc_check_lnk_status(struct controller *ctrl) } dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); - if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || + if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || !(lnk_status & NEG_LINK_WD)) { err("%s : Link Training Error occurs \n", __FUNCTION__); retval = -1; @@ -382,7 +382,7 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) *status = 1; break; case 1: - *status = 0; + *status = 0; break; default: *status = 0xFF; @@ -405,7 +405,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status) return retval; } - *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; + *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; return 0; } @@ -441,7 +441,7 @@ static int hpc_query_power_fault(struct slot *slot) return retval; } pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); - + return pwr_fault; } @@ -509,7 +509,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); dbg("%s: SLOTCTRL %x write cmd %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); - + return rc; } @@ -519,7 +519,7 @@ static void hpc_set_green_led_on(struct slot *slot) struct controller *ctrl = slot->ctrl; u16 slot_cmd; u16 cmd_mask; - + slot_cmd = 0x0100; cmd_mask = PWR_LED_CTRL; if (!pciehp_poll_mode) { @@ -556,7 +556,7 @@ static void hpc_set_green_led_blink(struct slot *slot) struct controller *ctrl = slot->ctrl; u16 slot_cmd; u16 cmd_mask; - + slot_cmd = 0x0200; cmd_mask = PWR_LED_CTRL; if (!pciehp_poll_mode) { @@ -736,7 +736,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) } dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", __FUNCTION__, slot_status); - + /* Clear command complete interrupt caused by this write */ temp_word = 0x1f; rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); @@ -746,10 +746,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) return IRQ_NONE; } } - + if (intr_loc & CMD_COMPLETED) { - /* - * Command Complete Interrupt Pending + /* + * Command Complete Interrupt Pending */ ctrl->cmd_busy = 0; wake_up_interruptible(&ctrl->queue); @@ -803,7 +803,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) __FUNCTION__); return IRQ_NONE; } - + /* Clear command complete interrupt caused by this write */ temp_word = 0x1F; rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); @@ -815,7 +815,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", __FUNCTION__, temp_word); } - + return IRQ_HANDLED; } @@ -936,7 +936,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); return retval; } - + switch ((lnk_status & 0x03F0) >> 4){ case 0: lnk_wdth = PCIE_LNK_WIDTH_RESRV; @@ -988,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = { .get_cur_bus_speed = hpc_get_cur_lnk_speed, .get_max_lnk_width = hpc_get_max_lnk_width, .get_cur_lnk_width = hpc_get_cur_lnk_width, - + .query_power_fault = hpc_query_power_fault, .green_led_on = hpc_set_green_led_on, .green_led_off = hpc_set_green_led_off, .green_led_blink = hpc_set_green_led_blink, - + .release_ctlr = hpc_release_ctlr, .check_lnk_status = hpc_check_lnk_status, }; @@ -1144,7 +1144,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) (unsigned long long)pci_resource_start(pdev, rc), (unsigned long long)pci_resource_len(pdev, rc)); - info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, + info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, pdev->subsystem_vendor, pdev->subsystem_device); mutex_init(&ctrl->crit_sect); @@ -1232,14 +1232,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) if (ATTN_BUTTN(slot_cap)) intr_enable = intr_enable | ATTN_BUTTN_ENABLE; - + if (POWER_CTRL(slot_cap)) intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; - + if (MRL_SENS(slot_cap)) intr_enable = intr_enable | MRL_DETECT_ENABLE; - temp_word = (temp_word & ~intr_enable) | intr_enable; + temp_word = (temp_word & ~intr_enable) | intr_enable; if (pciehp_poll_mode) { temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; @@ -1258,14 +1258,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); goto abort_disable_intr; } - + temp_word = 0x1F; /* Clear all events */ rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); if (rc) { err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); goto abort_disable_intr; } - + if (pciehp_force) { dbg("Bypassing BIOS check for pciehp use on %s\n", pci_name(ctrl->pci_dev)); From a073a8267400be2bd8acf808a45bc3ab01cf1b20 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:35 -0700 Subject: [PATCH 07/37] pciehp: remove trailing whitespace from pciehp_core.c Remove trailing whitespaces from pciehp_core.c. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_core.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index 3d692a971218..6462ac3b405f 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -304,8 +304,8 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status) dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); hotplug_slot->info->attention_status = status; - - if (ATTN_LED(slot->ctrl->ctrlcap)) + + if (ATTN_LED(slot->ctrl->ctrlcap)) slot->hpc_ops->set_attention_status(slot, status); return 0; @@ -405,7 +405,7 @@ static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe int retval; dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); - + retval = slot->hpc_ops->get_max_bus_speed(slot, value); if (retval < 0) *value = PCI_SPEED_UNKNOWN; @@ -419,7 +419,7 @@ static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe int retval; dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); - + retval = slot->hpc_ops->get_cur_bus_speed(slot, value); if (retval < 0) *value = PCI_SPEED_UNKNOWN; @@ -434,7 +434,7 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_ struct slot *t_slot; u8 value; struct pci_dev *pdev; - + ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); if (!ctrl) { err("%s : out of memory\n", __FUNCTION__); @@ -502,23 +502,23 @@ static void pciehp_remove (struct pcie_device *dev) #ifdef CONFIG_PM static int pciehp_suspend (struct pcie_device *dev, pm_message_t state) { - printk("%s ENTRY\n", __FUNCTION__); + printk("%s ENTRY\n", __FUNCTION__); return 0; } static int pciehp_resume (struct pcie_device *dev) { - printk("%s ENTRY\n", __FUNCTION__); + printk("%s ENTRY\n", __FUNCTION__); return 0; } #endif -static struct pcie_port_service_id port_pci_ids[] = { { - .vendor = PCI_ANY_ID, +static struct pcie_port_service_id port_pci_ids[] = { { + .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, .port_type = PCIE_ANY_PORT, .service_type = PCIE_PORT_SERVICE_HP, - .driver_data = 0, + .driver_data = 0, }, { /* end: all zeroes */ } }; static const char device_name[] = "hpdriver"; From 36ed27b07b873db06c10d2f8f41aa17be6803fdd Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:36 -0700 Subject: [PATCH 08/37] pciehp: remove trailing whitespace from pciehp_ctrl.c Remove trailing whitespaces from pciehp_ctrl.c. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_ctrl.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index 98e541ffef3d..c8cb49c5a752 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c @@ -173,7 +173,7 @@ u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl) return 1; } -/* The following routines constitute the bulk of the +/* The following routines constitute the bulk of the hotplug controller logic */ @@ -181,7 +181,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) { /* turn off slot, turn on Amber LED, turn off Green LED if supported*/ if (POWER_CTRL(ctrl->ctrlcap)) { - if (pslot->hpc_ops->power_off_slot(pslot)) { + if (pslot->hpc_ops->power_off_slot(pslot)) { err("%s: Issue of Slot Power Off command failed\n", __FUNCTION__); return; @@ -189,7 +189,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) } if (PWR_LED(ctrl->ctrlcap)) - pslot->hpc_ops->green_led_off(pslot); + pslot->hpc_ops->green_led_off(pslot); if (ATTN_LED(ctrl->ctrlcap)) { if (pslot->hpc_ops->set_attention_status(pslot, 1)) { @@ -231,7 +231,7 @@ static int board_added(struct slot *p_slot) if (retval) return retval; } - + if (PWR_LED(ctrl->ctrlcap)) p_slot->hpc_ops->green_led_blink(p_slot); @@ -548,7 +548,7 @@ int pciehp_enable_slot(struct slot *p_slot) mutex_unlock(&p_slot->ctrl->crit_sect); return -ENODEV; } - if (MRL_SENS(p_slot->ctrl->ctrlcap)) { + if (MRL_SENS(p_slot->ctrl->ctrlcap)) { rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); if (rc || getstatus) { info("%s: latch open on slot(%s)\n", __FUNCTION__, @@ -557,8 +557,8 @@ int pciehp_enable_slot(struct slot *p_slot) return -ENODEV; } } - - if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { + + if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); if (rc || getstatus) { info("%s: already enabled on slot(%s)\n", __FUNCTION__, @@ -593,7 +593,7 @@ int pciehp_disable_slot(struct slot *p_slot) /* Check to see if (latch closed, card present, power on) */ mutex_lock(&p_slot->ctrl->crit_sect); - if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) { + if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) { ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); if (ret || !getstatus) { info("%s: no adapter on slot(%s)\n", __FUNCTION__, @@ -603,7 +603,7 @@ int pciehp_disable_slot(struct slot *p_slot) } } - if (MRL_SENS(p_slot->ctrl->ctrlcap)) { + if (MRL_SENS(p_slot->ctrl->ctrlcap)) { ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); if (ret || getstatus) { info("%s: latch open on slot(%s)\n", __FUNCTION__, @@ -613,7 +613,7 @@ int pciehp_disable_slot(struct slot *p_slot) } } - if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { + if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); if (ret || !getstatus) { info("%s: already disabled slot(%s)\n", __FUNCTION__, From 9fe8164536c4fa6e630c706c667a2c6e8456d143 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:37 -0700 Subject: [PATCH 09/37] pciehp: remove trailing whitespace form pciehp_pci.c Remove trailing whitespaces from pciehp_pci.c. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_pci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c index 8f2b25c49f84..c424aded13fb 100644 --- a/drivers/pci/hotplug/pciehp_pci.c +++ b/drivers/pci/hotplug/pciehp_pci.c @@ -280,12 +280,12 @@ int pciehp_unconfigure_device(struct slot *p_slot) pci_remove_bus_device(temp); pci_dev_put(temp); } - /* + /* * Some PCI Express root ports require fixup after hot-plug operation. */ - if (pcie_mch_quirk) + if (pcie_mch_quirk) pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev); - + return rc; } From 40730d1042c595b1e84b28e40021f2c1377b4f8b Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 9 Aug 2007 16:09:38 -0700 Subject: [PATCH 10/37] pciehp: minor cleanups for pciehp_hpc.c Minor cleanups for pciehp_hpc.c. The 80 column rules, removing unnecessary lines, and so on. Signed-off-by: Kenji Kaneshige Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/pciehp_hpc.c | 47 ++++++++++++++++++-------------- 1 file changed, 26 insertions(+), 21 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 2e501f73c3b6..06d025b8b13f 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -203,7 +203,7 @@ static void int_poll_timeout(unsigned long data) init_timer(&ctrl->poll_timer); if (!pciehp_poll_time) - pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/ + pciehp_poll_time = 2; /* default polling interval is 2 sec */ start_int_poll_timer(ctrl, pciehp_poll_time); } @@ -320,7 +320,6 @@ static int hpc_check_lnk_status(struct controller *ctrl) return retval; } - static int hpc_get_attention_status(struct slot *slot, u8 *status) { struct controller *ctrl = slot->ctrl; @@ -392,7 +391,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) return retval; } - static int hpc_get_latch_status(struct slot *slot, u8 *status) { struct controller *ctrl = slot->ctrl; @@ -513,7 +511,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) return rc; } - static void hpc_set_green_led_on(struct slot *slot) { struct controller *ctrl = slot->ctrl; @@ -695,8 +692,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) return IRQ_NONE; } - intr_detect = ( ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | MRL_SENS_CHANGED | - PRSN_DETECT_CHANGED | CMD_COMPLETED ); + intr_detect = (ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | + MRL_SENS_CHANGED | PRSN_DETECT_CHANGED | CMD_COMPLETED); intr_loc = slot_status & intr_detect; @@ -718,7 +715,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n", __FUNCTION__, temp_word); - temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; + temp_word = (temp_word & ~HP_INTR_ENABLE & + ~CMD_CMPL_INTR_ENABLE) | 0x00; rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); if (rc) { err("%s: Cannot write to SLOTCTRL register\n", @@ -819,7 +817,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) return IRQ_HANDLED; } -static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) +static int hpc_get_max_lnk_speed(struct slot *slot, enum pci_bus_speed *value) { struct controller *ctrl = slot->ctrl; enum pcie_link_speed lnk_speed; @@ -847,7 +845,8 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) return retval; } -static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value) +static int hpc_get_max_lnk_width(struct slot *slot, + enum pcie_link_width *value) { struct controller *ctrl = slot->ctrl; enum pcie_link_width lnk_wdth; @@ -896,7 +895,7 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value return retval; } -static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) +static int hpc_get_cur_lnk_speed(struct slot *slot, enum pci_bus_speed *value) { struct controller *ctrl = slot->ctrl; enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN; @@ -924,7 +923,8 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) return retval; } -static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value) +static int hpc_get_cur_lnk_width(struct slot *slot, + enum pcie_link_width *value) { struct controller *ctrl = slot->ctrl; enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN; @@ -1067,8 +1067,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) } #endif - - int pcie_init(struct controller * ctrl, struct pcie_device *dev) { int rc; @@ -1103,9 +1101,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) dbg("%s: CAPREG offset %x cap_reg %x\n", __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg); - if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040) + if (((cap_reg & SLOT_IMPL) == 0) || + (((cap_reg & DEV_PORT_TYPE) != 0x0040) && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) { - dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__); + dbg("%s : This is not a root port or the port is not " + "connected to a slot\n", __FUNCTION__); goto abort_free_ctlr; } @@ -1138,14 +1138,15 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl); - for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) + for (rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) if (pci_resource_len(pdev, rc) > 0) dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc, (unsigned long long)pci_resource_start(pdev, rc), (unsigned long long)pci_resource_len(pdev, rc)); - info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, - pdev->subsystem_vendor, pdev->subsystem_device); + info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", + pdev->vendor, pdev->device, + pdev->subsystem_vendor, pdev->subsystem_device); mutex_init(&ctrl->crit_sect); mutex_init(&ctrl->ctrl_lock); @@ -1169,7 +1170,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) dbg("%s: SLOTCTRL %x value read %x\n", __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word); - temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; + temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | + 0x00; rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); if (rc) { @@ -1247,7 +1249,10 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; } - /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ + /* + * Unmask Hot-plug Interrupt Enable for the interrupt + * notification mechanism case. + */ rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); if (rc) { err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); @@ -1279,7 +1284,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) return 0; - /* We end up here for the many possible ways to fail this API. */ + /* We end up here for the many possible ways to fail this API. */ abort_disable_intr: rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); if (!rc) { From 229f5afded86bf3819b7b67e57c62813ca0648a7 Mon Sep 17 00:00:00 2001 From: vignesh babu Date: Mon, 13 Aug 2007 18:23:14 +0530 Subject: [PATCH 11/37] PCI: is_power_of_2 in drivers/pci/pci.c Replacing n & (n - 1) for power of 2 check by is_power_of_2(n) Signed-off-by: vignesh babu Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 37c00f6fd801..19a64a36ecab 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -17,6 +17,7 @@ #include #include #include +#include #include /* isa_dma_bridge_buggy */ #include "pci.h" @@ -1454,7 +1455,7 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) int cap, err = -EINVAL; u32 stat, cmd, v, o; - if (mmrbc < 512 || mmrbc > 4096 || (mmrbc & (mmrbc-1))) + if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc)) goto out; v = ffs(mmrbc) - 10; @@ -1526,7 +1527,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq) int cap, err = -EINVAL; u16 ctl, v; - if (rq < 128 || rq > 4096 || (rq & (rq-1))) + if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) goto out; v = (ffs(rq) - 8) << 12; From 2d100fe8f6ebe5e4335b26f3749bb0b7f706d1f9 Mon Sep 17 00:00:00 2001 From: Kristen Carlson Accardi Date: Tue, 14 Aug 2007 16:07:00 -0700 Subject: [PATCH 12/37] pci: hotplug: ibmphp: convert to kthread Convert ibmphp to new kthread api Signed-off-by: Kristen Carlson Accardi Cc: Christoph Hellwig Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/ibmphp_hpc.c | 57 +++++++------------------------- 1 file changed, 12 insertions(+), 45 deletions(-) diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c index d06ccb69e411..c31e7bf34502 100644 --- a/drivers/pci/hotplug/ibmphp_hpc.c +++ b/drivers/pci/hotplug/ibmphp_hpc.c @@ -35,7 +35,7 @@ #include #include #include - +#include #include "ibmphp.h" static int to_debug = 0; @@ -101,12 +101,11 @@ static int to_debug = 0; //---------------------------------------------------------------------------- // global variables //---------------------------------------------------------------------------- -static int ibmphp_shutdown; -static int tid_poll; static struct mutex sem_hpcaccess; // lock access to HPC static struct semaphore semOperations; // lock all operations and // access to data structures static struct semaphore sem_exit; // make sure polling thread goes away +static struct task_struct *ibmphp_poll_thread; //---------------------------------------------------------------------------- // local function prototypes //---------------------------------------------------------------------------- @@ -116,10 +115,9 @@ static u8 hpc_writecmdtoindex (u8, u8); static u8 hpc_readcmdtoindex (u8, u8); static void get_hpc_access (void); static void free_hpc_access (void); -static void poll_hpc (void); +static int poll_hpc(void *data); static int process_changeinstatus (struct slot *, struct slot *); static int process_changeinlatch (u8, u8, struct controller *); -static int hpc_poll_thread (void *); static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *); //---------------------------------------------------------------------------- @@ -137,8 +135,6 @@ void __init ibmphp_hpc_initvars (void) init_MUTEX (&semOperations); init_MUTEX_LOCKED (&sem_exit); to_debug = 0; - ibmphp_shutdown = 0; - tid_poll = 0; debug ("%s - Exit\n", __FUNCTION__); } @@ -819,7 +815,7 @@ void ibmphp_unlock_operations (void) #define POLL_LATCH_REGISTER 0 #define POLL_SLOTS 1 #define POLL_SLEEP 2 -static void poll_hpc (void) +static int poll_hpc(void *data) { struct slot myslot; struct slot *pslot = NULL; @@ -833,10 +829,7 @@ static void poll_hpc (void) debug ("%s - Entry\n", __FUNCTION__); - while (!ibmphp_shutdown) { - if (ibmphp_shutdown) - break; - + while (!kthread_should_stop()) { /* try to get the lock to do some kind of hardware access */ down (&semOperations); @@ -896,7 +889,7 @@ static void poll_hpc (void) up (&semOperations); msleep(POLL_INTERVAL_SEC * 1000); - if (ibmphp_shutdown) + if (kthread_should_stop()) break; down (&semOperations); @@ -915,6 +908,7 @@ static void poll_hpc (void) } up (&sem_exit); debug ("%s - Exit\n", __FUNCTION__); + return 0; } @@ -1049,29 +1043,6 @@ static int process_changeinlatch (u8 old, u8 new, struct controller *ctrl) return rc; } -/*---------------------------------------------------------------------- -* Name: hpc_poll_thread -* -* Action: polling -* -* Return 0 -* Value: -*---------------------------------------------------------------------*/ -static int hpc_poll_thread (void *data) -{ - debug ("%s - Entry\n", __FUNCTION__); - - daemonize("hpc_poll"); - allow_signal(SIGKILL); - - poll_hpc (); - - tid_poll = 0; - debug ("%s - Exit\n", __FUNCTION__); - return 0; -} - - /*---------------------------------------------------------------------- * Name: ibmphp_hpc_start_poll_thread * @@ -1079,18 +1050,14 @@ static int hpc_poll_thread (void *data) *---------------------------------------------------------------------*/ int __init ibmphp_hpc_start_poll_thread (void) { - int rc = 0; - debug ("%s - Entry\n", __FUNCTION__); - tid_poll = kernel_thread (hpc_poll_thread, NULL, 0); - if (tid_poll < 0) { + ibmphp_poll_thread = kthread_run(poll_hpc, NULL, "hpc_poll"); + if (IS_ERR(ibmphp_poll_thread)) { err ("%s - Error, thread not started\n", __FUNCTION__); - rc = -1; + return PTR_ERR(ibmphp_poll_thread); } - - debug ("%s - Exit tid_poll[%d] rc[%d]\n", __FUNCTION__, tid_poll, rc); - return rc; + return 0; } /*---------------------------------------------------------------------- @@ -1102,7 +1069,7 @@ void __exit ibmphp_hpc_stop_poll_thread (void) { debug ("%s - Entry\n", __FUNCTION__); - ibmphp_shutdown = 1; + kthread_stop(ibmphp_poll_thread); debug ("before locking operations \n"); ibmphp_lock_operations (); debug ("after locking operations \n"); From fa007d8bebc5d812a445c48664b5bcad81f1351c Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 14 Aug 2007 16:17:15 -0700 Subject: [PATCH 13/37] pci: hotplug: cpqphp: convert to kthread infrastructure Signed-off-by: Christoph Hellwig Signed-off-by: Kristen Carlson Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/cpqphp_ctrl.c | 69 ++++++++++--------------------- 1 file changed, 21 insertions(+), 48 deletions(-) diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c index dcafa2aaef8a..3ef0a4875a62 100644 --- a/drivers/pci/hotplug/cpqphp_ctrl.c +++ b/drivers/pci/hotplug/cpqphp_ctrl.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "cpqphp.h" static u32 configure_new_device(struct controller* ctrl, struct pci_func *func, @@ -45,34 +46,20 @@ static int configure_new_function(struct controller* ctrl, struct pci_func *func u8 behind_bridge, struct resource_lists *resources); static void interrupt_event_handler(struct controller *ctrl); -static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ -static struct semaphore event_exit; /* guard ensure thread has exited before calling it quits */ -static int event_finished; -static unsigned long pushbutton_pending; /* = 0 */ -/* things needed for the long_delay function */ -static struct semaphore delay_sem; -static wait_queue_head_t delay_wait; +static struct task_struct *cpqhp_event_thread; +static unsigned long pushbutton_pending; /* = 0 */ /* delay is in jiffies to wait for */ static void long_delay(int delay) { - DECLARE_WAITQUEUE(wait, current); - - /* only allow 1 customer into the delay queue at once - * yes this makes some people wait even longer, but who really cares? - * this is for _huge_ delays to make the hardware happy as the - * signals bounce around + /* + * XXX(hch): if someone is bored please convert all callers + * to call msleep_interruptible directly. They really want + * to specify timeouts in natural units and spend a lot of + * effort converting them to jiffies.. */ - down (&delay_sem); - - init_waitqueue_head(&delay_wait); - - add_wait_queue(&delay_wait, &wait); msleep_interruptible(jiffies_to_msecs(delay)); - remove_wait_queue(&delay_wait, &wait); - - up(&delay_sem); } @@ -955,8 +942,8 @@ irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data) } if (schedule_flag) { - up(&event_semaphore); - dbg("Signal event_semaphore\n"); + wake_up_process(cpqhp_event_thread); + dbg("Waking even thread"); } return IRQ_HANDLED; } @@ -1735,7 +1722,7 @@ static u32 remove_board(struct pci_func * func, u32 replace_flag, struct control static void pushbutton_helper_thread(unsigned long data) { pushbutton_pending = data; - up(&event_semaphore); + wake_up_process(cpqhp_event_thread); } @@ -1744,13 +1731,13 @@ static int event_thread(void* data) { struct controller *ctrl; - daemonize("phpd_event"); - while (1) { dbg("!!!!event_thread sleeping\n"); - down_interruptible (&event_semaphore); - dbg("event_thread woken finished = %d\n", event_finished); - if (event_finished) break; + set_current_state(TASK_INTERRUPTIBLE); + schedule(); + + if (kthread_should_stop()) + break; /* Do stuff here */ if (pushbutton_pending) cpqhp_pushbutton_thread(pushbutton_pending); @@ -1759,38 +1746,24 @@ static int event_thread(void* data) interrupt_event_handler(ctrl); } dbg("event_thread signals exit\n"); - up(&event_exit); return 0; } - int cpqhp_event_start_thread(void) { - int pid; - - /* initialize our semaphores */ - init_MUTEX(&delay_sem); - init_MUTEX_LOCKED(&event_semaphore); - init_MUTEX_LOCKED(&event_exit); - event_finished=0; - - pid = kernel_thread(event_thread, NULL, 0); - if (pid < 0) { + cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event"); + if (IS_ERR(cpqhp_event_thread)) { err ("Can't start up our event thread\n"); - return -1; + return PTR_ERR(cpqhp_event_thread); } - dbg("Our event thread pid = %d\n", pid); + return 0; } void cpqhp_event_stop_thread(void) { - event_finished = 1; - dbg("event_thread finish command given\n"); - up(&event_semaphore); - dbg("wait for event_thread to exit\n"); - down(&event_exit); + kthread_stop(cpqhp_event_thread); } From aa24886e379d2b641c5117e178b15ce1d5d366ba Mon Sep 17 00:00:00 2001 From: David Brownell Date: Fri, 10 Aug 2007 13:10:27 -0700 Subject: [PATCH 14/37] dma_free_coherent() needs irqs enabled (sigh) On at least ARM (and I'm told MIPS too) dma_free_coherent() has a newish call context requirement: unlike its dma_alloc_coherent() sibling, it may not be called with IRQs disabled. (This was new behavior on ARM as of late 2005, caused by ARM SMP updates.) This little surprise can be annoyingly driver-visible. Since it looks like that restriction won't be removed, this patch changes the definition of the API to include that requirement. Also, to help catch nonportable drivers, it updates the x86 and swiotlb versions to include the relevant warnings. (I already observed that it trips on the bus_reset_tasklet of the new firewire_ohci driver.) Signed-off-by: David Brownell Cc: David Miller Acked-by: Russell King Cc: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- Documentation/DMA-API.txt | 3 +++ arch/x86/kernel/pci-dma_32.c | 3 ++- arch/x86/kernel/pci-dma_64.c | 1 + lib/swiotlb.c | 1 + 4 files changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt index cc7a8c39fb6f..b939ebb62871 100644 --- a/Documentation/DMA-API.txt +++ b/Documentation/DMA-API.txt @@ -68,6 +68,9 @@ size and dma_handle must all be the same as those passed into the consistent allocate. cpu_addr must be the virtual address returned by the consistent allocate. +Note that unlike their sibling allocation calls, these routines +may only be called with IRQs enabled. + Part Ib - Using small dma-coherent buffers ------------------------------------------ diff --git a/arch/x86/kernel/pci-dma_32.c b/arch/x86/kernel/pci-dma_32.c index 048f09b62553..0aae2f3847a5 100644 --- a/arch/x86/kernel/pci-dma_32.c +++ b/arch/x86/kernel/pci-dma_32.c @@ -63,7 +63,8 @@ void dma_free_coherent(struct device *dev, size_t size, { struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; int order = get_order(size); - + + WARN_ON(irqs_disabled()); /* for portability */ if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) { int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; diff --git a/arch/x86/kernel/pci-dma_64.c b/arch/x86/kernel/pci-dma_64.c index 29711445c818..9576a2eb375e 100644 --- a/arch/x86/kernel/pci-dma_64.c +++ b/arch/x86/kernel/pci-dma_64.c @@ -167,6 +167,7 @@ EXPORT_SYMBOL(dma_alloc_coherent); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t bus) { + WARN_ON(irqs_disabled()); /* for portability */ if (dma_ops->unmap_single) dma_ops->unmap_single(dev, bus, size, 0); free_pages((unsigned long)vaddr, get_order(size)); diff --git a/lib/swiotlb.c b/lib/swiotlb.c index a7381d55663a..30c1400e749e 100644 --- a/lib/swiotlb.c +++ b/lib/swiotlb.c @@ -497,6 +497,7 @@ void swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) { + WARN_ON(irqs_disabled()); if (!(vaddr >= (void *)io_tlb_start && vaddr < (void *)io_tlb_end)) free_pages((unsigned long) vaddr, get_order(size)); From 3d034aecd8b70d34388a4e40ca50af0d014223e1 Mon Sep 17 00:00:00 2001 From: "Denis V. Lunev" Date: Tue, 7 Aug 2007 13:13:18 +0400 Subject: [PATCH 15/37] PCI: pci_get_device call from interrupt in reboot fixups The following calltrace is possible now: handle_sysrq machine_emergency_restart mach_reboot_fixups pci_get_device pci_get_subsys down_read The patch skips reboot fixup if called from sysrq-B code. Signed-off-by: Denis V. Lunev Signed-off-by: Greg Kroah-Hartman --- arch/x86/kernel/reboot_fixups_32.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c index 03e1cce58f49..139eb03490f5 100644 --- a/arch/x86/kernel/reboot_fixups_32.c +++ b/arch/x86/kernel/reboot_fixups_32.c @@ -11,6 +11,7 @@ #include #include +#include #include #include @@ -56,6 +57,11 @@ void mach_reboot_fixups(void) struct pci_dev *dev; int i; + /* we can be called from sysrq-B code. In such a case it is + * prohibited to dig PCI */ + if (in_interrupt()) + return; + for (i=0; i < ARRAY_SIZE(fixups_table); i++) { cur = &(fixups_table[i]); dev = pci_get_device(cur->vendor, cur->device, NULL); From b205f6b2679c7fcf761ed726de8093ca69b6c26e Mon Sep 17 00:00:00 2001 From: Thomas Backlund Date: Fri, 10 Aug 2007 14:42:15 -0700 Subject: [PATCH 16/37] i386: add support for picopower irq router MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for PicoPower PT86C523 IRQ router to be used with the in-kernel yenta driver for CardBus. With this patch cardbus works on e.g. Dell Latitude XPi P150CD. Initial patch for kernel 2.4 series by Sune Mølgaard http://molgaard.org/code/linux-2.4.31-picopower.patch Ported to 2.6.20 by Chmouel Boudjnah (http://www.chmouel.com) Testing and confirmation that it works by Austin Acton Cleaned up a little for inclusion in a 2.6.21-rc7 based kernel. Added some more cleanups according to CodingStyle, as noted by Randy Dunlap on LKML. [akpm@linux-foundation.org: build fixes] Signed-off-by: Thomas Backlund Cc: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- arch/x86/pci/irq.c | 39 +++++++++++++++++++++++++++++++++++++++ include/linux/pci_ids.h | 3 +++ 2 files changed, 42 insertions(+) diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index d98c6b096f8e..c52150fdf82b 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c @@ -492,6 +492,26 @@ static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq return 1; } +/* + * PicoPower PT86C523 + */ +static int pirq_pico_get(struct pci_dev *router, struct pci_dev *dev, int pirq) +{ + outb(0x10 + ((pirq - 1) >> 1), 0x24); + return ((pirq - 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf); +} + +static int pirq_pico_set(struct pci_dev *router, struct pci_dev *dev, int pirq, + int irq) +{ + unsigned int x; + outb(0x10 + ((pirq - 1) >> 1), 0x24); + x = inb(0x26); + x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq)); + outb(x, 0x26); + return 1; +} + #ifdef CONFIG_PCI_BIOS static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) @@ -721,6 +741,24 @@ static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, return 1; } +static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) +{ + switch (device) { + case PCI_DEVICE_ID_PICOPOWER_PT86C523: + r->name = "PicoPower PT86C523"; + r->get = pirq_pico_get; + r->set = pirq_pico_set; + return 1; + + case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP: + r->name = "PicoPower PT86C523 rev. BB+"; + r->get = pirq_pico_get; + r->set = pirq_pico_set; + return 1; + } + return 0; +} + static __initdata struct irq_router_handler pirq_routers[] = { { PCI_VENDOR_ID_INTEL, intel_router_probe }, { PCI_VENDOR_ID_AL, ali_router_probe }, @@ -732,6 +770,7 @@ static __initdata struct irq_router_handler pirq_routers[] = { { PCI_VENDOR_ID_VLSI, vlsi_router_probe }, { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe }, { PCI_VENDOR_ID_AMD, amd_router_probe }, + { PCI_VENDOR_ID_PICOPOWER, pico_router_probe }, /* Someone with docs needs to add the ATI Radeon IGP */ { 0, NULL } }; diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 3948708c42ca..c88234d46506 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -829,6 +829,9 @@ #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a #define PCI_DEVICE_ID_UMC_UM8886A 0x886a +#define PCI_VENDOR_ID_PICOPOWER 0x1066 +#define PCI_DEVICE_ID_PICOPOWER_PT86C523 0x0002 +#define PCI_DEVICE_ID_PICOPOWER_PT86C523BBP 0x8002 #define PCI_VENDOR_ID_MYLEX 0x1069 #define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 From 9f672153ba921fdc6d4ef5ca8f6e65ac58cc970c Mon Sep 17 00:00:00 2001 From: Alex Chiang Date: Tue, 21 Aug 2007 17:49:07 -0600 Subject: [PATCH 17/37] PCI: Add missing PCI capability IDs These IDs are in pciutils, but haven't been added to the kernel yet. Signed-off-by: Alex Chiang Signed-off-by: Matthew Wilcox Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_regs.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 423d592c55d5..4a24ee368a11 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -202,8 +202,12 @@ #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ #define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ #define PCI_CAP_ID_HT 0x08 /* HyperTransport */ -#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */ +#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific */ +#define PCI_CAP_ID_DBG 0x0A /* Debug port */ +#define PCI_CAP_ID_CCRC 0x0B /* CompactPCI Central Resource Control */ #define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */ +#define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ +#define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */ #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ From 3799a4e7d8867cfbb137d417beb126d5a2302607 Mon Sep 17 00:00:00 2001 From: Auke Kok Date: Mon, 27 Aug 2007 16:17:38 -0700 Subject: [PATCH 18/37] cpqphp: Use PCI_CLASS_REVISION instead of PCI_REVISION_ID for read While PCI_CLASS_REVISION and PCI_REVISION_ID are identical, the code here discards the revision content and is only interested in the class number. Signed-off-by: Auke Kok Cc: Krosten Accardi Signed-off-by: Greg Kroah-Hartman --- drivers/pci/hotplug/cpqphp_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c index 2305cc450a45..a96b739b2d35 100644 --- a/drivers/pci/hotplug/cpqphp_core.c +++ b/drivers/pci/hotplug/cpqphp_core.c @@ -549,7 +549,7 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) * slot. */ bus->number = tbus; pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), - PCI_REVISION_ID, &work); + PCI_CLASS_REVISION, &work); if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { pci_bus_read_config_dword(bus, From aa288d4d6bc7d150bab3a5be954979a09633ccdd Mon Sep 17 00:00:00 2001 From: Auke Kok Date: Mon, 27 Aug 2007 16:17:47 -0700 Subject: [PATCH 19/37] PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID Signed-off-by: Auke Kok Cc: Peter Oruba Signed-off-by: Greg Kroah-Hartman --- drivers/pci/quirks.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 50f2dd9e1bb2..70f196f77c17 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -629,12 +629,9 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk */ static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) { - unsigned char revid; - - pci_read_config_byte(dev, PCI_REVISION_ID, &revid); - if (dev->subordinate && revid <= 0x12) { + if (dev->subordinate && dev->revision <= 0x12) { printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X " - "MMRBC\n", revid); + "MMRBC\n", dev->revision); dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; } } From 651472fbff71df39d3d734de31bca6e5412a688b Mon Sep 17 00:00:00 2001 From: Auke Kok Date: Mon, 27 Aug 2007 16:18:10 -0700 Subject: [PATCH 20/37] PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID Signed-off-by: Auke Kok Signed-off-by: Greg Kroah-Hartman --- drivers/pci/quirks.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 70f196f77c17..3b0bb3268bbd 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -472,11 +472,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_3, quirk_ */ static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev) { - u8 rev; u32 region; - pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev); - if (rev & 0x10) { + if (dev->revision & 0x10) { pci_read_config_dword(dev, 0x48, ®ion); region &= PCI_BASE_ADDRESS_IO_MASK; quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI"); From 346ca04d050ac48ceb8e4a6b1c76c2d7fd5d1a6a Mon Sep 17 00:00:00 2001 From: Johannes Goecke Date: Mon, 10 Sep 2007 10:46:52 +0200 Subject: [PATCH 21/37] PCI: re-enable onboard sound on "MSI K8T Neo2-FIR" On the "MSI K8T Neo2-FIR" board the BIOS disables the onboard soundcard, if a second PCI soundcard is present. This patch sets the korrect register bit to enable the onboard sound. Removed old code in /drivers/pci/quirks.c that only checks for the PCI-ID and fires on any Board with VIA 8237. New code in /arch/i386/pci/fixup.c checks the DMI-tables and only runs on the specific board. Signed-off-by: Johannes Goecke Acked-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- arch/x86/pci/fixup.c | 47 ++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/quirks.c | 32 ------------------------------ 2 files changed, 47 insertions(+), 32 deletions(-) diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index c82cbf4c7226..6cff66dd0c91 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -353,6 +353,53 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev) } DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); + +static struct dmi_system_id __devinitdata msi_k8t_dmi_table[] = { + { + .ident = "MSI-K8T-Neo2Fir", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "MSI"), + DMI_MATCH(DMI_PRODUCT_NAME, "MS-6702E"), + }, + }, + {} +}; + +/* + * The AMD-Athlon64 board MSI "K8T Neo2-FIR" disables the onboard sound + * card if a PCI-soundcard is added. + * + * The BIOS only gives options "DISABLED" and "AUTO". This code sets + * the corresponding register-value to enable the soundcard. + * + * The soundcard is only enabled, if the mainborad is identified + * via DMI-tables and the soundcard is detected to be off. + */ +static void __devinit pci_fixup_msi_k8t_onboard_sound(struct pci_dev *dev) +{ + unsigned char val; + if (!dmi_check_system(msi_k8t_dmi_table)) + return; /* only applies to MSI K8T Neo2-FIR */ + + pci_read_config_byte(dev, 0x50, &val); + if (val & 0x40) { + pci_write_config_byte(dev, 0x50, val & (~0x40)); + + /* verify the change for status output */ + pci_read_config_byte(dev, 0x50, &val); + if (val & 0x40) + printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, " + "can't enable onboard soundcard!\n"); + else + printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, " + "enabled onboard soundcard.\n"); + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, + pci_fixup_msi_k8t_onboard_sound); +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, + pci_fixup_msi_k8t_onboard_sound); + /* * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A. * diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 3b0bb3268bbd..59d4da2734c1 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -925,38 +925,6 @@ static void __init quirk_eisa_bridge(struct pci_dev *dev) } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge ); -/* - * On the MSI-K8T-Neo2Fir Board, the internal Soundcard is disabled - * when a PCI-Soundcard is added. The BIOS only gives Options - * "Disabled" and "AUTO". This Quirk Sets the corresponding - * Register-Value to enable the Soundcard. - * - * FIXME: Presently this quirk will run on anything that has an 8237 - * which isn't correct, we need to check DMI tables or something in - * order to make sure it only runs on the MSI-K8T-Neo2Fir. Because it - * runs everywhere at present we suppress the printk output in most - * irrelevant cases. - */ -static void k8t_sound_hostbridge(struct pci_dev *dev) -{ - unsigned char val; - - pci_read_config_byte(dev, 0x50, &val); - if (val == 0xc8) { - /* Assume it's probably a MSI-K8T-Neo2Fir */ - printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, attempting to turn soundcard ON\n"); - pci_write_config_byte(dev, 0x50, val & (~0x40)); - - /* Verify the Change for Status output */ - pci_read_config_byte(dev, 0x50, &val); - if (val & 0x40) - printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard still off\n"); - else - printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard on\n"); - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge); -DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge); /* * On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge From 4904e23b6b37c748a35bb2bd14ea325d0592e671 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Thu, 20 Sep 2007 12:48:23 +1000 Subject: [PATCH 22/37] PCI: Remove no longer correct documentation regarding MSI vector assignment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MSI vector reservation system described in Documentation/MSI-HOWTO.txt was removed by Eric in 92db6d10bc1bc43330a4c540fa5b64c83d9d865f. Remove the references to it in the documentation. While we're here § 5.5.1 refers to x86 hardware requirements, so make that clear. Signed-off-by: Michael Ellerman Cc: Eric W. Biederman Signed-off-by: Greg Kroah-Hartman --- Documentation/MSI-HOWTO.txt | 69 +++---------------------------------- 1 file changed, 4 insertions(+), 65 deletions(-) diff --git a/Documentation/MSI-HOWTO.txt b/Documentation/MSI-HOWTO.txt index 0d8240774fca..a51f693c1541 100644 --- a/Documentation/MSI-HOWTO.txt +++ b/Documentation/MSI-HOWTO.txt @@ -241,68 +241,7 @@ address space of the MSI-X table/MSI-X PBA. Otherwise, the PCI subsystem will fail enabling MSI-X on its hardware device when it calls the function pci_enable_msix(). -5.3.2 Handling MSI-X allocation - -Determining the number of MSI-X vectors allocated to a function is -dependent on the number of MSI capable devices and MSI-X capable -devices populated in the system. The policy of allocating MSI-X -vectors to a function is defined as the following: - -#of MSI-X vectors allocated to a function = (x - y)/z where - -x = The number of available PCI vector resources by the time - the device driver calls pci_enable_msix(). The PCI vector - resources is the sum of the number of unassigned vectors - (new) and the number of released vectors when any MSI/MSI-X - device driver switches its hardware device back to a legacy - mode or is hot-removed. The number of unassigned vectors - may exclude some vectors reserved, as defined in parameter - NR_HP_RESERVED_VECTORS, for the case where the system is - capable of supporting hot-add/hot-remove operations. Users - may change the value defined in NR_HR_RESERVED_VECTORS to - meet their specific needs. - -y = The number of MSI capable devices populated in the system. - This policy ensures that each MSI capable device has its - vector reserved to avoid the case where some MSI-X capable - drivers may attempt to claim all available vector resources. - -z = The number of MSI-X capable devices populated in the system. - This policy ensures that maximum (x - y) is distributed - evenly among MSI-X capable devices. - -Note that the PCI subsystem scans y and z during a bus enumeration. -When the PCI subsystem completes configuring MSI/MSI-X capability -structure of a device as requested by its device driver, y/z is -decremented accordingly. - -5.3.3 Handling MSI-X shortages - -For the case where fewer MSI-X vectors are allocated to a function -than requested, the function pci_enable_msix() will return the -maximum number of MSI-X vectors available to the caller. A device -driver may re-send its request with fewer or equal vectors indicated -in the return. For example, if a device driver requests 5 vectors, but -the number of available vectors is 3 vectors, a value of 3 will be -returned as a result of pci_enable_msix() call. A function could be -designed for its driver to use only 3 MSI-X table entries as -different combinations as ABC--, A-B-C, A--CB, etc. Note that this -patch does not support multiple entries with the same vector. Such -attempt by a device driver to use 5 MSI-X table entries with 3 vectors -as ABBCC, AABCC, BCCBA, etc will result as a failure by the function -pci_enable_msix(). Below are the reasons why supporting multiple -entries with the same vector is an undesirable solution. - - - The PCI subsystem cannot determine the entry that - generated the message to mask/unmask MSI while handling - software driver ISR. Attempting to walk through all MSI-X - table entries (2048 max) to mask/unmask any match vector - is an undesirable solution. - - - Walking through all MSI-X table entries (2048 max) to handle - SMP affinity of any match vector is an undesirable solution. - -5.3.4 API pci_enable_msix +5.3.2 API pci_enable_msix int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) @@ -339,7 +278,7 @@ a failure. This failure may be a result of duplicate entries specified in second argument, or a result of no available vector, or a result of failing to initialize MSI-X table entries. -5.3.5 API pci_disable_msix +5.3.3 API pci_disable_msix void pci_disable_msix(struct pci_dev *dev) @@ -349,7 +288,7 @@ always call free_irq() on all MSI-X vectors it has done request_irq() on before calling this API. Failure to do so results in a BUG_ON() and a device will be left with MSI-X enabled and leaks its vectors. -5.3.6 MSI-X mode vs. legacy mode diagram +5.3.4 MSI-X mode vs. legacy mode diagram The below diagram shows the events which switch the interrupt mode on the MSI-X capable device function between MSI-X mode and @@ -407,7 +346,7 @@ between MSI mod MSI-X mode during a run-time. MSI/MSI-X support requires support from both system hardware and individual hardware device functions. -5.5.1 System hardware support +5.5.1 Required x86 hardware support Since the target of MSI address is the local APIC CPU, enabling MSI/MSI-X support in the Linux kernel is dependent on whether existing From 5b1ea82fa245d4be6409cdba7e522ecb0b966b3c Mon Sep 17 00:00:00 2001 From: Juha Laiho Date: Thu, 13 Sep 2007 21:21:34 +0300 Subject: [PATCH 23/37] PCI: i386: Compaq EVO N800c needs PCI bus renumbering Force PCI bus renumbering for Compaq EVO N800c laptop, in order to get the cardbus slot recognised. Signed-off-by: Juha Laiho Signed-off-by: Greg Kroah-Hartman --- arch/x86/pci/common.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 07d5223442bf..7c4d75e3c5f3 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -287,6 +287,16 @@ static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), }, }, +#ifdef __i386__ + { + .callback = assign_all_busses, + .ident = "Compaq EVO N800c", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), + DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"), + }, + }, +#endif {} }; From a56bc69a182f501582557af7fad5bc882b1c856c Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Fri, 14 Sep 2007 15:33:13 +1000 Subject: [PATCH 24/37] PCI: Fix incorrect argument order to list_add_tail() in PCI dynamic ID code The code for dynamically assigning new ids to PCI drivers, store_new_id(), calls list_add_tail() with the list head and new node arguments in reversed order. The result is that every new id written essentially overwrites the previous list of ids. Caught with the help of Rusty's "horribly bad" list_node patch: http://lkml.org/lkml/2007/6/10/10 Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman --- drivers/pci/pci-driver.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index 004bc2487270..c43ecedce673 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c @@ -54,7 +54,6 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count) if (!dynid) return -ENOMEM; - INIT_LIST_HEAD(&dynid->node); dynid->id.vendor = vendor; dynid->id.device = device; dynid->id.subvendor = subvendor; @@ -65,7 +64,7 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count) driver_data : 0UL; spin_lock(&pdrv->dynids.lock); - list_add_tail(&pdrv->dynids.list, &dynid->node); + list_add_tail(&dynid->node, &pdrv->dynids.list); spin_unlock(&pdrv->dynids.lock); if (get_driver(&pdrv->driver)) { From cbf5d9e6b9bcf03291cbb51db144b3e2773a8a2d Mon Sep 17 00:00:00 2001 From: Roland Dreier Date: Wed, 3 Oct 2007 11:15:11 -0700 Subject: [PATCH 25/37] MSI: Use correct data offset for 32-bit MSI in read_msi_msg() While reading the MSI code trying to find a reason why MSI wouldn't work for devices that have a 32-bit MSI address capability, I noticed that read_msi_msg() seems to read the message data from the wrong offset in this case. Signed-off-by: Roland Dreier Acked-by: Eric W. Biederman Cc: stable Signed-off-by: Greg Kroah-Hartman --- drivers/pci/msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index be1df85e5e2d..87e01615053d 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -132,7 +132,7 @@ void read_msi_msg(unsigned int irq, struct msi_msg *msg) pci_read_config_word(dev, msi_data_reg(pos, 1), &data); } else { msg->address_hi = 0; - pci_read_config_word(dev, msi_data_reg(pos, 1), &data); + pci_read_config_word(dev, msi_data_reg(pos, 0), &data); } msg->data = data; break; From fd6e732186ab522c812ab19c2c5e5befb8ec8115 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Tue, 2 Oct 2007 14:19:23 -0700 Subject: [PATCH 26/37] PCI: fix IDE legacy mode resources I got the following error on MIPS Cobalt. PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1 pata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno=-16) PCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1 pata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno=-16) pata_via 0000:00:09.1: no available native port The legacy mode IDE resources set the following order. pci_setup_device() Legacy mode ATA controllers have fixed addresses. IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376 | V pcibios_fixup_bus() MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources. pcibios_fixup_bus() fix PCI bus regions. 0x1F0 - 0x10000000 = 0xF00001F0 | V ata_pci_init_one() PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1 In some architectures, PCI bus regions have the offset from PCI resources. For this reason, pci_setup_device() should set PCI bus regions to dev->resource[]. [akpm@linux-foundation.org: use struct initialiser] Signed-off-by: Yoichi Yuasa Cc: Alan Cox Cc: Greg KH Cc: Bartlomiej Zolnierkiewicz Cc: Ralf Baechle Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- drivers/pci/probe.c | 48 +++++++++++++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 12 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 171ca712e523..40e571d3c392 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -744,22 +744,46 @@ static int pci_setup_device(struct pci_dev * dev) */ if (class == PCI_CLASS_STORAGE_IDE) { u8 progif; + struct pci_bus_region region; + pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); if ((progif & 1) == 0) { - dev->resource[0].start = 0x1F0; - dev->resource[0].end = 0x1F7; - dev->resource[0].flags = LEGACY_IO_RESOURCE; - dev->resource[1].start = 0x3F6; - dev->resource[1].end = 0x3F6; - dev->resource[1].flags = LEGACY_IO_RESOURCE; + struct resource resource = { + .start = 0x1F0, + .end = 0x1F7, + .flags = LEGACY_IO_RESOURCE, + }; + + pcibios_resource_to_bus(dev, ®ion, &resource); + dev->resource[0].start = region.start; + dev->resource[0].end = region.end; + dev->resource[0].flags = resource.flags; + resource.start = 0x3F6; + resource.end = 0x3F6; + resource.flags = LEGACY_IO_RESOURCE; + pcibios_resource_to_bus(dev, ®ion, &resource); + dev->resource[1].start = region.start; + dev->resource[1].end = region.end; + dev->resource[1].flags = resource.flags; } if ((progif & 4) == 0) { - dev->resource[2].start = 0x170; - dev->resource[2].end = 0x177; - dev->resource[2].flags = LEGACY_IO_RESOURCE; - dev->resource[3].start = 0x376; - dev->resource[3].end = 0x376; - dev->resource[3].flags = LEGACY_IO_RESOURCE; + struct resource resource = { + .start = 0x170, + .end = 0x177, + .flags = LEGACY_IO_RESOURCE, + }; + + pcibios_resource_to_bus(dev, ®ion, &resource); + dev->resource[2].start = region.start; + dev->resource[2].end = region.end; + dev->resource[2].flags = resource.flags; + resource.start = 0x376; + resource.end = 0x376; + resource.flags = LEGACY_IO_RESOURCE; + pcibios_resource_to_bus(dev, ®ion, &resource); + dev->resource[3].start = region.start; + dev->resource[3].end = region.end; + dev->resource[3].flags = resource.flags; } } break; From 7f785763660e75c9eddaddea3d618696af4ae3a2 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Fri, 5 Oct 2007 13:17:58 -0700 Subject: [PATCH 27/37] pci: implement "pci=noaer" For cases in which CONFIG_PCIEAER=y (such as distro kernels), allow users to disable PCIE Advanced Error Reporting by using "pci=noaer" on the kernel command line. This can be used to work around hardware or (kernel) software problems. Signed-off-by: Randy Dunlap Signed-off-by: Greg Kroah-Hartman --- Documentation/kernel-parameters.txt | 4 ++++ drivers/pci/pci.c | 2 ++ drivers/pci/pci.h | 6 ++++++ drivers/pci/pcie/aer/aerdrv.c | 9 +++++++++ 4 files changed, 21 insertions(+) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index a57c1f216b21..3f0173f45019 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -68,6 +68,7 @@ parameter is applicable: PARIDE The ParIDE (parallel port IDE) subsystem is enabled. PARISC The PA-RISC architecture is enabled. PCI PCI bus support is enabled. + PCIE PCI Express support is enabled. PCMCIA The PCMCIA subsystem is enabled. PNP Plug & Play support is enabled. PPC PowerPC architecture is enabled. @@ -1270,6 +1271,9 @@ and is between 256 and 4096 characters. It is defined in the file Mechanism 1. conf2 [X86-32] Force use of PCI Configuration Mechanism 2. + noaer [PCIE] If the PCIEAER kernel config parameter is + enabled, this kernel boot option can be used to + disable the use of PCIE advanced error reporting. nommconf [X86-32,X86_64] Disable use of MMCONFIG for PCI Configuration nomsi [MSI] If the PCI_MSI kernel config parameter is diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 19a64a36ecab..2dd5c282fabe 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1586,6 +1586,8 @@ static int __devinit pci_setup(char *str) if (*str && (str = pcibios_setup(str)) && *str) { if (!strcmp(str, "nomsi")) { pci_no_msi(); + } else if (!strcmp(str, "noaer")) { + pci_no_aer(); } else if (!strncmp(str, "cbiosize=", 9)) { pci_cardbus_io_size = memparse(str + 9, &str); } else if (!strncmp(str, "cbmemsize=", 10)) { diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 4c36e80f6d26..5360d73d4941 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -52,6 +52,12 @@ void pci_restore_msi_state(struct pci_dev *dev); static inline void pci_restore_msi_state(struct pci_dev *dev) {} #endif +#ifdef CONFIG_PCIEAER +void pci_no_aer(void); +#else +static inline void pci_no_aer(void) { } +#endif + static inline int pci_no_d1d2(struct pci_dev *dev) { unsigned int parent_dstates = 0; diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index ad90a01b0dfc..7a62f7dd9009 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c @@ -81,6 +81,13 @@ static struct pcie_port_service_driver aerdriver = { .reset_link = aer_root_reset, }; +static int pcie_aer_disable; + +void pci_no_aer(void) +{ + pcie_aer_disable = 1; /* has priority over 'forceload' */ +} + /** * aer_irq - Root Port's ISR * @irq: IRQ assigned to Root Port @@ -327,6 +334,8 @@ static void aer_error_resume(struct pci_dev *dev) **/ static int __init aer_service_init(void) { + if (pcie_aer_disable) + return -ENXIO; return pcie_port_service_register(&aerdriver); } From cd68602f36ceb65b24a9abcae10ca04a933c07fd Mon Sep 17 00:00:00 2001 From: David Rientjes Date: Thu, 27 Sep 2007 13:41:16 -0700 Subject: [PATCH 28/37] pci: use size stored in proc_dir_entry for proc bus files On pci_proc_attach_device(), the size of the PCI configuration space is stored in the proc_dir_entry as the size of the file. Thus, the procfs interface to PCI devices should use it instead of the device directly. Signed-off-by: David Rientjes Signed-off-by: Greg Kroah-Hartman --- drivers/pci/proc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 90adc62d07ff..73714db6995e 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c @@ -60,7 +60,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp */ if (capable(CAP_SYS_ADMIN)) - size = dev->cfg_size; + size = dp->size; else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) size = 128; else @@ -133,7 +133,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof const struct proc_dir_entry *dp = PDE(ino); struct pci_dev *dev = dp->data; int pos = *ppos; - int size = dev->cfg_size; + int size = dp->size; int cnt; if (pos >= size) From ecb3908046ce9ce7feb44e2c2cf77ccdbe231f70 Mon Sep 17 00:00:00 2001 From: David Rientjes Date: Thu, 27 Sep 2007 13:41:17 -0700 Subject: [PATCH 29/37] pci: write file size to inode on proc bus file write When a /proc/bus/pci file is written to, the size of that PCI device's configuration space must be written to the inode. Otherwise, it is possible for the file to specify a size of 0 on stat if a task is holding the same file open. Signed-off-by: David Rientjes Signed-off-by: Greg Kroah-Hartman --- drivers/pci/proc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 73714db6995e..716439e25dd2 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c @@ -129,7 +129,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos) { - const struct inode *ino = file->f_path.dentry->d_inode; + struct inode *ino = file->f_path.dentry->d_inode; const struct proc_dir_entry *dp = PDE(ino); struct pci_dev *dev = dp->data; int pos = *ppos; @@ -193,6 +193,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof } *ppos = pos; + i_size_write(ino, dp->size); return nbytes; } From 8fa5913d54f3b1e09948e6a0db34da887e05ff1f Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Wed, 3 Oct 2007 15:55:51 -0700 Subject: [PATCH 30/37] PCI: remove transparent bridge sizing Remove transparent bridge sizing. Due to code in pci_read_bridge_bases() [drivers/pci/probe.c] the child bus of a transparent bridge already has access to the parent bus resources so transparent bridge sizing appears unnecessary. The bridge sizing includes alignment and granularity adjustments that can cause significantly more memory to be reserved from the parant bus than required by devices on the child bus and allotted by _CRS. Signed-off-by: Gary Hade Signed-off-by: Greg Kroah-Hartman --- drivers/pci/setup-bus.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 5e5191ec8de6..401e03c920bd 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -472,7 +472,12 @@ void pci_bus_size_bridges(struct pci_bus *bus) break; case PCI_CLASS_BRIDGE_PCI: + /* don't size subtractive decoding (transparent) + * PCI-to-PCI bridges */ + if (bus->self->transparent) + break; pci_bridge_check_ranges(bus); + /* fall through */ default: pbus_size_io(bus); /* If the bridge supports prefetchable range, size it From 036fff4cf732c4d69f99a2915924935705744b00 Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Wed, 3 Oct 2007 15:56:14 -0700 Subject: [PATCH 31/37] PCI: skip ISA ioresource alignment on some systems Skip ISA ioresource alignment on some systems To conserve limited PCI i/o resource on some IBM multi-node systems, the BIOS allocates (via _CRS) and expects the kernel to use addresses in ranges currently excluded by pcibios_align_resource() [i386/pci/i386.c]. This change allows the kernel to use the currently excluded address ranges on the IBM x3800, x3850, and x3950. Signed-off-by: Gary Hade Signed-off-by: Greg Kroah-Hartman --- arch/x86/pci/acpi.c | 42 ++++++++++++++++++++++++++++++++++++++++++ arch/x86/pci/i386.c | 13 +++++++++++++ arch/x86/pci/pci.h | 1 + drivers/pci/probe.c | 4 ++-- 4 files changed, 58 insertions(+), 2 deletions(-) diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index bc8a44bddaa7..1dd6f3fc077d 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -2,15 +2,57 @@ #include #include #include +#include #include #include "pci.h" +static int __devinit can_skip_ioresource_align(struct dmi_system_id *d) +{ + pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; + printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident); + return 0; +} + +static struct dmi_system_id acpi_pciprobe_dmi_table[] = { +/* + * Systems where PCI IO resource ISA alignment can be skipped + * when the ISA enable bit in the bridge control is not set + */ + { + .callback = can_skip_ioresource_align, + .ident = "IBM System x3800", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "IBM"), + DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), + }, + }, + { + .callback = can_skip_ioresource_align, + .ident = "IBM System x3850", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "IBM"), + DMI_MATCH(DMI_PRODUCT_NAME, "x3850"), + }, + }, + { + .callback = can_skip_ioresource_align, + .ident = "IBM System x3950", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "IBM"), + DMI_MATCH(DMI_PRODUCT_NAME, "x3950"), + }, + }, + {} +}; + struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) { struct pci_bus *bus; struct pci_sysdata *sd; int pxm; + dmi_check_system(acpi_pciprobe_dmi_table); + /* Allocate per-root-bus (not per bus) arch-specific data. * TODO: leak; this memory is never freed. * It's arguable whether it's worth the trouble to care. diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index bcd2f94b732c..055187bc255a 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -33,6 +33,15 @@ #include "pci.h" +static int +skip_isa_ioresource_align(struct pci_dev *dev) { + + if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) && + (dev->bus->bridge_ctl & PCI_BRIDGE_CTL_NO_ISA)) + return 1; + return 0; +} + /* * We need to avoid collisions with `mirrored' VGA ports * and other strange ISA hardware, so we always want the @@ -50,9 +59,13 @@ void pcibios_align_resource(void *data, struct resource *res, resource_size_t size, resource_size_t align) { + struct pci_dev *dev = data; + if (res->flags & IORESOURCE_IO) { resource_size_t start = res->start; + if (skip_isa_ioresource_align(dev)) + return; if (start & 0x300) { start = (start + 0x3ff) & ~0x3ff; res->start = start; diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h index 8c66f275756f..057f335fa3f6 100644 --- a/arch/x86/pci/pci.h +++ b/arch/x86/pci/pci.h @@ -26,6 +26,7 @@ #define PCI_ASSIGN_ROMS 0x1000 #define PCI_BIOS_IRQ_SCAN 0x2000 #define PCI_ASSIGN_ALL_BUSSES 0x4000 +#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 extern unsigned int pci_probe; extern unsigned long pirq_table_addr; diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 40e571d3c392..59d6c3092812 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -544,7 +544,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass goto out; child->primary = buses & 0xFF; child->subordinate = (buses >> 16) & 0xFF; - child->bridge_ctl = bctl; + child->bridge_ctl = bctl ^ PCI_BRIDGE_CTL_NO_ISA; cmax = pci_scan_child_bus(child); if (cmax > max) @@ -597,7 +597,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); if (!is_cardbus) { - child->bridge_ctl = bctl | PCI_BRIDGE_CTL_NO_ISA; + child->bridge_ctl = bctl ^ PCI_BRIDGE_CTL_NO_ISA; /* * Adjust subordinate busnr in parent buses. * We do this before scanning for children because From fd64cb4606cbdd592b7119e82341d4ae5b56f2cc Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Wed, 3 Oct 2007 15:56:30 -0700 Subject: [PATCH 32/37] PCI: avoid P2P prefetch window for expansion ROMs Avoid creating P2P prefetch window for expansion ROMs Because of the future possibility that P2P prefetch windows will contain address ranges above 4GB some BIOSes are providing space in the P2P non-prefetch windows for expansion ROMs. This is due to expansion ROM BAR 32-bit limitation. When expansion ROM BARs without BIOS assigned address(es) are currently found behind a P2P bridge, the kernel attempts to create a P2P prefetch window for them even though space for them has already been provided in the non-prefetch window. _CRS on some systems with certain resource conservation conscious BIOSes may not provide the extra 1MB or more memory resource needed for the expansion ROM motivated prefetch window causing resource allocation errors. This change corrects the problem by removing IORESOURCE_PREFETCH from the expansion ROM flags initialization. It also removes IORESOURCE_CACHEABLE which seems inappropriate if only non-cacheable memory is available. Signed-off-by: Gary Hade Signed-off-by: Greg Kroah-Hartman --- drivers/pci/probe.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 59d6c3092812..3112024bdc2a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -276,8 +276,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK); if (sz) { res->flags = (l & IORESOURCE_ROM_ENABLE) | - IORESOURCE_MEM | IORESOURCE_PREFETCH | - IORESOURCE_READONLY | IORESOURCE_CACHEABLE; + IORESOURCE_MEM | IORESOURCE_READONLY; res->start = l & PCI_ROM_ADDRESS_MASK; res->end = res->start + (unsigned long) sz; } From 62f420f828249f686aaae949ac3439d1304a759a Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Wed, 3 Oct 2007 15:56:51 -0700 Subject: [PATCH 33/37] PCI: use _CRS for PCI resource allocation Use _CRS for PCI resource allocation This patch resolves an issue where incorrect PCI memory and i/o ranges are being assigned to hotplugged PCI devices on some IBM systems. The resource mis-allocation not only makes the PCI device unuseable but often makes the entire system unuseable due to resulting machine checks. The hotplug capable PCI slots on the affected systems are not located under a standard P2P bridge but are instead located under PCI root bridges or subtractive decode P2P bridges. For example, the IBM x3850 contains 2 hotplug capable PCI-X slots and 4 hotplug capable PCIe slots with the PCI-X slots each located under a PCI root bridge and the PCIe slots each located under a subtractive decode P2P bridge. The current i386/x86_64 PCI resource allocation code does not use _CRS returned resource information. No other resource information source is available for slots that are not below a standard P2P bridge so incorrect ranges are being allocated from e820 hole causing the bad result. This patch causes the kernel to use _CRS returned resource info. It is roughly based on a change provided by Matthew Wilcox for the ia64 kernel in 2005. Due to possible buggy BIOS factor and possible yet to be discovered kernel issues the function is disabled by default and can be enabled with pci=use_crs. Signed-off-by: Gary Hade Signed-off-by: Greg Kroah-Hartman --- Documentation/kernel-parameters.txt | 2 + arch/x86/pci/acpi.c | 139 ++++++++++++++++++++++++++++ arch/x86/pci/common.c | 3 + arch/x86/pci/pci.h | 1 + 4 files changed, 145 insertions(+) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 3f0173f45019..e9acd5540d29 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1318,6 +1318,8 @@ and is between 256 and 4096 characters. It is defined in the file IRQ routing is enabled. noacpi [X86-32] Do not use ACPI for IRQ routing or for PCI scanning. + use_crs [X86-32] Use _CRS for PCI resource + allocation. routeirq Do IRQ routing for all PCI devices. This is normally done in pci_enable_device(), so this option is a temporary workaround diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 1dd6f3fc077d..c6fd3a6afa42 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -45,6 +45,142 @@ static struct dmi_system_id acpi_pciprobe_dmi_table[] = { {} }; +struct pci_root_info { + char *name; + unsigned int res_num; + struct resource *res; + struct pci_bus *bus; + int busnum; +}; + +static acpi_status +resource_to_addr(struct acpi_resource *resource, + struct acpi_resource_address64 *addr) +{ + acpi_status status; + + status = acpi_resource_to_address64(resource, addr); + if (ACPI_SUCCESS(status) && + (addr->resource_type == ACPI_MEMORY_RANGE || + addr->resource_type == ACPI_IO_RANGE) && + addr->address_length > 0 && + addr->producer_consumer == ACPI_PRODUCER) { + return AE_OK; + } + return AE_ERROR; +} + +static acpi_status +count_resource(struct acpi_resource *acpi_res, void *data) +{ + struct pci_root_info *info = data; + struct acpi_resource_address64 addr; + acpi_status status; + + status = resource_to_addr(acpi_res, &addr); + if (ACPI_SUCCESS(status)) + info->res_num++; + return AE_OK; +} + +static acpi_status +setup_resource(struct acpi_resource *acpi_res, void *data) +{ + struct pci_root_info *info = data; + struct resource *res; + struct acpi_resource_address64 addr; + acpi_status status; + unsigned long flags; + struct resource *root; + + status = resource_to_addr(acpi_res, &addr); + if (!ACPI_SUCCESS(status)) + return AE_OK; + + if (addr.resource_type == ACPI_MEMORY_RANGE) { + root = &iomem_resource; + flags = IORESOURCE_MEM; + if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY) + flags |= IORESOURCE_PREFETCH; + } else if (addr.resource_type == ACPI_IO_RANGE) { + root = &ioport_resource; + flags = IORESOURCE_IO; + } else + return AE_OK; + + res = &info->res[info->res_num]; + res->name = info->name; + res->flags = flags; + res->start = addr.minimum + addr.translation_offset; + res->end = res->start + addr.address_length - 1; + res->child = NULL; + + if (insert_resource(root, res)) { + printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx " + "from %s for %s\n", (unsigned long) res->start, + (unsigned long) res->end, root->name, info->name); + } else { + info->bus->resource[info->res_num] = res; + info->res_num++; + } + return AE_OK; +} + +static void +adjust_transparent_bridge_resources(struct pci_bus *bus) +{ + struct pci_dev *dev; + + list_for_each_entry(dev, &bus->devices, bus_list) { + int i; + u16 class = dev->class >> 8; + + if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent) { + for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++) + dev->subordinate->resource[i] = + dev->bus->resource[i - 3]; + } + } +} + +static void +get_current_resources(struct acpi_device *device, int busnum, + struct pci_bus *bus) +{ + struct pci_root_info info; + size_t size; + + info.bus = bus; + info.res_num = 0; + acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, + &info); + if (!info.res_num) + return; + + size = sizeof(*info.res) * info.res_num; + info.res = kmalloc(size, GFP_KERNEL); + if (!info.res) + goto res_alloc_fail; + + info.name = kmalloc(12, GFP_KERNEL); + if (!info.name) + goto name_alloc_fail; + sprintf(info.name, "PCI Bus #%02x", busnum); + + info.res_num = 0; + acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, + &info); + if (info.res_num) + adjust_transparent_bridge_resources(bus); + + return; + +name_alloc_fail: + kfree(info.res); +res_alloc_fail: + return; +} + struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) { struct pci_bus *bus; @@ -89,6 +225,9 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do } } #endif + + if (bus && (pci_probe & PCI_USE__CRS)) + get_current_resources(device, busnum, bus); return bus; } diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 7c4d75e3c5f3..7d6a9a5aa7cd 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -436,6 +436,9 @@ char * __devinit pcibios_setup(char *str) } else if (!strcmp(str, "assign-busses")) { pci_probe |= PCI_ASSIGN_ALL_BUSSES; return NULL; + } else if (!strcmp(str, "use_crs")) { + pci_probe |= PCI_USE__CRS; + return NULL; } else if (!strcmp(str, "routeirq")) { pci_routeirq = 1; return NULL; diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h index 057f335fa3f6..ac56d3916c50 100644 --- a/arch/x86/pci/pci.h +++ b/arch/x86/pci/pci.h @@ -27,6 +27,7 @@ #define PCI_BIOS_IRQ_SCAN 0x2000 #define PCI_ASSIGN_ALL_BUSSES 0x4000 #define PCI_CAN_SKIP_ISA_ALIGN 0x8000 +#define PCI_USE__CRS 0x10000 extern unsigned int pci_probe; extern unsigned long pirq_table_addr; From 11949255d9433ea6c0908b7390ec4faecd1d4cf0 Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Mon, 8 Oct 2007 16:24:16 -0700 Subject: [PATCH 34/37] PCI: modify PCI bridge control ISA flag for clarity Modify PCI Bridge Control ISA flag for clarity This patch changes PCI_BRIDGE_CTL_NO_ISA to PCI_BRIDGE_CTL_ISA and modifies it's clarifying comment and locations where used. The change reduces the chance of future confusion since it makes the set/unset meaning of the bit the same in both the bridge control register and bridge_ctl field of the pci_bus struct. Signed-off-by: Gary Hade Acked-by: Linas Vepstas Cc: Ivan Kokshaysky Signed-off-by: Greg Kroah-Hartman --- arch/x86/pci/i386.c | 2 +- drivers/pci/probe.c | 4 ++-- include/linux/pci_regs.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 055187bc255a..42ba0e2da1a0 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -37,7 +37,7 @@ static int skip_isa_ioresource_align(struct pci_dev *dev) { if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) && - (dev->bus->bridge_ctl & PCI_BRIDGE_CTL_NO_ISA)) + !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA)) return 1; return 0; } diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 3112024bdc2a..5db6b6690b59 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -543,7 +543,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass goto out; child->primary = buses & 0xFF; child->subordinate = (buses >> 16) & 0xFF; - child->bridge_ctl = bctl ^ PCI_BRIDGE_CTL_NO_ISA; + child->bridge_ctl = bctl; cmax = pci_scan_child_bus(child); if (cmax > max) @@ -596,7 +596,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); if (!is_cardbus) { - child->bridge_ctl = bctl ^ PCI_BRIDGE_CTL_NO_ISA; + child->bridge_ctl = bctl; /* * Adjust subordinate busnr in parent buses. * We do this before scanning for children because diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 4a24ee368a11..c1914a8b94a9 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -147,7 +147,7 @@ #define PCI_BRIDGE_CONTROL 0x3e #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ -#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ +#define PCI_BRIDGE_CTL_ISA 0x04 /* Enable ISA mode */ #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ From 32a2eea795643929a43cbbba00d8c4a176b309bf Mon Sep 17 00:00:00 2001 From: Jeff Garzik Date: Thu, 11 Oct 2007 16:57:27 -0400 Subject: [PATCH 35/37] PCI: Add 'nodomains' boot option, and pci_domains_supported global * Introduce pci_domains_supported global, hardcoded to zero if !CONFIG_PCI_DOMAINS. * Introduce 'nodomains' boot option, which clears pci_domains_supported on platforms that enable it by default (x86, x86-64, and others when they are converted to use this). Signed-off-by: Jeff Garzik Cc: Andi Kleen Signed-off-by: Greg Kroah-Hartman --- Documentation/kernel-parameters.txt | 2 ++ drivers/pci/pci.c | 13 +++++++++++++ include/linux/pci.h | 7 +++++-- 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index e9acd5540d29..d006e8b66ffa 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1274,6 +1274,8 @@ and is between 256 and 4096 characters. It is defined in the file noaer [PCIE] If the PCIEAER kernel config parameter is enabled, this kernel boot option can be used to disable the use of PCIE advanced error reporting. + nodomains [PCI] Disable support for multiple PCI + root domains (aka PCI segments, in ACPI-speak). nommconf [X86-32,X86_64] Disable use of MMCONFIG for PCI Configuration nomsi [MSI] If the PCI_MSI kernel config parameter is diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 2dd5c282fabe..728b3c863d87 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -23,6 +23,10 @@ unsigned int pci_pm_d3_delay = 10; +#ifdef CONFIG_PCI_DOMAINS +int pci_domains_supported = 1; +#endif + #define DEFAULT_CARDBUS_IO_SIZE (256) #define DEFAULT_CARDBUS_MEM_SIZE (64*1024*1024) /* pci=cbmemsize=nnM,cbiosize=nn can override this */ @@ -1567,6 +1571,13 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +static void __devinit pci_no_domains(void) +{ +#ifdef CONFIG_PCI_DOMAINS + pci_domains_supported = 0; +#endif +} + static int __devinit pci_init(void) { struct pci_dev *dev = NULL; @@ -1588,6 +1599,8 @@ static int __devinit pci_setup(char *str) pci_no_msi(); } else if (!strcmp(str, "noaer")) { pci_no_aer(); + } else if (!strcmp(str, "nodomains")) { + pci_no_domains(); } else if (!strncmp(str, "cbiosize=", 9)) { pci_cardbus_io_size = memparse(str + 9, &str); } else if (!strncmp(str, "cbmemsize=", 10)) { diff --git a/include/linux/pci.h b/include/linux/pci.h index 038a0dc7273a..768b93359f90 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -685,13 +685,16 @@ extern void pci_unblock_user_cfg_access(struct pci_dev *dev); * a PCI domain is defined to be a set of PCI busses which share * configuration space. */ -#ifndef CONFIG_PCI_DOMAINS +#ifdef CONFIG_PCI_DOMAINS +extern int pci_domains_supported; +#else +enum { pci_domains_supported = 0 }; static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } -#endif +#endif /* CONFIG_PCI_DOMAINS */ #else /* CONFIG_PCI is not enabled */ From a79e4198d1effbba040e9bf407a95fc9b3418789 Mon Sep 17 00:00:00 2001 From: Jeff Garzik Date: Thu, 11 Oct 2007 16:58:30 -0400 Subject: [PATCH 36/37] PCI: X86: Introduce and enable PCI domain support * fix bug in pci_read() and pci_write() which prevented PCI domain support from working (hardcoded domain 0). * unconditionally enable CONFIG_PCI_DOMAINS * implement pci_domain_nr() and pci_proc_domain(), as required of all arches when CONFIG_PCI_DOMAINS is enabled. * store domain in struct pci_sysdata, as assigned by ACPI * support "pci=nodomains" Signed-off-by: Jeff Garzik Cc: Andi Kleen Signed-off-by: Greg Kroah-Hartman --- arch/i386/Kconfig | 5 +++++ arch/x86/pci/acpi.c | 13 +++++++------ arch/x86/pci/common.c | 6 ++++-- arch/x86_64/Kconfig | 5 +++++ include/asm-x86/pci_32.h | 12 ++++++++++++ include/asm-x86/pci_64.h | 12 ++++++++++++ 6 files changed, 45 insertions(+), 8 deletions(-) diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index 2d85e4b87307..515abb98d41d 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig @@ -1137,6 +1137,11 @@ config PCI_MMCONFIG depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY) default y +config PCI_DOMAINS + bool + depends on PCI + default y + source "drivers/pci/pcie/Kconfig" source "drivers/pci/Kconfig" diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index c6fd3a6afa42..27a391da9a98 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -189,6 +189,12 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do dmi_check_system(acpi_pciprobe_dmi_table); + if (domain && !pci_domains_supported) { + printk(KERN_WARNING "PCI: Multiple domains not supported " + "(dom %d, bus %d)\n", domain, busnum); + return NULL; + } + /* Allocate per-root-bus (not per bus) arch-specific data. * TODO: leak; this memory is never freed. * It's arguable whether it's worth the trouble to care. @@ -199,12 +205,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do return NULL; } - if (domain != 0) { - printk(KERN_WARNING "PCI: Multiple domains not supported\n"); - kfree(sd); - return NULL; - } - + sd->domain = domain; sd->node = -1; pxm = acpi_get_pxm(device->handle); diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 7d6a9a5aa7cd..2d71bbc411d2 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -29,12 +29,14 @@ struct pci_raw_ops *raw_pci_ops; static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) { - return raw_pci_ops->read(0, bus->number, devfn, where, size, value); + return raw_pci_ops->read(pci_domain_nr(bus), bus->number, + devfn, where, size, value); } static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) { - return raw_pci_ops->write(0, bus->number, devfn, where, size, value); + return raw_pci_ops->write(pci_domain_nr(bus), bus->number, + devfn, where, size, value); } struct pci_ops pci_root_ops = { diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig index b1b98e614f7c..04d324cc72d8 100644 --- a/arch/x86_64/Kconfig +++ b/arch/x86_64/Kconfig @@ -724,6 +724,11 @@ config PCI_MMCONFIG bool "Support mmconfig PCI config space access" depends on PCI && ACPI +config PCI_DOMAINS + bool + depends on PCI + default y + source "drivers/pci/pcie/Kconfig" source "drivers/pci/Kconfig" diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h index 4fcacc711385..0d91605cd1e2 100644 --- a/include/asm-x86/pci_32.h +++ b/include/asm-x86/pci_32.h @@ -5,12 +5,24 @@ #ifdef __KERNEL__ struct pci_sysdata { + int domain; /* PCI domain */ int node; /* NUMA node */ }; /* scan a bus after allocating a pci_sysdata for it */ extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); +static inline int pci_domain_nr(struct pci_bus *bus) +{ + struct pci_sysdata *sd = bus->sysdata; + return sd->domain; +} + +static inline int pci_proc_domain(struct pci_bus *bus) +{ + return pci_domain_nr(bus); +} + #include /* for struct page */ /* Can be used to override the logic in pci_scan_bus for skipping diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h index 5da8cb0c0599..0a123d6a820f 100644 --- a/include/asm-x86/pci_64.h +++ b/include/asm-x86/pci_64.h @@ -6,12 +6,24 @@ #ifdef __KERNEL__ struct pci_sysdata { + int domain; /* PCI domain */ int node; /* NUMA node */ void* iommu; /* IOMMU private data */ }; extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); +static inline int pci_domain_nr(struct pci_bus *bus) +{ + struct pci_sysdata *sd = bus->sysdata; + return sd->domain; +} + +static inline int pci_proc_domain(struct pci_bus *bus) +{ + return pci_domain_nr(bus); +} + #ifdef CONFIG_CALGARY_IOMMU static inline void* pci_iommu(struct pci_bus *bus) { From f3e6f164c2389853432454c89b316a8ab7485e2f Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 12 Oct 2007 14:07:23 -0700 Subject: [PATCH 37/37] PCI: merge almost all of pci_32.h and pci_64.h together It was just duplicated code... Signed-off-by: Greg Kroah-Hartman --- include/asm-x86/pci.h | 90 ++++++++++++++++++++++++++++++++++++++++ include/asm-x86/pci_32.h | 70 ------------------------------- include/asm-x86/pci_64.h | 68 ------------------------------ 3 files changed, 90 insertions(+), 138 deletions(-) diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h index a8cac8c2cde7..e88361966347 100644 --- a/include/asm-x86/pci.h +++ b/include/asm-x86/pci.h @@ -1,5 +1,95 @@ +#ifndef __x86_PCI_H +#define __x86_PCI_H + +#include /* for struct page */ +#include +#include +#include +#include +#include + + +#ifdef __KERNEL__ + +struct pci_sysdata { + int domain; /* PCI domain */ + int node; /* NUMA node */ +#ifdef CONFIG_X86_64 + void* iommu; /* IOMMU private data */ +#endif +}; + +/* scan a bus after allocating a pci_sysdata for it */ +extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); + +static inline int pci_domain_nr(struct pci_bus *bus) +{ + struct pci_sysdata *sd = bus->sysdata; + return sd->domain; +} + +static inline int pci_proc_domain(struct pci_bus *bus) +{ + return pci_domain_nr(bus); +} + + +/* Can be used to override the logic in pci_scan_bus for skipping + already-configured bus numbers - to be used for buggy BIOSes + or architectures with incomplete PCI setup by the loader */ + +#ifdef CONFIG_PCI +extern unsigned int pcibios_assign_all_busses(void); +#else +#define pcibios_assign_all_busses() 0 +#endif +#define pcibios_scan_all_fns(a, b) 0 + +extern unsigned long pci_mem_start; +#define PCIBIOS_MIN_IO 0x1000 +#define PCIBIOS_MIN_MEM (pci_mem_start) + +#define PCIBIOS_MIN_CARDBUS_IO 0x4000 + +void pcibios_config_init(void); +struct pci_bus * pcibios_scan_root(int bus); + +void pcibios_set_master(struct pci_dev *dev); +void pcibios_penalize_isa_irq(int irq, int active); +struct irq_routing_table *pcibios_get_irq_routing_table(void); +int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); + + +#define HAVE_PCI_MMAP +extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, + enum pci_mmap_state mmap_state, int write_combine); + + +#ifdef CONFIG_PCI +static inline void pci_dma_burst_advice(struct pci_dev *pdev, + enum pci_dma_burst_strategy *strat, + unsigned long *strategy_parameter) +{ + *strat = PCI_DMA_BURST_INFINITY; + *strategy_parameter = ~0UL; +} +#endif + + +#endif /* __KERNEL__ */ + #ifdef CONFIG_X86_32 # include "pci_32.h" #else # include "pci_64.h" +#endif + +/* implement the pci_ DMA API in terms of the generic device dma_ one */ +#include + +/* generic pci stuff */ +#include + + + #endif diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h index 0d91605cd1e2..8c4c3a0368e2 100644 --- a/include/asm-x86/pci_32.h +++ b/include/asm-x86/pci_32.h @@ -4,62 +4,11 @@ #ifdef __KERNEL__ -struct pci_sysdata { - int domain; /* PCI domain */ - int node; /* NUMA node */ -}; - -/* scan a bus after allocating a pci_sysdata for it */ -extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); - -static inline int pci_domain_nr(struct pci_bus *bus) -{ - struct pci_sysdata *sd = bus->sysdata; - return sd->domain; -} - -static inline int pci_proc_domain(struct pci_bus *bus) -{ - return pci_domain_nr(bus); -} - -#include /* for struct page */ - -/* Can be used to override the logic in pci_scan_bus for skipping - already-configured bus numbers - to be used for buggy BIOSes - or architectures with incomplete PCI setup by the loader */ - -#ifdef CONFIG_PCI -extern unsigned int pcibios_assign_all_busses(void); -#else -#define pcibios_assign_all_busses() 0 -#endif -#define pcibios_scan_all_fns(a, b) 0 - -extern unsigned long pci_mem_start; -#define PCIBIOS_MIN_IO 0x1000 -#define PCIBIOS_MIN_MEM (pci_mem_start) - -#define PCIBIOS_MIN_CARDBUS_IO 0x4000 - -void pcibios_config_init(void); -struct pci_bus * pcibios_scan_root(int bus); - -void pcibios_set_master(struct pci_dev *dev); -void pcibios_penalize_isa_irq(int irq, int active); -struct irq_routing_table *pcibios_get_irq_routing_table(void); -int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); /* Dynamic DMA mapping stuff. * i386 has everything mapped statically. */ -#include -#include -#include -#include -#include - struct pci_dev; /* The PCI address space does equal the physical memory @@ -76,27 +25,8 @@ struct pci_dev; #define pci_unmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) -#define HAVE_PCI_MMAP -extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, int write_combine); - - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} -#endif #endif /* __KERNEL__ */ -/* implement the pci_ DMA API in terms of the generic device dma_ one */ -#include - -/* generic pci stuff */ -#include #endif /* __i386_PCI_H */ diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h index 0a123d6a820f..9baa46d9f594 100644 --- a/include/asm-x86/pci_64.h +++ b/include/asm-x86/pci_64.h @@ -1,28 +1,9 @@ #ifndef __x8664_PCI_H #define __x8664_PCI_H -#include #ifdef __KERNEL__ -struct pci_sysdata { - int domain; /* PCI domain */ - int node; /* NUMA node */ - void* iommu; /* IOMMU private data */ -}; - -extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); - -static inline int pci_domain_nr(struct pci_bus *bus) -{ - struct pci_sysdata *sd = bus->sysdata; - return sd->domain; -} - -static inline int pci_proc_domain(struct pci_bus *bus) -{ - return pci_domain_nr(bus); -} #ifdef CONFIG_CALGARY_IOMMU static inline void* pci_iommu(struct pci_bus *bus) @@ -38,40 +19,11 @@ static inline void set_pci_iommu(struct pci_bus *bus, void *val) } #endif /* CONFIG_CALGARY_IOMMU */ -#include /* for struct page */ -/* Can be used to override the logic in pci_scan_bus for skipping - already-configured bus numbers - to be used for buggy BIOSes - or architectures with incomplete PCI setup by the loader */ - -#ifdef CONFIG_PCI -extern unsigned int pcibios_assign_all_busses(void); -#else -#define pcibios_assign_all_busses() 0 -#endif -#define pcibios_scan_all_fns(a, b) 0 - -extern unsigned long pci_mem_start; -#define PCIBIOS_MIN_IO 0x1000 -#define PCIBIOS_MIN_MEM (pci_mem_start) - -#define PCIBIOS_MIN_CARDBUS_IO 0x4000 - -void pcibios_config_init(void); -struct pci_bus * pcibios_scan_root(int bus); extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); -void pcibios_set_master(struct pci_dev *dev); -void pcibios_penalize_isa_irq(int irq, int active); -struct irq_routing_table *pcibios_get_irq_routing_table(void); -int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); -#include -#include -#include -#include -#include extern void pci_iommu_alloc(void); extern int iommu_setup(char *opt); @@ -112,27 +64,7 @@ extern int iommu_setup(char *opt); #endif -#include - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} -#endif - -#define HAVE_PCI_MMAP -extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, int write_combine); - #endif /* __KERNEL__ */ -/* generic pci stuff */ -#ifdef CONFIG_PCI -#include -#endif #endif /* __x8664_PCI_H */