forked from Minki/linux
thermal: rockchip: add the notes for better reading
To update the notes for keeping in mind that quickly in case someone re-read this driver in the future. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -1,7 +1,5 @@
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/*
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/*
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* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
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* Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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* Caesar Wang <wxt@rock-chips.com>
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* Caesar Wang <wxt@rock-chips.com>
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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@ -75,7 +73,7 @@ enum adc_sort_mode {
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#define SOC_MAX_SENSORS 2
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#define SOC_MAX_SENSORS 2
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/**
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/**
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* struct chip_tsadc_table: hold information about chip-specific differences
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* struct chip_tsadc_table - hold information about chip-specific differences
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* @id: conversion table
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* @id: conversion table
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* @length: size of conversion table
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* @length: size of conversion table
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* @data_mask: mask to apply on data inputs
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* @data_mask: mask to apply on data inputs
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@ -88,6 +86,20 @@ struct chip_tsadc_table {
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enum adc_sort_mode mode;
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enum adc_sort_mode mode;
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};
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};
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/**
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* struct rockchip_tsadc_chip - hold the private data of tsadc chip
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* @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
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* @chn_num: the channel number of tsadc chip
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* @tshut_temp: the hardware-controlled shutdown temperature value
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* @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
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* @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
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* @initialize: SoC special initialize tsadc controller method
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* @irq_ack: clear the interrupt
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* @get_temp: get the temperature
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* @set_tshut_temp: set the hardware-controlled shutdown temperature
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* @set_tshut_mode: set the hardware-controlled shutdown mode
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* @table: the chip-specific conversion table
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*/
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struct rockchip_tsadc_chip {
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struct rockchip_tsadc_chip {
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/* The sensor id of chip correspond to the ADC channel */
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/* The sensor id of chip correspond to the ADC channel */
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int chn_id[SOC_MAX_SENSORS];
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int chn_id[SOC_MAX_SENSORS];
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@ -115,12 +127,32 @@ struct rockchip_tsadc_chip {
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struct chip_tsadc_table table;
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struct chip_tsadc_table table;
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};
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};
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/**
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* struct rockchip_thermal_sensor - hold the information of thermal sensor
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* @thermal: pointer to the platform/configuration data
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* @tzd: pointer to a thermal zone
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* @id: identifier of the thermal sensor
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*/
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struct rockchip_thermal_sensor {
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struct rockchip_thermal_sensor {
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struct rockchip_thermal_data *thermal;
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struct rockchip_thermal_data *thermal;
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struct thermal_zone_device *tzd;
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struct thermal_zone_device *tzd;
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int id;
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int id;
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};
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};
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/**
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* struct rockchip_thermal_data - hold the private data of thermal driver
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* @chip: pointer to the platform/configuration data
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* @pdev: platform device of thermal
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* @reset: the reset controller of tsadc
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* @sensors[SOC_MAX_SENSORS]: the thermal sensor
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* @clk: the controller clock is divided by the exteral 24MHz
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* @pclk: the advanced peripherals bus clock
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* @grf: the general register file will be used to do static set by software
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* @regs: the base address of tsadc controller
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* @tshut_temp: the hardware-controlled shutdown temperature value
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* @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
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* @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
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*/
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struct rockchip_thermal_data {
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struct rockchip_thermal_data {
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const struct rockchip_tsadc_chip *chip;
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const struct rockchip_tsadc_chip *chip;
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struct platform_device *pdev;
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struct platform_device *pdev;
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@ -160,12 +192,7 @@ struct rockchip_thermal_data {
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#define TSADCV2_AUTO_EN BIT(0)
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#define TSADCV2_AUTO_EN BIT(0)
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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/**
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* TSADCV1_AUTO_Q_SEL_EN:
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* whether select (1024 - tsadc_q) as output
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* 1'b0:use tsadc_q as output(temperature-code is rising sequence)
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* 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
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*/
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#define TSADCV3_AUTO_Q_SEL_EN BIT(1)
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#define TSADCV3_AUTO_Q_SEL_EN BIT(1)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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@ -193,18 +220,21 @@ struct rockchip_thermal_data {
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#define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
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#define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
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#define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
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#define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
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/**
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* struct tsadc_table - code to temperature conversion table
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* @code: the value of adc channel
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* @temp: the temperature
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* Note:
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* code to temperature mapping of the temperature sensor is a piece wise linear
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* curve.Any temperature, code faling between to 2 give temperatures can be
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* linearly interpolated.
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* Code to Temperature mapping should be updated based on manufacturer results.
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*/
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struct tsadc_table {
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struct tsadc_table {
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u32 code;
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u32 code;
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int temp;
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int temp;
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};
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};
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/**
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* Note:
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* Code to Temperature mapping of the Temperature sensor is a piece wise linear
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* curve.Any temperature, code faling between to 2 give temperatures can be
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* linearly interpolated.
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* Code to Temperature mapping should be updated based on sillcon results.
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*/
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static const struct tsadc_table rk3228_code_table[] = {
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static const struct tsadc_table rk3228_code_table[] = {
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{0, -40000},
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{0, -40000},
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{588, -40000},
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{588, -40000},
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@ -490,6 +520,7 @@ static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
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/**
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/**
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* rk_tsadcv3_initialize - initialize TASDC Controller.
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* rk_tsadcv3_initialize - initialize TASDC Controller.
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*
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* (1) The tsadc control power sequence.
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* (1) The tsadc control power sequence.
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*
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*
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* (2) Set TSADC_V2_AUTO_PERIOD:
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* (2) Set TSADC_V2_AUTO_PERIOD:
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@ -568,10 +599,11 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
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}
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}
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/**
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/**
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* @rk_tsadcv3_control:
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* rk_tsadcv3_control - the tsadc controller is enabled or disabled.
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* TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
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*
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* bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
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* NOTE: TSADC controller works at auto mode, and some SoCs need set the
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* setting this bit to enable.
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* tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
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* adc value if setting this bit to enable.
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*/
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*/
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static void rk_tsadcv3_control(void __iomem *regs, bool enable)
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static void rk_tsadcv3_control(void __iomem *regs, bool enable)
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{
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{
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