forked from Minki/linux
KVM: x86: Make register state after reset conform to specification
VMX behaves now as SVM wrt to FPU initialization. Code has been moved to generic code path. General-purpose registers are now cleared on reset and INIT. SVM code properly initializes EDX. Signed-off-by: Julian Stecklina <jsteckli@os.inf.tu-dresden.de> Signed-off-by: Gleb Natapov <gleb@redhat.com>
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2b3c5cbc0d
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66f7b72e11
@ -661,6 +661,7 @@ void kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
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} else
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*eax = *ebx = *ecx = *edx = 0;
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}
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EXPORT_SYMBOL_GPL(kvm_cpuid);
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void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
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{
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@ -20,6 +20,7 @@
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#include "mmu.h"
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#include "kvm_cache_regs.h"
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#include "x86.h"
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#include "cpuid.h"
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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@ -1193,6 +1194,8 @@ static void init_vmcb(struct vcpu_svm *svm)
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static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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u32 dummy;
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u32 eax = 1;
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init_vmcb(svm);
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@ -1201,8 +1204,9 @@ static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
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svm->vmcb->save.cs.base = svm->vcpu.arch.sipi_vector << 12;
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svm->vmcb->save.cs.selector = svm->vcpu.arch.sipi_vector << 8;
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}
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vcpu->arch.regs_avail = ~0;
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vcpu->arch.regs_dirty = ~0;
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kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy);
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kvm_register_write(vcpu, VCPU_REGS_RDX, eax);
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return 0;
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}
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@ -1259,10 +1263,6 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
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svm->asid_generation = 0;
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init_vmcb(svm);
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err = fx_init(&svm->vcpu);
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if (err)
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goto free_page4;
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svm->vcpu.arch.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
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if (kvm_vcpu_is_bsp(&svm->vcpu))
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svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;
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@ -1271,8 +1271,6 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
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return &svm->vcpu;
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free_page4:
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__free_page(hsave_page);
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free_page3:
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__free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER);
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free_page2:
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@ -3918,8 +3918,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
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u64 msr;
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int ret;
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vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
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vmx->rmode.vm86_active = 0;
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vmx->soft_vnmi_blocked = 0;
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@ -3931,10 +3929,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
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msr |= MSR_IA32_APICBASE_BSP;
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kvm_set_apic_base(&vmx->vcpu, msr);
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ret = fx_init(&vmx->vcpu);
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if (ret != 0)
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goto out;
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vmx_segment_cache_clear(vmx);
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seg_setup(VCPU_SREG_CS);
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@ -3975,7 +3969,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
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kvm_rip_write(vcpu, 0xfff0);
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else
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kvm_rip_write(vcpu, 0);
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kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
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vmcs_writel(GUEST_GDTR_BASE, 0);
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vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
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@ -4025,7 +4018,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
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/* HACK: Don't enable emulation on guest boot/reset */
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vmx->emulation_required = 0;
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out:
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return ret;
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}
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@ -6461,6 +6461,10 @@ static int kvm_vcpu_reset(struct kvm_vcpu *vcpu)
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kvm_pmu_reset(vcpu);
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memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
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vcpu->arch.regs_avail = ~0;
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vcpu->arch.regs_dirty = ~0;
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return kvm_x86_ops->vcpu_reset(vcpu);
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}
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@ -6629,11 +6633,17 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
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if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
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goto fail_free_mce_banks;
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r = fx_init(vcpu);
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if (r)
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goto fail_free_wbinvd_dirty_mask;
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vcpu->arch.ia32_tsc_adjust_msr = 0x0;
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kvm_async_pf_hash_reset(vcpu);
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kvm_pmu_init(vcpu);
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return 0;
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fail_free_wbinvd_dirty_mask:
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free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
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fail_free_mce_banks:
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kfree(vcpu->arch.mce_banks);
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fail_free_lapic:
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