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drm/i915: Don't program eLLC IDI hash mask for gen9+

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For gen9 onwards, eDRAM is a true memory side cache. So
there is no need to program idi hash mask as it is for eLLC
only.

v2: INTEL_GEN (Chris), s/has/hash (Matthew)

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
This commit is contained in:
Mika Kuoppala 2016-04-13 17:26:42 +03:00 committed by Mika Kuoppala
parent 3cb26e26ed
commit 666fbcf5c2
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/i915_gem.c
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@ -4892,7 +4892,7 @@ i915_gem_init_hw(struct drm_device *dev)
/* Double layer security blanket, see i915_gem_init() */
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
if (dev_priv->ellc_size)
if (dev_priv->ellc_size && INTEL_GEN(dev_priv) < 9)
I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
if (IS_HASWELL(dev))