drm/i915: fixup desired rps frequency computation
In commit
commit 20b46e59dd
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Jul 26 11:16:14 2012 +0200
drm/i915: Only set the down rps limit when at the loweset frequency
The computation for the new desired frequency was extracted, but since
the desired frequency was passed-by value, the adjustments didn't
propgate back. Fix this.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2272,13 +2272,13 @@ static void ironlake_disable_drps(struct drm_device *dev)
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* ourselves, instead of doing a rmw cycle (which might result in us clearing
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* all limits and the gpu stuck at whatever frequency it is at atm).
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*/
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static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
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static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 *val)
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{
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u32 limits;
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limits = 0;
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if (val >= dev_priv->max_delay)
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val = dev_priv->max_delay;
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if (*val >= dev_priv->max_delay)
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*val = dev_priv->max_delay;
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limits |= dev_priv->max_delay << 24;
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/* Only set the down limit when we've reached the lowest level to avoid
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@ -2287,8 +2287,8 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
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* the hw runs at the minimal clock before selecting the desired
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* frequency, if the down threshold expires in that window we will not
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* receive a down interrupt. */
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if (val <= dev_priv->min_delay) {
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val = dev_priv->min_delay;
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if (*val <= dev_priv->min_delay) {
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*val = dev_priv->min_delay;
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limits |= dev_priv->min_delay << 16;
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}
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@ -2298,7 +2298,7 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
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void gen6_set_rps(struct drm_device *dev, u8 val)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 limits = gen6_rps_limits(dev_priv, val);
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u32 limits = gen6_rps_limits(dev_priv, &val);
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if (val == dev_priv->cur_delay)
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return;
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