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mmc: mmc: Fix HS switch failure in mmc_select_hs400()

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To slove the issue which was found on gru board for hs400.

[    4.616946] sdhci: Secure Digital Host Controller Interface driver
[    4.623135] sdhci: Copyright(c) Pierre Ossman
[    4.722575] sdhci-pltfm: SDHCI platform and OF driver helper
[    4.730962] sdhci-arasan fe330000.sdhci: No vmmc regulator found
[    4.737444] sdhci-arasan fe330000.sdhci: No vqmmc regulator found
[    4.774930] mmc0: SDHCI controller on fe330000.sdhci [fe330000.sdhci] using ADMA
[    4.980295] mmc0: switch to high-speed from hs200 failed, err:-84
[    4.986487] mmc0: error -84 whilst initialising MMC card

We should change HS400 mode selection timing to meet JEDEC
specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ
after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode
selection:
Set the "Timing Interface" parameter in the HS_TIMING[185] field of the
Extended CSD register to 0x1 to switch to High Speed mode and then set
the clock frequency to a value not greater than 52MHZ.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Ziyuan Xu 2016-05-26 13:50:32 +08:00 committed by Ulf Hansson
parent 987aa5f805
commit 649c6059d2
1 changed files with 4 additions and 4 deletions
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8
drivers/mmc/core/mmc.c
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@ -1082,10 +1082,6 @@ static int mmc_select_hs400(struct mmc_card *card)
host->ios.bus_width == MMC_BUS_WIDTH_8))
return 0;
/* Reduce frequency to HS frequency */
max_dtr = card->ext_csd.hs_max_dtr;
mmc_set_clock(host, max_dtr);
/* Switch card to HS mode */
val = EXT_CSD_TIMING_HS;
err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
@ -1101,6 +1097,10 @@ static int mmc_select_hs400(struct mmc_card *card)
/* Set host controller to HS timing */
mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
/* Reduce frequency to HS frequency */
max_dtr = card->ext_csd.hs_max_dtr;
mmc_set_clock(host, max_dtr);
err = mmc_switch_status(card);
if (err)
goto out_err;