tg3: Add mailbox assignments
The 5717 assigns mailbox locations to interrupt vectors in a rather non-intuitive way. (Much of the complexity stems from legacy compatibility issues.) This patch implements the assignment scheme. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -9219,7 +9219,7 @@ static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam *
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static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
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static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
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{
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{
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struct tg3 *tp = netdev_priv(dev);
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struct tg3 *tp = netdev_priv(dev);
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int irq_sync = 0, err = 0;
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int i, irq_sync = 0, err = 0;
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if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) ||
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if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) ||
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(ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) ||
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(ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) ||
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@ -9243,7 +9243,9 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
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tp->rx_pending > 63)
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tp->rx_pending > 63)
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tp->rx_pending = 63;
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tp->rx_pending = 63;
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tp->rx_jumbo_pending = ering->rx_jumbo_pending;
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tp->rx_jumbo_pending = ering->rx_jumbo_pending;
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tp->napi[0].tx_pending = ering->tx_pending;
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for (i = 0; i < TG3_IRQ_MAX_VECS; i++)
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tp->napi[i].tx_pending = ering->tx_pending;
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if (netif_running(dev)) {
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if (netif_running(dev)) {
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tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
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tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
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@ -13443,7 +13445,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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static int tg3_version_printed = 0;
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static int tg3_version_printed = 0;
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struct net_device *dev;
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struct net_device *dev;
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struct tg3 *tp;
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struct tg3 *tp;
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int err, pm_cap;
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int i, err, pm_cap;
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u32 sndmbx, rcvmbx, intmbx;
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char str[40];
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char str[40];
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u64 dma_mask, persist_dma_mask;
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u64 dma_mask, persist_dma_mask;
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@ -13538,12 +13541,50 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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tp->rx_pending = TG3_DEF_RX_RING_PENDING;
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tp->rx_pending = TG3_DEF_RX_RING_PENDING;
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tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
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tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
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tp->napi[0].tp = tp;
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intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
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tp->napi[0].int_mbox = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
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rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW;
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tp->napi[0].consmbox = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW;
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sndmbx = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW;
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tp->napi[0].prodmbox = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW;
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for (i = 0; i < TG3_IRQ_MAX_VECS; i++) {
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tp->napi[0].coal_now = HOSTCC_MODE_NOW;
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struct tg3_napi *tnapi = &tp->napi[i];
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tp->napi[0].tx_pending = TG3_DEF_TX_RING_PENDING;
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tnapi->tp = tp;
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tnapi->tx_pending = TG3_DEF_TX_RING_PENDING;
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tnapi->int_mbox = intmbx;
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if (i < 4)
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intmbx += 0x8;
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else
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intmbx += 0x4;
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tnapi->consmbox = rcvmbx;
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tnapi->prodmbox = sndmbx;
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if (i)
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tnapi->coal_now = HOSTCC_MODE_COAL_VEC1_NOW << (i - 1);
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else
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tnapi->coal_now = HOSTCC_MODE_NOW;
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if (!(tp->tg3_flags & TG3_FLAG_SUPPORT_MSIX))
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break;
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/*
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* If we support MSIX, we'll be using RSS. If we're using
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* RSS, the first vector only handles link interrupts and the
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* remaining vectors handle rx and tx interrupts. Reuse the
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* mailbox values for the next iteration. The values we setup
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* above are still useful for the single vectored mode.
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*/
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if (!i)
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continue;
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rcvmbx += 0x8;
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if (sndmbx & 0x4)
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sndmbx -= 0x4;
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else
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sndmbx += 0xc;
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}
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netif_napi_add(dev, &tp->napi[0].napi, tg3_poll, 64);
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netif_napi_add(dev, &tp->napi[0].napi, tg3_poll, 64);
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dev->ethtool_ops = &tg3_ethtool_ops;
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dev->ethtool_ops = &tg3_ethtool_ops;
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dev->watchdog_timeo = TG3_TX_TIMEOUT;
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dev->watchdog_timeo = TG3_TX_TIMEOUT;
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