perf, x86: Catch spurious interrupts after disabling counters
Some cpus still deliver spurious interrupts after disabling a
counter. This caused 'undelivered NMI' messages. This patch
fixes this. Introduced by:
4177c42
: perf, x86: Try to handle unknown nmis with an enabled PMU
Reported-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Robert Richter <robert.richter@amd.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: gorcunov@gmail.com <gorcunov@gmail.com>
Cc: fweisbec@gmail.com <fweisbec@gmail.com>
Cc: ying.huang@intel.com <ying.huang@intel.com>
Cc: ming.m.lin@intel.com <ming.m.lin@intel.com>
Cc: yinghai@kernel.org <yinghai@kernel.org>
Cc: andi@firstfloor.org <andi@firstfloor.org>
Cc: eranian@google.com <eranian@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
LKML-Reference: <20100915162034.GO13563@erda.amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
parent
258af47479
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@ -102,6 +102,7 @@ struct cpu_hw_events {
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*/
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struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */
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unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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unsigned long running[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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int enabled;
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int n_events;
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@ -1010,6 +1011,7 @@ static int x86_pmu_start(struct perf_event *event)
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x86_perf_event_set_period(event);
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cpuc->events[idx] = event;
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__set_bit(idx, cpuc->active_mask);
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__set_bit(idx, cpuc->running);
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x86_pmu.enable(event);
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perf_event_update_userpage(event);
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@ -1141,8 +1143,16 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
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cpuc = &__get_cpu_var(cpu_hw_events);
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for (idx = 0; idx < x86_pmu.num_counters; idx++) {
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if (!test_bit(idx, cpuc->active_mask))
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if (!test_bit(idx, cpuc->active_mask)) {
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/*
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* Though we deactivated the counter some cpus
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* might still deliver spurious interrupts still
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* in flight. Catch them:
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*/
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if (__test_and_clear_bit(idx, cpuc->running))
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handled++;
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continue;
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}
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event = cpuc->events[idx];
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hwc = &event->hw;
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