forked from Minki/linux
[SCSI] dpt_i2o: 64 bit support
This is the code to actually support 64 bit platforms. 64 bit DMA is enabled on both x86_32 PAE and 64 bit platforms. This code is based in part on the unofficial adaptec 64-bit dpt_i2o driver update that I got from Mark Salyzyn at Adaptec. Signed-off-by: Miquel van Smoorenburg <miquels@cistron.nl> Acked-by: Mark Salyzyn <Mark_Salyzyn@adaptec.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
This commit is contained in:
parent
67af2b060e
commit
62ac5aedc5
@ -504,10 +504,9 @@ config SCSI_AIC7XXX_OLD
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source "drivers/scsi/aic7xxx/Kconfig.aic79xx"
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source "drivers/scsi/aic94xx/Kconfig"
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# All the I2O code and drivers do not seem to be 64bit safe.
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config SCSI_DPT_I2O
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tristate "Adaptec I2O RAID support "
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depends on !64BIT && SCSI && PCI && VIRT_TO_BUS
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depends on SCSI && PCI && VIRT_TO_BUS
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help
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This driver supports all of Adaptec's I2O based RAID controllers as
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well as the DPT SmartRaid V cards. This is an Adaptec maintained
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@ -89,7 +89,7 @@ typedef struct {
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int njobs; /* # of jobs sent to HA */
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int qdepth; /* Controller queue depth. */
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int wakebase; /* mpx wakeup base index. */
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uLONG SGsize; /* Scatter/Gather list size. */
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uINT SGsize; /* Scatter/Gather list size. */
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unsigned heads; /* heads for drives on cntlr. */
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unsigned sectors; /* sectors for drives on cntlr. */
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uCHAR do_drive32; /* Flag for Above 16 MB Ability */
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@ -97,8 +97,8 @@ typedef struct {
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char idPAL[4]; /* 4 Bytes Of The ID Pal */
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uCHAR primary; /* 1 For Primary, 0 For Secondary */
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uCHAR eataVersion; /* EATA Version */
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uLONG cpLength; /* EATA Command Packet Length */
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uLONG spLength; /* EATA Status Packet Length */
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uINT cpLength; /* EATA Command Packet Length */
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uINT spLength; /* EATA Status Packet Length */
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uCHAR drqNum; /* DRQ Index (0,5,6,7) */
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uCHAR flag1; /* EATA Flags 1 (Byte 9) */
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uCHAR flag2; /* EATA Flags 2 (Byte 30) */
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@ -107,23 +107,23 @@ typedef struct {
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typedef struct {
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uSHORT length; // Remaining length of this
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uSHORT drvrHBAnum; // Relative HBA # used by the driver
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uLONG baseAddr; // Base I/O address
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uINT baseAddr; // Base I/O address
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uSHORT blinkState; // Blink LED state (0=Not in blink LED)
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uCHAR pciBusNum; // PCI Bus # (Optional)
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uCHAR pciDeviceNum; // PCI Device # (Optional)
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uSHORT hbaFlags; // Miscellaneous HBA flags
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uSHORT Interrupt; // Interrupt set for this device.
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# if (defined(_DPT_ARC))
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uLONG baseLength;
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uINT baseLength;
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ADAPTER_OBJECT *AdapterObject;
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LARGE_INTEGER DmaLogicalAddress;
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PVOID DmaVirtualAddress;
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LARGE_INTEGER ReplyLogicalAddress;
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PVOID ReplyVirtualAddress;
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# else
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uLONG reserved1; // Reserved for future expansion
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uLONG reserved2; // Reserved for future expansion
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uLONG reserved3; // Reserved for future expansion
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uINT reserved1; // Reserved for future expansion
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uINT reserved2; // Reserved for future expansion
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uINT reserved3; // Reserved for future expansion
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# endif
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} drvrHBAinfo_S;
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@ -33,11 +33,7 @@
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/* to make sure we are talking the same size under all OS's */
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typedef unsigned char sigBYTE;
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typedef unsigned short sigWORD;
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#if (defined(_MULTI_DATAMODEL) && defined(sun) && !defined(_ILP32))
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typedef uint32_t sigLONG;
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#else
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typedef unsigned long sigLONG;
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#endif
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typedef unsigned int sigINT;
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/*
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* use sigWORDLittleEndian for:
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@ -300,7 +296,7 @@ typedef struct dpt_sig {
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sigBYTE dsFiletype; /* type of file */
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sigBYTE dsFiletypeFlags; /* flags to specify load type, etc. */
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sigBYTE dsOEM; /* OEM file was created for */
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sigLONG dsOS; /* which Operating systems */
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sigINT dsOS; /* which Operating systems */
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sigWORD dsCapabilities; /* RAID levels, etc. */
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sigWORD dsDeviceSupp; /* Types of SCSI devices supported */
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sigWORD dsAdapterSupp; /* DPT adapter families supported */
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@ -145,8 +145,8 @@
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uCHAR smartROMRevision;
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uSHORT flags; /* See bit definitions above */
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uSHORT conventionalMemSize; /* in KB */
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uLONG extendedMemSize; /* in KB */
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uLONG osType; /* Same as DPTSIG's definition */
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uINT extendedMemSize; /* in KB */
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uINT osType; /* Same as DPTSIG's definition */
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uCHAR osMajorVersion;
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uCHAR osMinorVersion; /* The OS version */
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uCHAR osRevision;
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@ -111,10 +111,17 @@ static int sys_tbl_len;
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static adpt_hba* hba_chain = NULL;
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static int hba_count = 0;
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#ifdef CONFIG_COMPAT
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static long compat_adpt_ioctl(struct file *, unsigned int, unsigned long);
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#endif
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static const struct file_operations adpt_fops = {
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.ioctl = adpt_ioctl,
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.open = adpt_open,
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.release = adpt_close
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.release = adpt_close,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = compat_adpt_ioctl,
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#endif
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};
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/* Structures and definitions for synchronous message posting.
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@ -138,6 +145,11 @@ static DEFINE_SPINLOCK(adpt_post_wait_lock);
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*============================================================================
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*/
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static inline int dpt_dma64(adpt_hba *pHba)
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{
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return (sizeof(dma_addr_t) > 4 && (pHba)->dma64);
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}
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static inline u32 dma_high(dma_addr_t addr)
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{
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return upper_32_bits(addr);
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@ -277,7 +289,7 @@ static int adpt_release(struct Scsi_Host *host)
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static void adpt_inquiry(adpt_hba* pHba)
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{
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u32 msg[14];
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u32 msg[17];
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u32 *mptr;
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u32 *lenptr;
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int direction;
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@ -301,7 +313,10 @@ static void adpt_inquiry(adpt_hba* pHba)
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direction = 0x00000000;
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scsidir =0x40000000; // DATA IN (iop<--dev)
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reqlen = 14; // SINGLE SGE
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if (dpt_dma64(pHba))
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reqlen = 17; // SINGLE SGE, 64 bit
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else
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reqlen = 14; // SINGLE SGE, 32 bit
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/* Stick the headers on */
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msg[0] = reqlen<<16 | SGL_OFFSET_12;
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msg[1] = (0xff<<24|HOST_TID<<12|ADAPTER_TID);
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@ -334,8 +349,16 @@ static void adpt_inquiry(adpt_hba* pHba)
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/* Now fill in the SGList and command */
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*lenptr = len;
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*mptr++ = 0xD0000000|direction|len;
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*mptr++ = addr;
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if (dpt_dma64(pHba)) {
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*mptr++ = (0x7C<<24)+(2<<16)+0x02; /* Enable 64 bit */
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*mptr++ = 1 << PAGE_SHIFT;
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*mptr++ = 0xD0000000|direction|len;
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*mptr++ = dma_low(addr);
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*mptr++ = dma_high(addr);
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} else {
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*mptr++ = 0xD0000000|direction|len;
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*mptr++ = addr;
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}
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// Send it on it's way
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rcode = adpt_i2o_post_wait(pHba, msg, reqlen<<2, 120);
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@ -628,6 +651,92 @@ stop_output:
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return len;
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}
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/*
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* Turn a struct scsi_cmnd * into a unique 32 bit 'context'.
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*/
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static u32 adpt_cmd_to_context(struct scsi_cmnd *cmd)
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{
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return (u32)cmd->serial_number;
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}
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/*
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* Go from a u32 'context' to a struct scsi_cmnd * .
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* This could probably be made more efficient.
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*/
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static struct scsi_cmnd *
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adpt_cmd_from_context(adpt_hba * pHba, u32 context)
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{
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struct scsi_cmnd * cmd;
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struct scsi_device * d;
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if (context == 0)
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return NULL;
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spin_unlock(pHba->host->host_lock);
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shost_for_each_device(d, pHba->host) {
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unsigned long flags;
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spin_lock_irqsave(&d->list_lock, flags);
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list_for_each_entry(cmd, &d->cmd_list, list) {
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if (((u32)cmd->serial_number == context)) {
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spin_unlock_irqrestore(&d->list_lock, flags);
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scsi_device_put(d);
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spin_lock(pHba->host->host_lock);
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return cmd;
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}
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}
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spin_unlock_irqrestore(&d->list_lock, flags);
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}
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spin_lock(pHba->host->host_lock);
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return NULL;
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}
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/*
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* Turn a pointer to ioctl reply data into an u32 'context'
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*/
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static u32 adpt_ioctl_to_context(adpt_hba * pHba, void *reply)
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{
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#if BITS_PER_LONG == 32
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return (u32)(unsigned long)reply;
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#else
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ulong flags = 0;
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u32 nr, i;
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spin_lock_irqsave(pHba->host->host_lock, flags);
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nr = ARRAY_SIZE(pHba->ioctl_reply_context);
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for (i = 0; i < nr; i++) {
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if (pHba->ioctl_reply_context[i] == NULL) {
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pHba->ioctl_reply_context[i] = reply;
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break;
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}
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}
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spin_unlock_irqrestore(pHba->host->host_lock, flags);
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if (i >= nr) {
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kfree (reply);
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printk(KERN_WARNING"%s: Too many outstanding "
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"ioctl commands\n", pHba->name);
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return (u32)-1;
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}
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return i;
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#endif
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}
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/*
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* Go from an u32 'context' to a pointer to ioctl reply data.
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*/
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static void *adpt_ioctl_from_context(adpt_hba *pHba, u32 context)
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{
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#if BITS_PER_LONG == 32
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return (void *)(unsigned long)context;
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#else
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void *p = pHba->ioctl_reply_context[context];
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pHba->ioctl_reply_context[context] = NULL;
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return p;
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#endif
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}
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/*===========================================================================
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* Error Handling routines
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*===========================================================================
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@ -655,7 +764,7 @@ static int adpt_abort(struct scsi_cmnd * cmd)
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msg[1] = I2O_CMD_SCSI_ABORT<<24|HOST_TID<<12|dptdevice->tid;
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msg[2] = 0;
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msg[3]= 0;
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msg[4] = (u32)cmd;
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msg[4] = adpt_cmd_to_context(cmd);
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if (pHba->host)
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spin_lock_irq(pHba->host->host_lock);
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rcode = adpt_i2o_post_wait(pHba, msg, sizeof(msg), FOREVER);
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@ -867,6 +976,7 @@ static int adpt_install_hba(struct scsi_host_template* sht, struct pci_dev* pDev
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u32 hba_map1_area_size = 0;
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void __iomem *base_addr_virt = NULL;
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void __iomem *msg_addr_virt = NULL;
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int dma64 = 0;
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int raptorFlag = FALSE;
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@ -880,7 +990,16 @@ static int adpt_install_hba(struct scsi_host_template* sht, struct pci_dev* pDev
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}
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pci_set_master(pDev);
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if (pci_set_dma_mask(pDev, DMA_32BIT_MASK))
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/*
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* See if we should enable dma64 mode.
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*/
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if (sizeof(dma_addr_t) > 4 &&
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pci_set_dma_mask(pDev, DMA_64BIT_MASK) == 0) {
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if (dma_get_required_mask(&pDev->dev) > DMA_32BIT_MASK)
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dma64 = 1;
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}
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if (!dma64 && pci_set_dma_mask(pDev, DMA_32BIT_MASK) != 0)
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return -EINVAL;
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/* adapter only supports message blocks below 4GB */
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@ -906,6 +1025,25 @@ static int adpt_install_hba(struct scsi_host_template* sht, struct pci_dev* pDev
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raptorFlag = TRUE;
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}
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#if BITS_PER_LONG == 64
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/*
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* The original Adaptec 64 bit driver has this comment here:
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* "x86_64 machines need more optimal mappings"
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*
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* I assume some HBAs report ridiculously large mappings
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* and we need to limit them on platforms with IOMMUs.
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*/
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if (raptorFlag == TRUE) {
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if (hba_map0_area_size > 128)
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hba_map0_area_size = 128;
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if (hba_map1_area_size > 524288)
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hba_map1_area_size = 524288;
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} else {
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if (hba_map0_area_size > 524288)
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hba_map0_area_size = 524288;
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}
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#endif
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base_addr_virt = ioremap(base_addr0_phys,hba_map0_area_size);
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if (!base_addr_virt) {
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pci_release_regions(pDev);
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@ -968,16 +1106,22 @@ static int adpt_install_hba(struct scsi_host_template* sht, struct pci_dev* pDev
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pHba->state = DPTI_STATE_RESET;
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pHba->pDev = pDev;
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pHba->devices = NULL;
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pHba->dma64 = dma64;
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// Initializing the spinlocks
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spin_lock_init(&pHba->state_lock);
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spin_lock_init(&adpt_post_wait_lock);
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if(raptorFlag == 0){
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printk(KERN_INFO"Adaptec I2O RAID controller %d at %p size=%x irq=%d\n",
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hba_count-1, base_addr_virt, hba_map0_area_size, pDev->irq);
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printk(KERN_INFO "Adaptec I2O RAID controller"
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" %d at %p size=%x irq=%d%s\n",
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hba_count-1, base_addr_virt,
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hba_map0_area_size, pDev->irq,
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dma64 ? " (64-bit DMA)" : "");
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} else {
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printk(KERN_INFO"Adaptec I2O RAID controller %d irq=%d\n",hba_count-1, pDev->irq);
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printk(KERN_INFO"Adaptec I2O RAID controller %d irq=%d%s\n",
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hba_count-1, pDev->irq,
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dma64 ? " (64-bit DMA)" : "");
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printk(KERN_INFO" BAR0 %p - size= %x\n",base_addr_virt,hba_map0_area_size);
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printk(KERN_INFO" BAR1 %p - size= %x\n",msg_addr_virt,hba_map1_area_size);
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}
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@ -1030,6 +1174,8 @@ static void adpt_i2o_delete_hba(adpt_hba* pHba)
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if(pHba->msg_addr_virt != pHba->base_addr_virt){
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iounmap(pHba->msg_addr_virt);
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}
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if(pHba->FwDebugBuffer_P)
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iounmap(pHba->FwDebugBuffer_P);
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if(pHba->hrt) {
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dma_free_coherent(&pHba->pDev->dev,
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pHba->hrt->num_entries * pHba->hrt->entry_len << 2,
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@ -1657,10 +1803,13 @@ static int adpt_i2o_passthru(adpt_hba* pHba, u32 __user *arg)
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}
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sg_offset = (msg[0]>>4)&0xf;
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msg[2] = 0x40000000; // IOCTL context
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msg[3] = (u32)reply;
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msg[3] = adpt_ioctl_to_context(pHba, reply);
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if (msg[3] == (u32)-1)
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return -EBUSY;
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memset(sg_list,0, sizeof(sg_list[0])*pHba->sg_tablesize);
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if(sg_offset) {
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// TODO 64bit fix
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// TODO add 64 bit API
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struct sg_simple_element *sg = (struct sg_simple_element*) (msg+sg_offset);
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sg_count = (size - sg_offset*4) / sizeof(struct sg_simple_element);
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if (sg_count > pHba->sg_tablesize){
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@ -1689,15 +1838,15 @@ static int adpt_i2o_passthru(adpt_hba* pHba, u32 __user *arg)
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sg_list[sg_index++] = p; // sglist indexed with input frame, not our internal frame.
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/* Copy in the user's SG buffer if necessary */
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if(sg[i].flag_count & 0x04000000 /*I2O_SGL_FLAGS_DIR*/) {
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// TODO 64bit fix
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if (copy_from_user(p,(void __user *)sg[i].addr_bus, sg_size)) {
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// sg_simple_element API is 32 bit
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if (copy_from_user(p,(void __user *)(ulong)sg[i].addr_bus, sg_size)) {
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printk(KERN_DEBUG"%s: Could not copy SG buf %d FROM user\n",pHba->name,i);
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rcode = -EFAULT;
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goto cleanup;
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}
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}
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//TODO 64bit fix
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sg[i].addr_bus = (u32)virt_to_bus(p);
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/* sg_simple_element API is 32 bit, but addr < 4GB */
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sg[i].addr_bus = addr;
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}
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}
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@ -1725,7 +1874,7 @@ static int adpt_i2o_passthru(adpt_hba* pHba, u32 __user *arg)
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if(sg_offset) {
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/* Copy back the Scatter Gather buffers back to user space */
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u32 j;
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// TODO 64bit fix
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// TODO add 64 bit API
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struct sg_simple_element* sg;
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int sg_size;
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@ -1745,14 +1894,14 @@ static int adpt_i2o_passthru(adpt_hba* pHba, u32 __user *arg)
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}
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sg_count = (size - sg_offset*4) / sizeof(struct sg_simple_element);
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// TODO 64bit fix
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// TODO add 64 bit API
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sg = (struct sg_simple_element*)(msg + sg_offset);
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for (j = 0; j < sg_count; j++) {
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/* Copy out the SG list to user's buffer if necessary */
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if(! (sg[j].flag_count & 0x4000000 /*I2O_SGL_FLAGS_DIR*/)) {
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sg_size = sg[j].flag_count & 0xffffff;
|
||||
// TODO 64bit fix
|
||||
if (copy_to_user((void __user *)sg[j].addr_bus,sg_list[j], sg_size)) {
|
||||
// sg_simple_element API is 32 bit
|
||||
if (copy_to_user((void __user *)(ulong)sg[j].addr_bus,sg_list[j], sg_size)) {
|
||||
printk(KERN_WARNING"%s: Could not copy %p TO user %x\n",pHba->name, sg_list[j], sg[j].addr_bus);
|
||||
rcode = -EFAULT;
|
||||
goto cleanup;
|
||||
@ -1972,6 +2121,38 @@ static int adpt_ioctl(struct inode *inode, struct file *file, uint cmd,
|
||||
return error;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
static long compat_adpt_ioctl(struct file *file,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
struct inode *inode;
|
||||
long ret;
|
||||
|
||||
inode = file->f_dentry->d_inode;
|
||||
|
||||
lock_kernel();
|
||||
|
||||
switch(cmd) {
|
||||
case DPT_SIGNATURE:
|
||||
case I2OUSRCMD:
|
||||
case DPT_CTRLINFO:
|
||||
case DPT_SYSINFO:
|
||||
case DPT_BLINKLED:
|
||||
case I2ORESETCMD:
|
||||
case I2ORESCANCMD:
|
||||
case (DPT_TARGET_BUSY & 0xFFFF):
|
||||
case DPT_TARGET_BUSY:
|
||||
ret = adpt_ioctl(inode, file, cmd, arg);
|
||||
break;
|
||||
default:
|
||||
ret = -ENOIOCTLCMD;
|
||||
}
|
||||
|
||||
unlock_kernel();
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static irqreturn_t adpt_isr(int irq, void *dev_id)
|
||||
{
|
||||
@ -2032,7 +2213,7 @@ static irqreturn_t adpt_isr(int irq, void *dev_id)
|
||||
}
|
||||
context = readl(reply+8);
|
||||
if(context & 0x40000000){ // IOCTL
|
||||
void *p = (void *)readl(reply+12);
|
||||
void *p = adpt_ioctl_from_context(pHba, readl(reply+12));
|
||||
if( p != NULL) {
|
||||
memcpy_fromio(p, reply, REPLY_FRAME_SIZE * 4);
|
||||
}
|
||||
@ -2046,14 +2227,15 @@ static irqreturn_t adpt_isr(int irq, void *dev_id)
|
||||
status = I2O_POST_WAIT_OK;
|
||||
}
|
||||
if(!(context & 0x40000000)) {
|
||||
cmd = (struct scsi_cmnd*) readl(reply+12);
|
||||
cmd = adpt_cmd_from_context(pHba,
|
||||
readl(reply+12));
|
||||
if(cmd != NULL) {
|
||||
printk(KERN_WARNING"%s: Apparent SCSI cmd in Post Wait Context - cmd=%p context=%x\n", pHba->name, cmd, context);
|
||||
}
|
||||
}
|
||||
adpt_i2o_post_wait_complete(context, status);
|
||||
} else { // SCSI message
|
||||
cmd = (struct scsi_cmnd*) readl(reply+12);
|
||||
cmd = adpt_cmd_from_context (pHba, readl(reply+12));
|
||||
if(cmd != NULL){
|
||||
scsi_dma_unmap(cmd);
|
||||
if(cmd->serial_number != 0) { // If not timedout
|
||||
@ -2076,6 +2258,7 @@ static s32 adpt_scsi_to_i2o(adpt_hba* pHba, struct scsi_cmnd* cmd, struct adpt_d
|
||||
int i;
|
||||
u32 msg[MAX_MESSAGE_SIZE];
|
||||
u32* mptr;
|
||||
u32* lptr;
|
||||
u32 *lenptr;
|
||||
int direction;
|
||||
int scsidir;
|
||||
@ -2083,6 +2266,7 @@ static s32 adpt_scsi_to_i2o(adpt_hba* pHba, struct scsi_cmnd* cmd, struct adpt_d
|
||||
u32 len;
|
||||
u32 reqlen;
|
||||
s32 rcode;
|
||||
dma_addr_t addr;
|
||||
|
||||
memset(msg, 0 , sizeof(msg));
|
||||
len = scsi_bufflen(cmd);
|
||||
@ -2122,7 +2306,7 @@ static s32 adpt_scsi_to_i2o(adpt_hba* pHba, struct scsi_cmnd* cmd, struct adpt_d
|
||||
// I2O_CMD_SCSI_EXEC
|
||||
msg[1] = ((0xff<<24)|(HOST_TID<<12)|d->tid);
|
||||
msg[2] = 0;
|
||||
msg[3] = (u32)cmd; /* We want the SCSI control block back */
|
||||
msg[3] = adpt_cmd_to_context(cmd); /* Want SCSI control block back */
|
||||
// Our cards use the transaction context as the tag for queueing
|
||||
// Adaptec/DPT Private stuff
|
||||
msg[4] = I2O_CMD_SCSI_EXEC|(DPT_ORGANIZATION_ID<<16);
|
||||
@ -2140,7 +2324,13 @@ static s32 adpt_scsi_to_i2o(adpt_hba* pHba, struct scsi_cmnd* cmd, struct adpt_d
|
||||
memcpy(mptr, cmd->cmnd, cmd->cmd_len);
|
||||
mptr+=4;
|
||||
lenptr=mptr++; /* Remember me - fill in when we know */
|
||||
reqlen = 14; // SINGLE SGE
|
||||
if (dpt_dma64(pHba)) {
|
||||
reqlen = 16; // SINGLE SGE
|
||||
*mptr++ = (0x7C<<24)+(2<<16)+0x02; /* Enable 64 bit */
|
||||
*mptr++ = 1 << PAGE_SHIFT;
|
||||
} else {
|
||||
reqlen = 14; // SINGLE SGE
|
||||
}
|
||||
/* Now fill in the SGList and command */
|
||||
|
||||
nseg = scsi_dma_map(cmd);
|
||||
@ -2150,12 +2340,16 @@ static s32 adpt_scsi_to_i2o(adpt_hba* pHba, struct scsi_cmnd* cmd, struct adpt_d
|
||||
|
||||
len = 0;
|
||||
scsi_for_each_sg(cmd, sg, nseg, i) {
|
||||
lptr = mptr;
|
||||
*mptr++ = direction|0x10000000|sg_dma_len(sg);
|
||||
len+=sg_dma_len(sg);
|
||||
*mptr++ = sg_dma_address(sg);
|
||||
addr = sg_dma_address(sg);
|
||||
*mptr++ = dma_low(addr);
|
||||
if (dpt_dma64(pHba))
|
||||
*mptr++ = dma_high(addr);
|
||||
/* Make this an end of list */
|
||||
if (i == nseg - 1)
|
||||
mptr[-2] = direction|0xD0000000|sg_dma_len(sg);
|
||||
*lptr = direction|0xD0000000|sg_dma_len(sg);
|
||||
}
|
||||
reqlen = mptr - msg;
|
||||
*lenptr = len;
|
||||
@ -2824,7 +3018,17 @@ static s32 adpt_i2o_status_get(adpt_hba* pHba)
|
||||
}
|
||||
|
||||
// Calculate the Scatter Gather list size
|
||||
pHba->sg_tablesize = (pHba->status_block->inbound_frame_size * 4 -40)/ sizeof(struct sg_simple_element);
|
||||
if (dpt_dma64(pHba)) {
|
||||
pHba->sg_tablesize
|
||||
= ((pHba->status_block->inbound_frame_size * 4
|
||||
- 14 * sizeof(u32))
|
||||
/ (sizeof(struct sg_simple_element) + sizeof(u32)));
|
||||
} else {
|
||||
pHba->sg_tablesize
|
||||
= ((pHba->status_block->inbound_frame_size * 4
|
||||
- 12 * sizeof(u32))
|
||||
/ sizeof(struct sg_simple_element));
|
||||
}
|
||||
if (pHba->sg_tablesize > SG_LIST_ELEMENTS) {
|
||||
pHba->sg_tablesize = SG_LIST_ELEMENTS;
|
||||
}
|
||||
@ -2916,13 +3120,19 @@ static int adpt_i2o_lct_get(adpt_hba* pHba)
|
||||
// I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO;
|
||||
if(adpt_i2o_query_scalar(pHba, 0 , 0x8000, -1, buf, sizeof(buf))>=0) {
|
||||
pHba->FwDebugBufferSize = buf[1];
|
||||
pHba->FwDebugBuffer_P = pHba->base_addr_virt + buf[0];
|
||||
pHba->FwDebugFlags_P = pHba->FwDebugBuffer_P + FW_DEBUG_FLAGS_OFFSET;
|
||||
pHba->FwDebugBLEDvalue_P = pHba->FwDebugBuffer_P + FW_DEBUG_BLED_OFFSET;
|
||||
pHba->FwDebugBLEDflag_P = pHba->FwDebugBLEDvalue_P + 1;
|
||||
pHba->FwDebugStrLength_P = pHba->FwDebugBuffer_P + FW_DEBUG_STR_LENGTH_OFFSET;
|
||||
pHba->FwDebugBuffer_P += buf[2];
|
||||
pHba->FwDebugFlags = 0;
|
||||
pHba->FwDebugBuffer_P = ioremap(pHba->base_addr_phys + buf[0],
|
||||
pHba->FwDebugBufferSize);
|
||||
if (pHba->FwDebugBuffer_P) {
|
||||
pHba->FwDebugFlags_P = pHba->FwDebugBuffer_P +
|
||||
FW_DEBUG_FLAGS_OFFSET;
|
||||
pHba->FwDebugBLEDvalue_P = pHba->FwDebugBuffer_P +
|
||||
FW_DEBUG_BLED_OFFSET;
|
||||
pHba->FwDebugBLEDflag_P = pHba->FwDebugBLEDvalue_P + 1;
|
||||
pHba->FwDebugStrLength_P = pHba->FwDebugBuffer_P +
|
||||
FW_DEBUG_STR_LENGTH_OFFSET;
|
||||
pHba->FwDebugBuffer_P += buf[2];
|
||||
pHba->FwDebugFlags = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -233,6 +233,7 @@ typedef struct _adpt_hba {
|
||||
u8 top_scsi_channel;
|
||||
u8 top_scsi_id;
|
||||
u8 top_scsi_lun;
|
||||
u8 dma64;
|
||||
|
||||
i2o_status_block* status_block;
|
||||
dma_addr_t status_block_pa;
|
||||
@ -252,6 +253,7 @@ typedef struct _adpt_hba {
|
||||
void __iomem *FwDebugBLEDflag_P;// Virtual Addr Of FW Debug BLED
|
||||
void __iomem *FwDebugBLEDvalue_P;// Virtual Addr Of FW Debug BLED
|
||||
u32 FwDebugFlags;
|
||||
u32 *ioctl_reply_context[4];
|
||||
} adpt_hba;
|
||||
|
||||
struct sg_simple_element {
|
||||
|
Loading…
Reference in New Issue
Block a user