diff --git a/drivers/crypto/qat/qat_common/adf_admin.c b/drivers/crypto/qat/qat_common/adf_admin.c index e363d13dcd78..a51ba0039cff 100644 --- a/drivers/crypto/qat/qat_common/adf_admin.c +++ b/drivers/crypto/qat/qat_common/adf_admin.c @@ -152,7 +152,7 @@ static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd) int i; memset(&req, 0, sizeof(struct icp_qat_fw_init_admin_req)); - req.init_admin_cmd_id = cmd; + req.cmd_id = cmd; if (cmd == ICP_QAT_FW_CONSTANTS_CFG) { req.init_cfg_sz = 1024; @@ -161,7 +161,7 @@ static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd) for (i = 0; i < hw_device->get_num_aes(hw_device); i++) { memset(&resp, 0, sizeof(struct icp_qat_fw_init_admin_resp)); if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) || - resp.init_resp_hdr.status) + resp.status) return -EFAULT; } return 0; diff --git a/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h index c867e9a0a540..d4d188cd7ed0 100644 --- a/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h +++ b/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h @@ -25,48 +25,73 @@ enum icp_qat_fw_init_admin_resp_status { struct icp_qat_fw_init_admin_req { __u16 init_cfg_sz; __u8 resrvd1; - __u8 init_admin_cmd_id; + __u8 cmd_id; __u32 resrvd2; __u64 opaque_data; __u64 init_cfg_ptr; - __u64 resrvd3; -}; -struct icp_qat_fw_init_admin_resp_hdr { - __u8 flags; - __u8 resrvd1; - __u8 status; - __u8 init_admin_cmd_id; -}; - -struct icp_qat_fw_init_admin_resp_pars { union { - __u32 resrvd1[ICP_QAT_FW_NUM_LONGWORDS_4]; struct { - __u32 version_patch_num; - __u8 context_id; - __u8 ae_id; - __u16 resrvd1; - __u64 resrvd2; - } s1; - struct { - __u64 req_rec_count; - __u64 resp_sent_count; - } s2; - } u; + __u16 ibuf_size_in_kb; + __u16 resrvd3; + }; + __u32 idle_filter; + }; + + __u32 resrvd4; }; struct icp_qat_fw_init_admin_resp { - struct icp_qat_fw_init_admin_resp_hdr init_resp_hdr; + __u8 flags; + __u8 resrvd1; + __u8 status; + __u8 cmd_id; union { __u32 resrvd2; struct { __u16 version_minor_num; __u16 version_major_num; - } s; - } u; + }; + }; __u64 opaque_data; - struct icp_qat_fw_init_admin_resp_pars init_resp_pars; + union { + __u32 resrvd3[ICP_QAT_FW_NUM_LONGWORDS_4]; + struct { + __u32 version_patch_num; + __u8 context_id; + __u8 ae_id; + __u16 resrvd4; + __u64 resrvd5; + }; + struct { + __u64 req_rec_count; + __u64 resp_sent_count; + }; + struct { + __u16 compression_algos; + __u16 checksum_algos; + __u32 deflate_capabilities; + __u32 resrvd6; + __u32 lzs_capabilities; + }; + struct { + __u32 cipher_algos; + __u32 hash_algos; + __u16 keygen_algos; + __u16 other; + __u16 public_key_algos; + __u16 prime_algos; + }; + struct { + __u64 timestamp; + __u64 resrvd7; + }; + struct { + __u32 successful_count; + __u32 unsuccessful_count; + __u64 resrvd8; + }; + }; }; #define ICP_QAT_FW_COMN_HEARTBEAT_OK 0