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drm/i915: Get correct display clock on 945gm

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This is according to Mobile Intel® 945 Express Chipset
Family datasheet.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Link: http://patchwork.freedesktop.org/patch/msgid/20170131235026.26003-1-arthur@aheymans.xyz
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
This commit is contained in:
Arthur Heymans 2017-02-01 00:50:26 +01:00 committed by Ville Syrjälä
parent e0ec3ec698
commit 6248017ae5
2 changed files with 26 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/i915_reg.h
View File

@ -119,7 +119,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GCFGC 0xf0 /* 915+ only */ #define GCFGC 0xf0 /* 915+ only */
#define GC_LOW_FREQUENCY_ENABLE (1 << 7) #define GC_LOW_FREQUENCY_ENABLE (1 << 7)
#define GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4) #define GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4)
#define GC_DISPLAY_CLOCK_333_MHZ (4 << 4) #define GC_DISPLAY_CLOCK_333_320_MHZ (4 << 4)
#define GC_DISPLAY_CLOCK_267_MHZ_PNV (0 << 4) #define GC_DISPLAY_CLOCK_267_MHZ_PNV (0 << 4)
#define GC_DISPLAY_CLOCK_333_MHZ_PNV (1 << 4) #define GC_DISPLAY_CLOCK_333_MHZ_PNV (1 << 4)
#define GC_DISPLAY_CLOCK_444_MHZ_PNV (2 << 4) #define GC_DISPLAY_CLOCK_444_MHZ_PNV (2 << 4)

27
drivers/gpu/drm/i915/intel_display.c
View File

@ -7411,6 +7411,26 @@ static int i945_get_display_clock_speed(struct drm_i915_private *dev_priv)
return 400000; return 400000;
} }
static int i945gm_get_display_clock_speed(struct drm_i915_private *dev_priv)
{
struct pci_dev *pdev = dev_priv->drm.pdev;
u16 gcfgc = 0;
pci_read_config_word(pdev, GCFGC, &gcfgc);
if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
return 133333;
else {
switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
case GC_DISPLAY_CLOCK_333_320_MHZ:
return 320000;
default:
case GC_DISPLAY_CLOCK_190_200_MHZ:
return 200000;
}
}
}
static int i915_get_display_clock_speed(struct drm_i915_private *dev_priv) static int i915_get_display_clock_speed(struct drm_i915_private *dev_priv)
{ {
return 333333; return 333333;
@ -7457,7 +7477,7 @@ static int i915gm_get_display_clock_speed(struct drm_i915_private *dev_priv)
return 133333; return 133333;
else { else {
switch (gcfgc & GC_DISPLAY_CLOCK_MASK) { switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
case GC_DISPLAY_CLOCK_333_MHZ: case GC_DISPLAY_CLOCK_333_320_MHZ:
return 333333; return 333333;
default: default:
case GC_DISPLAY_CLOCK_190_200_MHZ: case GC_DISPLAY_CLOCK_190_200_MHZ:
@ -16268,9 +16288,12 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
else if (IS_I915G(dev_priv)) else if (IS_I915G(dev_priv))
dev_priv->display.get_display_clock_speed = dev_priv->display.get_display_clock_speed =
i915_get_display_clock_speed; i915_get_display_clock_speed;
else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv)) else if (IS_I845G(dev_priv))
dev_priv->display.get_display_clock_speed = dev_priv->display.get_display_clock_speed =
i9xx_misc_get_display_clock_speed; i9xx_misc_get_display_clock_speed;
else if (IS_I945GM(dev_priv))
dev_priv->display.get_display_clock_speed =
i945gm_get_display_clock_speed;
else if (IS_I915GM(dev_priv)) else if (IS_I915GM(dev_priv))
dev_priv->display.get_display_clock_speed = dev_priv->display.get_display_clock_speed =
i915gm_get_display_clock_speed; i915gm_get_display_clock_speed;