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Little modification in SoC presentation in kernel log.

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Removing of a long-standing warning in sam9263 PM code.
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Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/cleanup

From Nicolas Ferre:
Little modification in SoC presentation in kernel log.
Removing of a long-standing warning in sam9263 PM code.

* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
  ARM: at91: suspend both memory controllers on at91sam9263
  ARM: at91: change "Unknown" qualifier SoC subtype handling

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-04-19 11:50:32 -07:00
commit 61b464aef0
5 changed files with 49 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-at91/cpuidle.c
View File

@ -38,6 +38,8 @@ static int at91_enter_idle(struct cpuidle_device *dev,
at91rm9200_standby(); at91rm9200_standby();
else if (cpu_is_at91sam9g45()) else if (cpu_is_at91sam9g45())
at91sam9g45_standby(); at91sam9g45_standby();
else if (cpu_is_at91sam9263())
at91sam9263_standby();
else else
at91sam9_standby(); at91sam9_standby();

9
arch/arm/mach-at91/include/mach/cpu.h
View File

@ -86,7 +86,7 @@ enum at91_soc_type {
AT91_SOC_SAMA5D3, AT91_SOC_SAMA5D3,
/* Unknown type */ /* Unknown type */
AT91_SOC_NONE AT91_SOC_UNKNOWN,
}; };
enum at91_soc_subtype { enum at91_soc_subtype {
@ -107,8 +107,11 @@ enum at91_soc_subtype {
AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34, AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D35,
/* No subtype for this SoC */
AT91_SOC_SUBTYPE_NONE,
/* Unknown subtype */ /* Unknown subtype */
AT91_SOC_SUBTYPE_NONE AT91_SOC_SUBTYPE_UNKNOWN,
}; };
struct at91_socinfo { struct at91_socinfo {
@ -122,7 +125,7 @@ const char *at91_get_soc_subtype(struct at91_socinfo *c);
static inline int at91_soc_is_detected(void) static inline int at91_soc_is_detected(void)
{ {
return at91_soc_initdata.type != AT91_SOC_NONE; return at91_soc_initdata.type != AT91_SOC_UNKNOWN;
} }
#ifdef CONFIG_SOC_AT91RM9200 #ifdef CONFIG_SOC_AT91RM9200

2
arch/arm/mach-at91/pm.c
View File

@ -270,6 +270,8 @@ static int at91_pm_enter(suspend_state_t state)
at91rm9200_standby(); at91rm9200_standby();
else if (cpu_is_at91sam9g45()) else if (cpu_is_at91sam9g45())
at91sam9g45_standby(); at91sam9g45_standby();
else if (cpu_is_at91sam9263())
at91sam9263_standby();
else else
at91sam9_standby(); at91sam9_standby();
break; break;

30
arch/arm/mach-at91/pm.h
View File

@ -70,13 +70,31 @@ static inline void at91sam9g45_standby(void)
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
} }
#ifdef CONFIG_SOC_AT91SAM9263 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
/* * remember.
* FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
* handle those cases both here and in the Suspend-To-RAM support.
*/ */
#warning Assuming EB1 SDRAM controller is *NOT* used static inline void at91sam9263_standby(void)
#endif {
u32 lpr0, lpr1;
u32 saved_lpr0, saved_lpr1;
saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
/* self-refresh mode now */
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
cpu_do_idle();
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
}
static inline void at91sam9_standby(void) static inline void at91sam9_standby(void)
{ {

22
arch/arm/mach-at91/setup.c
View File

@ -105,28 +105,32 @@ static void __init soc_detect(u32 dbgu_base)
switch (socid) { switch (socid) {
case ARCH_ID_AT91RM9200: case ARCH_ID_AT91RM9200:
at91_soc_initdata.type = AT91_SOC_RM9200; at91_soc_initdata.type = AT91_SOC_RM9200;
if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE) if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
at91_boot_soc = at91rm9200_soc; at91_boot_soc = at91rm9200_soc;
break; break;
case ARCH_ID_AT91SAM9260: case ARCH_ID_AT91SAM9260:
at91_soc_initdata.type = AT91_SOC_SAM9260; at91_soc_initdata.type = AT91_SOC_SAM9260;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9260_soc; at91_boot_soc = at91sam9260_soc;
break; break;
case ARCH_ID_AT91SAM9261: case ARCH_ID_AT91SAM9261:
at91_soc_initdata.type = AT91_SOC_SAM9261; at91_soc_initdata.type = AT91_SOC_SAM9261;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9261_soc; at91_boot_soc = at91sam9261_soc;
break; break;
case ARCH_ID_AT91SAM9263: case ARCH_ID_AT91SAM9263:
at91_soc_initdata.type = AT91_SOC_SAM9263; at91_soc_initdata.type = AT91_SOC_SAM9263;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9263_soc; at91_boot_soc = at91sam9263_soc;
break; break;
case ARCH_ID_AT91SAM9G20: case ARCH_ID_AT91SAM9G20:
at91_soc_initdata.type = AT91_SOC_SAM9G20; at91_soc_initdata.type = AT91_SOC_SAM9G20;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9260_soc; at91_boot_soc = at91sam9260_soc;
break; break;
@ -139,6 +143,7 @@ static void __init soc_detect(u32 dbgu_base)
case ARCH_ID_AT91SAM9RL64: case ARCH_ID_AT91SAM9RL64:
at91_soc_initdata.type = AT91_SOC_SAM9RL; at91_soc_initdata.type = AT91_SOC_SAM9RL;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9rl_soc; at91_boot_soc = at91sam9rl_soc;
break; break;
@ -161,6 +166,7 @@ static void __init soc_detect(u32 dbgu_base)
/* at91sam9g10 */ /* at91sam9g10 */
if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
at91_soc_initdata.type = AT91_SOC_SAM9G10; at91_soc_initdata.type = AT91_SOC_SAM9G10;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9261_soc; at91_boot_soc = at91sam9261_soc;
} }
/* at91sam9xe */ /* at91sam9xe */
@ -242,7 +248,7 @@ static const char *soc_name[] = {
[AT91_SOC_SAM9X5] = "at91sam9x5", [AT91_SOC_SAM9X5] = "at91sam9x5",
[AT91_SOC_SAM9N12] = "at91sam9n12", [AT91_SOC_SAM9N12] = "at91sam9n12",
[AT91_SOC_SAMA5D3] = "sama5d3", [AT91_SOC_SAMA5D3] = "sama5d3",
[AT91_SOC_NONE] = "Unknown" [AT91_SOC_UNKNOWN] = "Unknown",
}; };
const char *at91_get_soc_type(struct at91_socinfo *c) const char *at91_get_soc_type(struct at91_socinfo *c)
@ -268,7 +274,8 @@ static const char *soc_subtype_name[] = {
[AT91_SOC_SAMA5D33] = "sama5d33", [AT91_SOC_SAMA5D33] = "sama5d33",
[AT91_SOC_SAMA5D34] = "sama5d34", [AT91_SOC_SAMA5D34] = "sama5d34",
[AT91_SOC_SAMA5D35] = "sama5d35", [AT91_SOC_SAMA5D35] = "sama5d35",
[AT91_SOC_SUBTYPE_NONE] = "Unknown" [AT91_SOC_SUBTYPE_NONE] = "None",
[AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
}; };
const char *at91_get_soc_subtype(struct at91_socinfo *c) const char *at91_get_soc_subtype(struct at91_socinfo *c)
@ -282,8 +289,8 @@ void __init at91_map_io(void)
/* Map peripherals */ /* Map peripherals */
iotable_init(&at91_io_desc, 1); iotable_init(&at91_io_desc, 1);
at91_soc_initdata.type = AT91_SOC_NONE; at91_soc_initdata.type = AT91_SOC_UNKNOWN;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
soc_detect(AT91_BASE_DBGU0); soc_detect(AT91_BASE_DBGU0);
if (!at91_soc_is_detected()) if (!at91_soc_is_detected())
@ -294,8 +301,9 @@ void __init at91_map_io(void)
pr_info("AT91: Detected soc type: %s\n", pr_info("AT91: Detected soc type: %s\n",
at91_get_soc_type(&at91_soc_initdata)); at91_get_soc_type(&at91_soc_initdata));
pr_info("AT91: Detected soc subtype: %s\n", if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
at91_get_soc_subtype(&at91_soc_initdata)); pr_info("AT91: Detected soc subtype: %s\n",
at91_get_soc_subtype(&at91_soc_initdata));
if (!at91_soc_is_enabled()) if (!at91_soc_is_enabled())
panic("AT91: Soc not enabled"); panic("AT91: Soc not enabled");