forked from Minki/linux
tmio_mmc: add bus_shift support
Some ASIC3 devices in the wild are connected with the address bus shifted by one line, so that its 16-bit registers appear 32-bit aligned in host memory space. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Acked-by: Ian Molton <ian@mnementh.co.uk> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
This commit is contained in:
parent
f0e46cc497
commit
5e74672c09
@ -37,8 +37,6 @@
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static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
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{
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void __iomem *cnf = host->cnf;
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void __iomem *ctl = host->ctl;
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u32 clk = 0, clock, f_min = host->mmc->f_min;
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if (new_clock) {
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@ -50,45 +48,39 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
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clk = 0x20000;
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clk >>= 2;
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tmio_iowrite8((clk & 0x8000) ? 0 : 1, cnf + CNF_SD_CLK_MODE);
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sd_config_write8(host, CNF_SD_CLK_MODE, (clk & 0x8000) ? 0 : 1);
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clk |= 0x100;
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}
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tmio_iowrite16(clk, ctl + CTL_SD_CARD_CLK_CTL);
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk);
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}
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static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
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{
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void __iomem *ctl = host->ctl;
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tmio_iowrite16(0x0000, ctl + CTL_CLK_AND_WAIT_CTL);
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sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
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msleep(10);
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tmio_iowrite16(tmio_ioread16(ctl + CTL_SD_CARD_CLK_CTL) & ~0x0100,
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ctl + CTL_SD_CARD_CLK_CTL);
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
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sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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msleep(10);
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}
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static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
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{
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void __iomem *ctl = host->ctl;
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tmio_iowrite16(tmio_ioread16(ctl + CTL_SD_CARD_CLK_CTL) | 0x0100,
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ctl + CTL_SD_CARD_CLK_CTL);
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
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sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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msleep(10);
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tmio_iowrite16(0x0100, ctl + CTL_CLK_AND_WAIT_CTL);
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sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
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msleep(10);
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}
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static void reset(struct tmio_mmc_host *host)
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{
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void __iomem *ctl = host->ctl;
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/* FIXME - should we set stop clock reg here */
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tmio_iowrite16(0x0000, ctl + CTL_RESET_SD);
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tmio_iowrite16(0x0000, ctl + CTL_RESET_SDIO);
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sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
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sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
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msleep(10);
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tmio_iowrite16(0x0001, ctl + CTL_RESET_SD);
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tmio_iowrite16(0x0001, ctl + CTL_RESET_SDIO);
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sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
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sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
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msleep(10);
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}
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@ -120,13 +112,12 @@ tmio_mmc_finish_request(struct tmio_mmc_host *host)
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static int
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tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
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{
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void __iomem *ctl = host->ctl;
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struct mmc_data *data = host->data;
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int c = cmd->opcode;
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/* Command 12 is handled by hardware */
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if (cmd->opcode == 12 && !cmd->arg) {
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tmio_iowrite16(0x001, ctl + CTL_STOP_INTERNAL_ACTION);
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sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
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return 0;
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}
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@ -151,18 +142,18 @@ tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
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if (data) {
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c |= DATA_PRESENT;
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if (data->blocks > 1) {
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tmio_iowrite16(0x100, ctl + CTL_STOP_INTERNAL_ACTION);
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sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
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c |= TRANSFER_MULTI;
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}
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if (data->flags & MMC_DATA_READ)
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c |= TRANSFER_READ;
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}
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enable_mmc_irqs(ctl, TMIO_MASK_CMD);
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enable_mmc_irqs(host, TMIO_MASK_CMD);
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/* Fire off the command */
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tmio_iowrite32(cmd->arg, ctl + CTL_ARG_REG);
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tmio_iowrite16(c, ctl + CTL_SD_CMD);
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sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
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sd_ctrl_write16(host, CTL_SD_CMD, c);
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return 0;
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}
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@ -174,7 +165,6 @@ tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
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*/
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static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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{
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void __iomem *ctl = host->ctl;
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struct mmc_data *data = host->data;
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unsigned short *buf;
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unsigned int count;
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@ -197,9 +187,9 @@ static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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/* Transfer the data */
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if (data->flags & MMC_DATA_READ)
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tmio_ioread16_rep(ctl + CTL_SD_DATA_PORT, buf, count >> 1);
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sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
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else
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tmio_iowrite16_rep(ctl + CTL_SD_DATA_PORT, buf, count >> 1);
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sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
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host->sg_off += count;
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@ -213,7 +203,6 @@ static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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{
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void __iomem *ctl = host->ctl;
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struct mmc_data *data = host->data;
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struct mmc_command *stop;
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@ -242,13 +231,13 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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*/
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if (data->flags & MMC_DATA_READ)
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disable_mmc_irqs(ctl, TMIO_MASK_READOP);
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disable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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disable_mmc_irqs(ctl, TMIO_MASK_WRITEOP);
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disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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if (stop) {
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if (stop->opcode == 12 && !stop->arg)
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tmio_iowrite16(0x000, ctl + CTL_STOP_INTERNAL_ACTION);
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sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
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else
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BUG();
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}
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@ -259,9 +248,8 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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unsigned int stat)
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{
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void __iomem *ctl = host->ctl, *addr;
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struct mmc_command *cmd = host->cmd;
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int i;
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int i, addr;
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if (!host->cmd) {
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pr_debug("Spurious CMD irq\n");
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@ -275,8 +263,8 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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* modify the order of the response for short response command types.
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*/
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for (i = 3, addr = ctl + CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
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cmd->resp[i] = tmio_ioread32(addr);
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for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
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cmd->resp[i] = sd_ctrl_read32(host, addr);
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if (cmd->flags & MMC_RSP_136) {
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cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
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@ -298,9 +286,9 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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*/
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if (host->data && !cmd->error) {
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if (host->data->flags & MMC_DATA_READ)
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enable_mmc_irqs(ctl, TMIO_MASK_READOP);
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enable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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enable_mmc_irqs(ctl, TMIO_MASK_WRITEOP);
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enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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} else {
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tmio_mmc_finish_request(host);
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}
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@ -312,20 +300,19 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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{
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struct tmio_mmc_host *host = devid;
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void __iomem *ctl = host->ctl;
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unsigned int ireg, irq_mask, status;
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pr_debug("MMC IRQ begin\n");
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status = tmio_ioread32(ctl + CTL_STATUS);
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irq_mask = tmio_ioread32(ctl + CTL_IRQ_MASK);
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status = sd_ctrl_read32(host, CTL_STATUS);
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irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
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ireg = status & TMIO_MASK_IRQ & ~irq_mask;
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pr_debug_status(status);
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pr_debug_status(ireg);
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if (!ireg) {
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disable_mmc_irqs(ctl, status & ~irq_mask);
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disable_mmc_irqs(host, status & ~irq_mask);
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pr_debug("tmio_mmc: Spurious irq, disabling! "
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"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
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@ -337,7 +324,7 @@ static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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while (ireg) {
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/* Card insert / remove attempts */
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if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
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ack_mmc_irqs(ctl, TMIO_STAT_CARD_INSERT |
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ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
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TMIO_STAT_CARD_REMOVE);
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mmc_detect_change(host->mmc, 0);
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}
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@ -349,25 +336,25 @@ static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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/* Command completion */
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if (ireg & TMIO_MASK_CMD) {
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ack_mmc_irqs(ctl, TMIO_MASK_CMD);
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ack_mmc_irqs(host, TMIO_MASK_CMD);
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tmio_mmc_cmd_irq(host, status);
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}
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/* Data transfer */
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if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
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ack_mmc_irqs(ctl, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
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ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
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tmio_mmc_pio_irq(host);
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}
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/* Data transfer completion */
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if (ireg & TMIO_STAT_DATAEND) {
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ack_mmc_irqs(ctl, TMIO_STAT_DATAEND);
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ack_mmc_irqs(host, TMIO_STAT_DATAEND);
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tmio_mmc_data_irq(host);
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}
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/* Check status - keep going until we've handled it all */
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status = tmio_ioread32(ctl + CTL_STATUS);
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irq_mask = tmio_ioread32(ctl + CTL_IRQ_MASK);
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status = sd_ctrl_read32(host, CTL_STATUS);
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irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
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ireg = status & TMIO_MASK_IRQ & ~irq_mask;
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pr_debug("Status at end of loop: %08x\n", status);
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@ -382,8 +369,6 @@ out:
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static int tmio_mmc_start_data(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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void __iomem *ctl = host->ctl;
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pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
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data->blksz, data->blocks);
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@ -398,8 +383,8 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host,
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host->data = data;
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/* Set transfer length / blocksize */
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tmio_iowrite16(data->blksz, ctl + CTL_SD_XFER_LEN);
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tmio_iowrite16(data->blocks, ctl + CTL_XFER_BLK_COUNT);
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sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
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sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
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return 0;
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}
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@ -440,8 +425,6 @@ fail:
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static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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void __iomem *cnf = host->cnf;
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void __iomem *ctl = host->ctl;
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if (ios->clock)
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tmio_mmc_set_clock(host, ios->clock);
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@ -449,12 +432,12 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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/* Power sequence - OFF -> ON -> UP */
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switch (ios->power_mode) {
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case MMC_POWER_OFF: /* power down SD bus */
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tmio_iowrite8(0x00, cnf + CNF_PWR_CTL_2);
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sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
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tmio_mmc_clk_stop(host);
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break;
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case MMC_POWER_ON: /* power up SD bus */
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tmio_iowrite8(0x02, cnf + CNF_PWR_CTL_2);
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sd_config_write8(host, CNF_PWR_CTL_2, 0x02);
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break;
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case MMC_POWER_UP: /* start bus clock */
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tmio_mmc_clk_start(host);
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@ -463,10 +446,10 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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switch (ios->bus_width) {
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case MMC_BUS_WIDTH_1:
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tmio_iowrite16(0x80e0, ctl + CTL_SD_MEM_CARD_OPT);
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sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
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break;
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case MMC_BUS_WIDTH_4:
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tmio_iowrite16(0x00e0, ctl + CTL_SD_MEM_CARD_OPT);
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sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
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break;
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}
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@ -477,9 +460,8 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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static int tmio_mmc_get_ro(struct mmc_host *mmc)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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void __iomem *ctl = host->ctl;
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return (tmio_ioread16(ctl + CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
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return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
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}
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static struct mmc_host_ops tmio_mmc_ops = {
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@ -509,12 +491,12 @@ static int tmio_mmc_resume(struct platform_device *dev)
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struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
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struct mmc_host *mmc = platform_get_drvdata(dev);
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struct tmio_mmc_host *host = mmc_priv(mmc);
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void __iomem *cnf = host->cnf;
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int ret = 0;
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/* Enable the MMC/SD Control registers */
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tmio_iowrite16(SDCREN, cnf + CNF_CMD);
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tmio_iowrite32(dev->resource[0].start & 0xfffe, cnf + CNF_CTL_BASE);
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sd_config_write16(host, CNF_CMD, SDCREN);
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sd_config_write32(host, CNF_CTL_BASE,
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(dev->resource[0].start >> host->bus_shift) & 0xfffe);
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/* Tell the MFD core we are ready to be enabled */
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if (cell->enable) {
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@ -566,6 +548,9 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
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host->mmc = mmc;
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platform_set_drvdata(dev, mmc);
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/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
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host->bus_shift = resource_size(res_ctl) >> 10;
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host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
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if (!host->ctl)
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goto host_free;
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@ -581,9 +566,9 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
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mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
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/* Enable the MMC/SD Control registers */
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tmio_iowrite16(SDCREN, host->cnf + CNF_CMD);
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tmio_iowrite32(dev->resource[0].start & 0xfffe,
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host->cnf + CNF_CTL_BASE);
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sd_config_write16(host, CNF_CMD, SDCREN);
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sd_config_write32(host, CNF_CTL_BASE,
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(dev->resource[0].start >> host->bus_shift) & 0xfffe);
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/* Tell the MFD core we are ready to be enabled */
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if (cell->enable) {
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@ -593,13 +578,13 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
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}
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/* Disable SD power during suspend */
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tmio_iowrite8(0x01, host->cnf + CNF_PWR_CTL_3);
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sd_config_write8(host, CNF_PWR_CTL_3, 0x01);
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/* The below is required but why? FIXME */
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tmio_iowrite8(0x1f, host->cnf + CNF_STOP_CLK_CTL);
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sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);
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/* Power down SD bus*/
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tmio_iowrite8(0x0, host->cnf + CNF_PWR_CTL_2);
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sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
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tmio_mmc_clk_stop(host);
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reset(host);
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||||
@ -610,7 +595,7 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
|
||||
else
|
||||
goto unmap_cnf;
|
||||
|
||||
disable_mmc_irqs(host->ctl, TMIO_MASK_ALL);
|
||||
disable_mmc_irqs(host, TMIO_MASK_ALL);
|
||||
|
||||
ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED, "tmio-mmc",
|
||||
host);
|
||||
@ -625,7 +610,7 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
|
||||
(unsigned long)host->ctl, host->irq);
|
||||
|
||||
/* Unmask the IRQs we want to know about */
|
||||
enable_mmc_irqs(host->ctl, TMIO_MASK_IRQ);
|
||||
enable_mmc_irqs(host, TMIO_MASK_IRQ);
|
||||
|
||||
return 0;
|
||||
|
||||
|
@ -83,34 +83,36 @@
|
||||
TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
|
||||
#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
|
||||
|
||||
#define enable_mmc_irqs(ctl, i) \
|
||||
|
||||
#define enable_mmc_irqs(host, i) \
|
||||
do { \
|
||||
u32 mask;\
|
||||
mask = tmio_ioread32((ctl) + CTL_IRQ_MASK); \
|
||||
mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
|
||||
mask &= ~((i) & TMIO_MASK_IRQ); \
|
||||
tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \
|
||||
sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
|
||||
} while (0)
|
||||
|
||||
#define disable_mmc_irqs(ctl, i) \
|
||||
#define disable_mmc_irqs(host, i) \
|
||||
do { \
|
||||
u32 mask;\
|
||||
mask = tmio_ioread32((ctl) + CTL_IRQ_MASK); \
|
||||
mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
|
||||
mask |= ((i) & TMIO_MASK_IRQ); \
|
||||
tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \
|
||||
sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
|
||||
} while (0)
|
||||
|
||||
#define ack_mmc_irqs(ctl, i) \
|
||||
#define ack_mmc_irqs(host, i) \
|
||||
do { \
|
||||
u32 mask;\
|
||||
mask = tmio_ioread32((ctl) + CTL_STATUS); \
|
||||
mask = sd_ctrl_read32((host), CTL_STATUS); \
|
||||
mask &= ~((i) & TMIO_MASK_IRQ); \
|
||||
tmio_iowrite32(mask, (ctl) + CTL_STATUS); \
|
||||
sd_ctrl_write32((host), CTL_STATUS, mask); \
|
||||
} while (0)
|
||||
|
||||
|
||||
struct tmio_mmc_host {
|
||||
void __iomem *cnf;
|
||||
void __iomem *ctl;
|
||||
unsigned long bus_shift;
|
||||
struct mmc_command *cmd;
|
||||
struct mmc_request *mrq;
|
||||
struct mmc_data *data;
|
||||
@ -123,6 +125,63 @@ struct tmio_mmc_host {
|
||||
unsigned int sg_off;
|
||||
};
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
|
||||
{
|
||||
return readw(host->ctl + (addr << host->bus_shift));
|
||||
}
|
||||
|
||||
static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
|
||||
u16 *buf, int count)
|
||||
{
|
||||
readsw(host->ctl + (addr << host->bus_shift), buf, count);
|
||||
}
|
||||
|
||||
static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
|
||||
{
|
||||
return readw(host->ctl + (addr << host->bus_shift)) |
|
||||
readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
|
||||
}
|
||||
|
||||
static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
|
||||
u16 val)
|
||||
{
|
||||
writew(val, host->ctl + (addr << host->bus_shift));
|
||||
}
|
||||
|
||||
static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
|
||||
u16 *buf, int count)
|
||||
{
|
||||
writesw(host->ctl + (addr << host->bus_shift), buf, count);
|
||||
}
|
||||
|
||||
static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
|
||||
u32 val)
|
||||
{
|
||||
writew(val, host->ctl + (addr << host->bus_shift));
|
||||
writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
|
||||
}
|
||||
|
||||
static inline void sd_config_write8(struct tmio_mmc_host *host, int addr,
|
||||
u8 val)
|
||||
{
|
||||
writeb(val, host->cnf + (addr << host->bus_shift));
|
||||
}
|
||||
|
||||
static inline void sd_config_write16(struct tmio_mmc_host *host, int addr,
|
||||
u16 val)
|
||||
{
|
||||
writew(val, host->cnf + (addr << host->bus_shift));
|
||||
}
|
||||
|
||||
static inline void sd_config_write32(struct tmio_mmc_host *host, int addr,
|
||||
u32 val)
|
||||
{
|
||||
writew(val, host->cnf + (addr << host->bus_shift));
|
||||
writew(val >> 16, host->cnf + ((addr + 2) << host->bus_shift));
|
||||
}
|
||||
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/blkdev.h>
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user