forked from Minki/linux
ARM: pxa: avoid accessing interrupt registers directly
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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9c86441081
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5d284e353e
@ -104,4 +104,11 @@
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#define NR_IRQS (IRQ_BOARD_START)
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#define NR_IRQS (IRQ_BOARD_START)
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#ifndef __ASSEMBLY__
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struct irq_data;
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void pxa_mask_irq(struct irq_data *);
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void pxa_unmask_irq(struct irq_data *);
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#endif
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#endif /* __ASM_MACH_IRQS_H */
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#endif /* __ASM_MACH_IRQS_H */
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@ -1,30 +0,0 @@
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#ifndef __ASM_MACH_REGS_INTC_H
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#define __ASM_MACH_REGS_INTC_H
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#include <mach/hardware.h>
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/*
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* Interrupt Controller
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*/
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#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */
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#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */
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#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */
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#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */
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#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */
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#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */
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#define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */
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#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
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#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */
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#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */
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#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */
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#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */
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#define ICIP3 __REG(0x40D00130) /* Interrupt Controller IRQ Pending Register 3 */
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#define ICMR3 __REG(0x40D00134) /* Interrupt Controller Mask Register 3 */
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#define ICLR3 __REG(0x40D00138) /* Interrupt Controller Level Register 3 */
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#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */
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#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */
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#endif /* __ASM_MACH_REGS_INTC_H */
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@ -64,7 +64,7 @@ static inline void __iomem *irq_base(int i)
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return (void __iomem *)io_p2v(phys_base[i]);
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return (void __iomem *)io_p2v(phys_base[i]);
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}
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}
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static void pxa_mask_irq(struct irq_data *d)
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void pxa_mask_irq(struct irq_data *d)
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{
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{
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void __iomem *base = irq_data_get_irq_chip_data(d);
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void __iomem *base = irq_data_get_irq_chip_data(d);
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uint32_t icmr = __raw_readl(base + ICMR);
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uint32_t icmr = __raw_readl(base + ICMR);
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@ -73,7 +73,7 @@ static void pxa_mask_irq(struct irq_data *d)
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__raw_writel(icmr, base + ICMR);
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__raw_writel(icmr, base + ICMR);
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}
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}
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static void pxa_unmask_irq(struct irq_data *d)
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void pxa_unmask_irq(struct irq_data *d)
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{
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{
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void __iomem *base = irq_data_get_irq_chip_data(d);
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void __iomem *base = irq_data_get_irq_chip_data(d);
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uint32_t icmr = __raw_readl(base + ICMR);
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uint32_t icmr = __raw_readl(base + ICMR);
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@ -31,7 +31,6 @@
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#include <mach/ohci.h>
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#include <mach/ohci.h>
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#include <mach/pm.h>
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#include <mach/pm.h>
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#include <mach/dma.h>
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#include <mach/dma.h>
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#include <mach/regs-intc.h>
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#include <mach/smemc.h>
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#include <mach/smemc.h>
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#include "generic.h"
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#include "generic.h"
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@ -328,13 +327,13 @@ static void pxa_ack_ext_wakeup(struct irq_data *d)
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static void pxa_mask_ext_wakeup(struct irq_data *d)
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static void pxa_mask_ext_wakeup(struct irq_data *d)
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{
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{
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ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
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pxa_mask_irq(d);
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PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
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PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
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}
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}
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static void pxa_unmask_ext_wakeup(struct irq_data *d)
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static void pxa_unmask_ext_wakeup(struct irq_data *d)
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{
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{
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ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
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pxa_unmask_irq(d);
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PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
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PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
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}
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}
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@ -27,7 +27,6 @@
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#include <mach/reset.h>
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#include <mach/reset.h>
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#include <mach/pm.h>
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#include <mach/pm.h>
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#include <mach/dma.h>
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#include <mach/dma.h>
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#include <mach/regs-intc.h>
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#include "generic.h"
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#include "generic.h"
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#include "devices.h"
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#include "devices.h"
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