Merge git://git.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86
* git://git.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86: x86: force timer broadcast on late AMD C1E detection x86: move local APIC timer init to the end of start_secondary() clockevents: introduce force broadcast notifier x86: fix missing include for vsyscall
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commit
59d66ce238
@ -10,6 +10,7 @@
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#include <asm/pgtable.h>
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#include <asm/mce.h>
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#include <asm/nmi.h>
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#include <asm/vsyscall.h>
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#define MAX_PATCH_LEN (255-1)
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@ -964,8 +964,34 @@ void __init setup_boot_APIC_clock (void)
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setup_APIC_timer();
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}
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/*
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* AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the
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* C1E flag only in the secondary CPU, so when we detect the wreckage
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* we already have enabled the boot CPU local apic timer. Check, if
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* disable_apic_timer is set and the DUMMY flag is cleared. If yes,
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* set the DUMMY flag again and force the broadcast mode in the
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* clockevents layer.
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*/
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void __cpuinit check_boot_apic_timer_broadcast(void)
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{
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struct clock_event_device *levt = &per_cpu(lapic_events, boot_cpu_id);
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if (!disable_apic_timer ||
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(lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY))
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return;
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printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n");
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lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY;
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levt->features |= CLOCK_EVT_FEAT_DUMMY;
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local_irq_enable();
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, &boot_cpu_id);
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local_irq_disable();
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}
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void __cpuinit setup_secondary_APIC_clock(void)
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{
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check_boot_apic_timer_broadcast();
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setup_APIC_timer();
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}
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@ -335,11 +335,6 @@ void __cpuinit start_secondary(void)
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*/
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check_tsc_sync_target();
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Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());
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setup_secondary_APIC_clock();
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Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
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if (nmi_watchdog == NMI_IO_APIC) {
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disable_8259A_irq(0);
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enable_NMI_through_LVT0(NULL);
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@ -374,6 +369,8 @@ void __cpuinit start_secondary(void)
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unlock_ipi_call_lock();
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setup_secondary_APIC_clock();
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cpu_idle();
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}
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@ -31,6 +31,7 @@ enum clock_event_nofitiers {
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CLOCK_EVT_NOTIFY_ADD,
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CLOCK_EVT_NOTIFY_BROADCAST_ON,
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CLOCK_EVT_NOTIFY_BROADCAST_OFF,
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CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
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CLOCK_EVT_NOTIFY_BROADCAST_ENTER,
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CLOCK_EVT_NOTIFY_BROADCAST_EXIT,
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CLOCK_EVT_NOTIFY_SUSPEND,
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@ -217,26 +217,43 @@ static void tick_do_broadcast_on_off(void *why)
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bc = tick_broadcast_device.evtdev;
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/*
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* Is the device in broadcast mode forever or is it not
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* affected by the powerstate ?
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* Is the device not affected by the powerstate ?
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*/
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if (!dev || !tick_device_is_functional(dev) ||
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!(dev->features & CLOCK_EVT_FEAT_C3STOP))
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if (!dev || !(dev->features & CLOCK_EVT_FEAT_C3STOP))
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goto out;
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if (*reason == CLOCK_EVT_NOTIFY_BROADCAST_ON) {
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/*
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* Defect device ?
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*/
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if (!tick_device_is_functional(dev)) {
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/*
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* AMD C1E wreckage fixup:
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*
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* Device was registered functional in the first
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* place. Now the secondary CPU detected the C1E
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* misfeature and notifies us to fix it up
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*/
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if (*reason != CLOCK_EVT_NOTIFY_BROADCAST_FORCE)
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goto out;
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}
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switch (*reason) {
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case CLOCK_EVT_NOTIFY_BROADCAST_ON:
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case CLOCK_EVT_NOTIFY_BROADCAST_FORCE:
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if (!cpu_isset(cpu, tick_broadcast_mask)) {
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cpu_set(cpu, tick_broadcast_mask);
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if (td->mode == TICKDEV_MODE_PERIODIC)
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clockevents_set_mode(dev,
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CLOCK_EVT_MODE_SHUTDOWN);
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}
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} else {
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break;
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case CLOCK_EVT_NOTIFY_BROADCAST_OFF:
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if (cpu_isset(cpu, tick_broadcast_mask)) {
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cpu_clear(cpu, tick_broadcast_mask);
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if (td->mode == TICKDEV_MODE_PERIODIC)
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tick_setup_periodic(dev, 0);
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}
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break;
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}
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if (cpus_empty(tick_broadcast_mask))
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@ -345,6 +345,7 @@ static int tick_notify(struct notifier_block *nb, unsigned long reason,
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case CLOCK_EVT_NOTIFY_BROADCAST_ON:
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case CLOCK_EVT_NOTIFY_BROADCAST_OFF:
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case CLOCK_EVT_NOTIFY_BROADCAST_FORCE:
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tick_broadcast_on_off(reason, dev);
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break;
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