Merge branch 'net-phy-remove-genphy_config_init'
Heiner Kallweit says: ==================== net: phy: remove genphy_config_init Supported PHY features are either auto-detected or explicitly set. In both cases calling genphy_config_init isn't needed. All that genphy_config_init does is removing features that are set as supported but can't be auto-detected. Basically it duplicates the code in genphy_read_abilities. Therefore remove genphy_config_init. v2: - remove call also from new adin driver v3: - pass NULL as config_init function pointer for dp83848 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
59d0f749bf
@ -356,10 +356,6 @@ static int adin_config_init(struct phy_device *phydev)
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phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
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rc = genphy_config_init(phydev);
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if (rc < 0)
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return rc;
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rc = adin_config_rgmii_mode(phydev);
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if (rc < 0)
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return rc;
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@ -249,10 +249,6 @@ static int at803x_config_init(struct phy_device *phydev)
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{
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int ret;
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ret = genphy_config_init(phydev);
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if (ret < 0)
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return ret;
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/* The RX and TX delay default is:
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* after HW reset: RX delay enabled and TX delay disabled
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* after SW reset: RX delay enabled, while TX delay retains the
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@ -254,13 +254,8 @@ static int dp83822_config_intr(struct phy_device *phydev)
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static int dp83822_config_init(struct phy_device *phydev)
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{
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int err;
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int value;
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err = genphy_config_init(phydev);
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if (err < 0)
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return err;
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value = DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON | DP83822_WOL_EN;
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return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
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@ -68,13 +68,8 @@ static int dp83848_config_intr(struct phy_device *phydev)
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static int dp83848_config_init(struct phy_device *phydev)
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{
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int err;
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int val;
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err = genphy_config_init(phydev);
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if (err < 0)
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return err;
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/* DP83620 always reports Auto Negotiation Ability on BMSR. Instead,
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* we check initial value of BMCR Auto negotiation enable bit
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*/
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@ -113,13 +108,13 @@ MODULE_DEVICE_TABLE(mdio, dp83848_tbl);
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static struct phy_driver dp83848_driver[] = {
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DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY",
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genphy_config_init),
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NULL),
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DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY",
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genphy_config_init),
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NULL),
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DP83848_PHY_DRIVER(TI_DP83620_PHY_ID, "TI DP83620 10/100 Mbps PHY",
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dp83848_config_init),
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DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY",
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genphy_config_init),
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NULL),
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};
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module_phy_driver(dp83848_driver);
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@ -277,10 +277,6 @@ static int dp83811_config_init(struct phy_device *phydev)
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{
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int value, err;
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err = genphy_config_init(phydev);
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if (err < 0)
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return err;
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value = phy_read(phydev, MII_DP83811_SGMII_CTRL);
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if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
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err = phy_write(phydev, MII_DP83811_SGMII_CTRL,
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@ -136,7 +136,7 @@ static int meson_gxl_config_init(struct phy_device *phydev)
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if (ret)
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return ret;
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return genphy_config_init(phydev);
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return 0;
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}
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/* This function is provided to cope with the possible failures of this phy
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@ -305,7 +305,6 @@ static int lan88xx_config_init(struct phy_device *phydev)
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{
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int val;
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genphy_config_init(phydev);
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/*Zerodetect delay enable */
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val = phy_read_mmd(phydev, MDIO_MMD_PCS,
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PHY_ARDENNES_MMD_DEV_3_PHY_CFG);
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@ -48,7 +48,6 @@ static struct phy_driver microchip_t1_phy_driver[] = {
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.features = PHY_BASIC_T1_FEATURES,
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.config_init = genphy_config_init,
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.config_aneg = genphy_config_aneg,
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.ack_interrupt = lan87xx_phy_ack_interrupt,
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@ -1725,7 +1725,7 @@ static int vsc8584_config_init(struct phy_device *phydev)
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return ret;
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}
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return genphy_config_init(phydev);
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return 0;
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err:
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mutex_unlock(&phydev->mdio.bus->mdio_lock);
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@ -1767,7 +1767,7 @@ static int vsc85xx_config_init(struct phy_device *phydev)
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return rc;
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}
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return genphy_config_init(phydev);
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return 0;
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}
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static int vsc8584_did_interrupt(struct phy_device *phydev)
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@ -1885,57 +1885,6 @@ int genphy_soft_reset(struct phy_device *phydev)
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}
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EXPORT_SYMBOL(genphy_soft_reset);
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int genphy_config_init(struct phy_device *phydev)
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{
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int val;
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__ETHTOOL_DECLARE_LINK_MODE_MASK(features) = { 0, };
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linkmode_set_bit_array(phy_basic_ports_array,
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ARRAY_SIZE(phy_basic_ports_array),
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features);
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linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, features);
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linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, features);
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/* Do we support autonegotiation? */
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val = phy_read(phydev, MII_BMSR);
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if (val < 0)
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return val;
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if (val & BMSR_ANEGCAPABLE)
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linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, features);
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if (val & BMSR_100FULL)
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linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, features);
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if (val & BMSR_100HALF)
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linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, features);
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if (val & BMSR_10FULL)
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linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, features);
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if (val & BMSR_10HALF)
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linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, features);
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if (val & BMSR_ESTATEN) {
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val = phy_read(phydev, MII_ESTATUS);
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if (val < 0)
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return val;
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if (val & ESTATUS_1000_TFULL)
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linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
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features);
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if (val & ESTATUS_1000_THALF)
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linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
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features);
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if (val & ESTATUS_1000_XFULL)
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linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
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features);
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}
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linkmode_and(phydev->supported, phydev->supported, features);
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linkmode_and(phydev->advertising, phydev->advertising, features);
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return 0;
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}
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EXPORT_SYMBOL(genphy_config_init);
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/**
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* genphy_read_abilities - read PHY abilities from Clause 22 registers
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* @phydev: target phy_device struct
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@ -197,7 +197,7 @@ static int vsc738x_config_init(struct phy_device *phydev)
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vsc73xx_config_init(phydev);
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return genphy_config_init(phydev);
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return 0;
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}
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static int vsc739x_config_init(struct phy_device *phydev)
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@ -229,7 +229,7 @@ static int vsc739x_config_init(struct phy_device *phydev)
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vsc73xx_config_init(phydev);
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return genphy_config_init(phydev);
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return 0;
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}
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static int vsc73xx_config_aneg(struct phy_device *phydev)
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@ -267,7 +267,7 @@ static int vsc8601_config_init(struct phy_device *phydev)
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if (ret < 0)
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return ret;
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return genphy_config_init(phydev);
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return 0;
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}
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static int vsc824x_ack_interrupt(struct phy_device *phydev)
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@ -1069,7 +1069,6 @@ void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
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void phy_attached_info(struct phy_device *phydev);
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/* Clause 22 PHY */
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int genphy_config_init(struct phy_device *phydev);
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int genphy_read_abilities(struct phy_device *phydev);
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int genphy_setup_forced(struct phy_device *phydev);
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int genphy_restart_aneg(struct phy_device *phydev);
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@ -538,10 +538,6 @@ static int dsa_port_setup_phy_of(struct dsa_port *dp, bool enable)
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return PTR_ERR(phydev);
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if (enable) {
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err = genphy_config_init(phydev);
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if (err < 0)
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goto err_put_dev;
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err = genphy_resume(phydev);
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if (err < 0)
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goto err_put_dev;
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@ -589,7 +585,6 @@ static int dsa_port_fixed_link_register_of(struct dsa_port *dp)
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mode = PHY_INTERFACE_MODE_NA;
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phydev->interface = mode;
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genphy_config_init(phydev);
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genphy_read_status(phydev);
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if (ds->ops->adjust_link)
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