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phy: phy-mtk-tphy: fix NULL point of chip bank

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Chip bank of version-1 is initialized as NULL, but it's used
by pcie_phy_instance_power_on/off(), so assign it a right
address.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Chunfeng Yun 2017-09-21 18:31:48 +08:00 committed by Kishon Vijay Abraham I
parent 1df79cb3ba
commit 554a56fc83
1 changed files with 2 additions and 1 deletions
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3
drivers/phy/mediatek/phy-mtk-tphy.c
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@ -27,6 +27,7 @@
/* banks shared by multiple phys */ /* banks shared by multiple phys */
#define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */ #define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */
#define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */ #define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */
#define SSUSB_SIFSLV_V1_CHIP 0x300 /* shared by u3 phys */
/* u2 phy bank */ /* u2 phy bank */
#define SSUSB_SIFSLV_V1_U2PHY_COM 0x000 #define SSUSB_SIFSLV_V1_U2PHY_COM 0x000
/* u3/pcie/sata phy banks */ /* u3/pcie/sata phy banks */
@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
case PHY_TYPE_USB3: case PHY_TYPE_USB3:
case PHY_TYPE_PCIE: case PHY_TYPE_PCIE:
u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC; u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
u3_banks->chip = NULL; u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA; u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
break; break;