forked from Minki/linux
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc merge from Benjamin Herrenschmidt:
"Here's the powerpc batch for this merge window. It is going to be a
bit more nasty than usual as in touching things outside of
arch/powerpc mostly due to the big iSeriesectomy :-) We finally got
rid of the bugger (legacy iSeries support) which was a PITA to
maintain and that nobody really used anymore.
Here are some of the highlights:
- Legacy iSeries is gone. Thanks Stephen ! There's still some bits
and pieces remaining if you do a grep -ir series arch/powerpc but
they are harmless and will be removed in the next few weeks
hopefully.
- The 'fadump' functionality (Firmware Assisted Dump) replaces the
previous (equivalent) "pHyp assisted dump"... it's a rewrite of a
mechanism to get the hypervisor to do crash dumps on pSeries, the
new implementation hopefully being much more reliable. Thanks
Mahesh Salgaonkar.
- The "EEH" code (pSeries PCI error handling & recovery) got a big
spring cleaning, motivated by the need to be able to implement a
new backend for it on top of some new different type of firwmare.
The work isn't complete yet, but a good chunk of the cleanups is
there. Note that this adds a field to struct device_node which is
not very nice and which Grant objects to. I will have a patch soon
that moves that to a powerpc private data structure (hopefully
before rc1) and we'll improve things further later on (hopefully
getting rid of the need for that pointer completely). Thanks Gavin
Shan.
- I dug into our exception & interrupt handling code to improve the
way we do lazy interrupt handling (and make it work properly with
"edge" triggered interrupt sources), and while at it found & fixed
a wagon of issues in those areas, including adding support for page
fault retry & fatal signals on page faults.
- Your usual random batch of small fixes & updates, including a bunch
of new embedded boards, both Freescale and APM based ones, etc..."
I fixed up some conflicts with the generalized irq-domain changes from
Grant Likely, hopefully correctly.
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (141 commits)
powerpc/ps3: Do not adjust the wrapper load address
powerpc: Remove the rest of the legacy iSeries include files
powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces
init: Remove CONFIG_PPC_ISERIES
powerpc: Remove FW_FEATURE ISERIES from arch code
tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable
powerpc/spufs: Fix double unlocks
powerpc/5200: convert mpc5200 to use of_platform_populate()
powerpc/mpc5200: add options to mpc5200_defconfig
powerpc/mpc52xx: add a4m072 board support
powerpc/mpc5200: update mpc5200_defconfig to fit for charon board
Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup
powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board
powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board
MAINTAINERS: Update PowerPC 4xx tree
powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board
powerpc: document the FSL MPIC message register binding
powerpc: add support for MPIC message register API
powerpc/fsl: Added aliased MSIIR register address to MSI node in dts
powerpc/85xx: mpc8548cds - add 36-bit dts
...
This commit is contained in:
Linus Torvalds
commit
5375871d43
63
Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
Normal file
63
Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
Normal file
@ -0,0 +1,63 @@
|
||||
* FSL MPIC Message Registers
|
||||
|
||||
This binding specifies what properties must be available in the device tree
|
||||
representation of the message register blocks found in some FSL MPIC
|
||||
implementations.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Specifies the compatibility list for the message register
|
||||
block. The type shall be <string-list> and the value shall be of the form
|
||||
"fsl,mpic-v<version>-msgr", where <version> is the version number of
|
||||
the MPIC containing the message registers.
|
||||
|
||||
- reg: Specifies the base physical address(s) and size(s) of the
|
||||
message register block's addressable register space. The type shall be
|
||||
<prop-encoded-array>.
|
||||
|
||||
- interrupts: Specifies a list of interrupt-specifiers which are available
|
||||
for receiving interrupts. Interrupt-specifier consists of two cells: first
|
||||
cell is interrupt-number and second cell is level-sense. The type shall be
|
||||
<prop-encoded-array>.
|
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|
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Optional properties:
|
||||
|
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- mpic-msgr-receive-mask: Specifies what registers in the containing block
|
||||
are allowed to receive interrupts. The value is a bit mask where a set
|
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bit at bit 'n' indicates that message register 'n' can receive interrupts.
|
||||
Note that "bit 'n'" is numbered from LSB for PPC hardware. The type shall
|
||||
be <u32>. If not present, then all of the message registers in the block
|
||||
are available.
|
||||
|
||||
Aliases:
|
||||
|
||||
An alias should be created for every message register block. They are not
|
||||
required, though. However, a particular implementation of this binding
|
||||
may require aliases to be present. Aliases are of the form
|
||||
'mpic-msgr-block<n>', where <n> is an integer specifying the block's number.
|
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Numbers shall start at 0.
|
||||
|
||||
Example:
|
||||
|
||||
aliases {
|
||||
mpic-msgr-block0 = &mpic_msgr_block0;
|
||||
mpic-msgr-block1 = &mpic_msgr_block1;
|
||||
};
|
||||
|
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mpic_msgr_block0: mpic-msgr-block@41400 {
|
||||
compatible = "fsl,mpic-v3.1-msgr";
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||||
reg = <0x41400 0x200>;
|
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// Message registers 0 and 2 in this block can receive interrupts on
|
||||
// sources 0xb0 and 0xb2, respectively.
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interrupts = <0xb0 2 0xb2 2>;
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mpic-msgr-receive-mask = <0x5>;
|
||||
};
|
||||
|
||||
mpic_msgr_block1: mpic-msgr-block@42400 {
|
||||
compatible = "fsl,mpic-v3.1-msgr";
|
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reg = <0x42400 0x200>;
|
||||
// Message registers 0 and 2 in this block can receive interrupts on
|
||||
// sources 0xb4 and 0xb6, respectively.
|
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interrupts = <0xb4 2 0xb6 2>;
|
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mpic-msgr-receive-mask = <0x5>;
|
||||
};
|
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@ -56,7 +56,27 @@ PROPERTIES
|
||||
to the client. The presence of this property also mandates
|
||||
that any initialization related to interrupt sources shall
|
||||
be limited to sources explicitly referenced in the device tree.
|
||||
|
||||
|
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- big-endian
|
||||
Usage: optional
|
||||
Value type: <empty>
|
||||
If present the MPIC will be assumed to be big-endian. Some
|
||||
device-trees omit this property on MPIC nodes even when the MPIC is
|
||||
in fact big-endian, so certain boards override this property.
|
||||
|
||||
- single-cpu-affinity
|
||||
Usage: optional
|
||||
Value type: <empty>
|
||||
If present the MPIC will be assumed to only be able to route
|
||||
non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
|
||||
|
||||
- last-interrupt-source
|
||||
Usage: optional
|
||||
Value type: <u32>
|
||||
Some MPICs do not correctly report the number of hardware sources
|
||||
in the global feature registers. If specified, this field will
|
||||
override the value read from MPIC_GREG_FEATURE_LAST_SRC.
|
||||
|
||||
INTERRUPT SPECIFIER DEFINITION
|
||||
|
||||
Interrupt specifiers consists of 4 cells encoded as
|
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|
||||
@ -6,8 +6,10 @@ Required properties:
|
||||
etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
|
||||
the parent type.
|
||||
|
||||
- reg : should contain the address and the length of the shared message
|
||||
interrupt register set.
|
||||
- reg : It may contain one or two regions. The first region should contain
|
||||
the address and the length of the shared message interrupt register set.
|
||||
The second region should contain the address of aliased MSIIR register for
|
||||
platforms that have such an alias.
|
||||
|
||||
- msi-available-ranges: use <start count> style section to define which
|
||||
msi interrupt can be used in the 256 msi interrupts. This property is
|
||||
|
||||
270
Documentation/powerpc/firmware-assisted-dump.txt
Normal file
270
Documentation/powerpc/firmware-assisted-dump.txt
Normal file
@ -0,0 +1,270 @@
|
||||
|
||||
Firmware-Assisted Dump
|
||||
------------------------
|
||||
July 2011
|
||||
|
||||
The goal of firmware-assisted dump is to enable the dump of
|
||||
a crashed system, and to do so from a fully-reset system, and
|
||||
to minimize the total elapsed time until the system is back
|
||||
in production use.
|
||||
|
||||
- Firmware assisted dump (fadump) infrastructure is intended to replace
|
||||
the existing phyp assisted dump.
|
||||
- Fadump uses the same firmware interfaces and memory reservation model
|
||||
as phyp assisted dump.
|
||||
- Unlike phyp dump, fadump exports the memory dump through /proc/vmcore
|
||||
in the ELF format in the same way as kdump. This helps us reuse the
|
||||
kdump infrastructure for dump capture and filtering.
|
||||
- Unlike phyp dump, userspace tool does not need to refer any sysfs
|
||||
interface while reading /proc/vmcore.
|
||||
- Unlike phyp dump, fadump allows user to release all the memory reserved
|
||||
for dump, with a single operation of echo 1 > /sys/kernel/fadump_release_mem.
|
||||
- Once enabled through kernel boot parameter, fadump can be
|
||||
started/stopped through /sys/kernel/fadump_registered interface (see
|
||||
sysfs files section below) and can be easily integrated with kdump
|
||||
service start/stop init scripts.
|
||||
|
||||
Comparing with kdump or other strategies, firmware-assisted
|
||||
dump offers several strong, practical advantages:
|
||||
|
||||
-- Unlike kdump, the system has been reset, and loaded
|
||||
with a fresh copy of the kernel. In particular,
|
||||
PCI and I/O devices have been reinitialized and are
|
||||
in a clean, consistent state.
|
||||
-- Once the dump is copied out, the memory that held the dump
|
||||
is immediately available to the running kernel. And therefore,
|
||||
unlike kdump, fadump doesn't need a 2nd reboot to get back
|
||||
the system to the production configuration.
|
||||
|
||||
The above can only be accomplished by coordination with,
|
||||
and assistance from the Power firmware. The procedure is
|
||||
as follows:
|
||||
|
||||
-- The first kernel registers the sections of memory with the
|
||||
Power firmware for dump preservation during OS initialization.
|
||||
These registered sections of memory are reserved by the first
|
||||
kernel during early boot.
|
||||
|
||||
-- When a system crashes, the Power firmware will save
|
||||
the low memory (boot memory of size larger of 5% of system RAM
|
||||
or 256MB) of RAM to the previous registered region. It will
|
||||
also save system registers, and hardware PTE's.
|
||||
|
||||
NOTE: The term 'boot memory' means size of the low memory chunk
|
||||
that is required for a kernel to boot successfully when
|
||||
booted with restricted memory. By default, the boot memory
|
||||
size will be the larger of 5% of system RAM or 256MB.
|
||||
Alternatively, user can also specify boot memory size
|
||||
through boot parameter 'fadump_reserve_mem=' which will
|
||||
override the default calculated size. Use this option
|
||||
if default boot memory size is not sufficient for second
|
||||
kernel to boot successfully.
|
||||
|
||||
-- After the low memory (boot memory) area has been saved, the
|
||||
firmware will reset PCI and other hardware state. It will
|
||||
*not* clear the RAM. It will then launch the bootloader, as
|
||||
normal.
|
||||
|
||||
-- The freshly booted kernel will notice that there is a new
|
||||
node (ibm,dump-kernel) in the device tree, indicating that
|
||||
there is crash data available from a previous boot. During
|
||||
the early boot OS will reserve rest of the memory above
|
||||
boot memory size effectively booting with restricted memory
|
||||
size. This will make sure that the second kernel will not
|
||||
touch any of the dump memory area.
|
||||
|
||||
-- User-space tools will read /proc/vmcore to obtain the contents
|
||||
of memory, which holds the previous crashed kernel dump in ELF
|
||||
format. The userspace tools may copy this info to disk, or
|
||||
network, nas, san, iscsi, etc. as desired.
|
||||
|
||||
-- Once the userspace tool is done saving dump, it will echo
|
||||
'1' to /sys/kernel/fadump_release_mem to release the reserved
|
||||
memory back to general use, except the memory required for
|
||||
next firmware-assisted dump registration.
|
||||
|
||||
e.g.
|
||||
# echo 1 > /sys/kernel/fadump_release_mem
|
||||
|
||||
Please note that the firmware-assisted dump feature
|
||||
is only available on Power6 and above systems with recent
|
||||
firmware versions.
|
||||
|
||||
Implementation details:
|
||||
----------------------
|
||||
|
||||
During boot, a check is made to see if firmware supports
|
||||
this feature on that particular machine. If it does, then
|
||||
we check to see if an active dump is waiting for us. If yes
|
||||
then everything but boot memory size of RAM is reserved during
|
||||
early boot (See Fig. 2). This area is released once we finish
|
||||
collecting the dump from user land scripts (e.g. kdump scripts)
|
||||
that are run. If there is dump data, then the
|
||||
/sys/kernel/fadump_release_mem file is created, and the reserved
|
||||
memory is held.
|
||||
|
||||
If there is no waiting dump data, then only the memory required
|
||||
to hold CPU state, HPTE region, boot memory dump and elfcore
|
||||
header, is reserved at the top of memory (see Fig. 1). This area
|
||||
is *not* released: this region will be kept permanently reserved,
|
||||
so that it can act as a receptacle for a copy of the boot memory
|
||||
content in addition to CPU state and HPTE region, in the case a
|
||||
crash does occur.
|
||||
|
||||
o Memory Reservation during first kernel
|
||||
|
||||
Low memory Top of memory
|
||||
0 boot memory size |
|
||||
| | |<--Reserved dump area -->|
|
||||
V V | Permanent Reservation V
|
||||
+-----------+----------/ /----------+---+----+-----------+----+
|
||||
| | |CPU|HPTE| DUMP |ELF |
|
||||
+-----------+----------/ /----------+---+----+-----------+----+
|
||||
| ^
|
||||
| |
|
||||
\ /
|
||||
-------------------------------------------
|
||||
Boot memory content gets transferred to
|
||||
reserved area by firmware at the time of
|
||||
crash
|
||||
Fig. 1
|
||||
|
||||
o Memory Reservation during second kernel after crash
|
||||
|
||||
Low memory Top of memory
|
||||
0 boot memory size |
|
||||
| |<------------- Reserved dump area ----------- -->|
|
||||
V V V
|
||||
+-----------+----------/ /----------+---+----+-----------+----+
|
||||
| | |CPU|HPTE| DUMP |ELF |
|
||||
+-----------+----------/ /----------+---+----+-----------+----+
|
||||
| |
|
||||
V V
|
||||
Used by second /proc/vmcore
|
||||
kernel to boot
|
||||
Fig. 2
|
||||
|
||||
Currently the dump will be copied from /proc/vmcore to a
|
||||
a new file upon user intervention. The dump data available through
|
||||
/proc/vmcore will be in ELF format. Hence the existing kdump
|
||||
infrastructure (kdump scripts) to save the dump works fine with
|
||||
minor modifications.
|
||||
|
||||
The tools to examine the dump will be same as the ones
|
||||
used for kdump.
|
||||
|
||||
How to enable firmware-assisted dump (fadump):
|
||||
-------------------------------------
|
||||
|
||||
1. Set config option CONFIG_FA_DUMP=y and build kernel.
|
||||
2. Boot into linux kernel with 'fadump=on' kernel cmdline option.
|
||||
3. Optionally, user can also set 'fadump_reserve_mem=' kernel cmdline
|
||||
to specify size of the memory to reserve for boot memory dump
|
||||
preservation.
|
||||
|
||||
NOTE: If firmware-assisted dump fails to reserve memory then it will
|
||||
fallback to existing kdump mechanism if 'crashkernel=' option
|
||||
is set at kernel cmdline.
|
||||
|
||||
Sysfs/debugfs files:
|
||||
------------
|
||||
|
||||
Firmware-assisted dump feature uses sysfs file system to hold
|
||||
the control files and debugfs file to display memory reserved region.
|
||||
|
||||
Here is the list of files under kernel sysfs:
|
||||
|
||||
/sys/kernel/fadump_enabled
|
||||
|
||||
This is used to display the fadump status.
|
||||
0 = fadump is disabled
|
||||
1 = fadump is enabled
|
||||
|
||||
This interface can be used by kdump init scripts to identify if
|
||||
fadump is enabled in the kernel and act accordingly.
|
||||
|
||||
/sys/kernel/fadump_registered
|
||||
|
||||
This is used to display the fadump registration status as well
|
||||
as to control (start/stop) the fadump registration.
|
||||
0 = fadump is not registered.
|
||||
1 = fadump is registered and ready to handle system crash.
|
||||
|
||||
To register fadump echo 1 > /sys/kernel/fadump_registered and
|
||||
echo 0 > /sys/kernel/fadump_registered for un-register and stop the
|
||||
fadump. Once the fadump is un-registered, the system crash will not
|
||||
be handled and vmcore will not be captured. This interface can be
|
||||
easily integrated with kdump service start/stop.
|
||||
|
||||
/sys/kernel/fadump_release_mem
|
||||
|
||||
This file is available only when fadump is active during
|
||||
second kernel. This is used to release the reserved memory
|
||||
region that are held for saving crash dump. To release the
|
||||
reserved memory echo 1 to it:
|
||||
|
||||
echo 1 > /sys/kernel/fadump_release_mem
|
||||
|
||||
After echo 1, the content of the /sys/kernel/debug/powerpc/fadump_region
|
||||
file will change to reflect the new memory reservations.
|
||||
|
||||
The existing userspace tools (kdump infrastructure) can be easily
|
||||
enhanced to use this interface to release the memory reserved for
|
||||
dump and continue without 2nd reboot.
|
||||
|
||||
Here is the list of files under powerpc debugfs:
|
||||
(Assuming debugfs is mounted on /sys/kernel/debug directory.)
|
||||
|
||||
/sys/kernel/debug/powerpc/fadump_region
|
||||
|
||||
This file shows the reserved memory regions if fadump is
|
||||
enabled otherwise this file is empty. The output format
|
||||
is:
|
||||
<region>: [<start>-<end>] <reserved-size> bytes, Dumped: <dump-size>
|
||||
|
||||
e.g.
|
||||
Contents when fadump is registered during first kernel
|
||||
|
||||
# cat /sys/kernel/debug/powerpc/fadump_region
|
||||
CPU : [0x0000006ffb0000-0x0000006fff001f] 0x40020 bytes, Dumped: 0x0
|
||||
HPTE: [0x0000006fff0020-0x0000006fff101f] 0x1000 bytes, Dumped: 0x0
|
||||
DUMP: [0x0000006fff1020-0x0000007fff101f] 0x10000000 bytes, Dumped: 0x0
|
||||
|
||||
Contents when fadump is active during second kernel
|
||||
|
||||
# cat /sys/kernel/debug/powerpc/fadump_region
|
||||
CPU : [0x0000006ffb0000-0x0000006fff001f] 0x40020 bytes, Dumped: 0x40020
|
||||
HPTE: [0x0000006fff0020-0x0000006fff101f] 0x1000 bytes, Dumped: 0x1000
|
||||
DUMP: [0x0000006fff1020-0x0000007fff101f] 0x10000000 bytes, Dumped: 0x10000000
|
||||
: [0x00000010000000-0x0000006ffaffff] 0x5ffb0000 bytes, Dumped: 0x5ffb0000
|
||||
|
||||
NOTE: Please refer to Documentation/filesystems/debugfs.txt on
|
||||
how to mount the debugfs filesystem.
|
||||
|
||||
|
||||
TODO:
|
||||
-----
|
||||
o Need to come up with the better approach to find out more
|
||||
accurate boot memory size that is required for a kernel to
|
||||
boot successfully when booted with restricted memory.
|
||||
o The fadump implementation introduces a fadump crash info structure
|
||||
in the scratch area before the ELF core header. The idea of introducing
|
||||
this structure is to pass some important crash info data to the second
|
||||
kernel which will help second kernel to populate ELF core header with
|
||||
correct data before it gets exported through /proc/vmcore. The current
|
||||
design implementation does not address a possibility of introducing
|
||||
additional fields (in future) to this structure without affecting
|
||||
compatibility. Need to come up with the better approach to address this.
|
||||
The possible approaches are:
|
||||
1. Introduce version field for version tracking, bump up the version
|
||||
whenever a new field is added to the structure in future. The version
|
||||
field can be used to find out what fields are valid for the current
|
||||
version of the structure.
|
||||
2. Reserve the area of predefined size (say PAGE_SIZE) for this
|
||||
structure and have unused area as reserved (initialized to zero)
|
||||
for future field additions.
|
||||
The advantage of approach 1 over 2 is we don't need to reserve extra space.
|
||||
---
|
||||
Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
|
||||
This document is based on the original documentation written for phyp
|
||||
assisted dump by Linas Vepstas and Manish Ahuja.
|
||||
@ -2,7 +2,7 @@ Linux 2.6.x on MPC52xx family
|
||||
-----------------------------
|
||||
|
||||
For the latest info, go to http://www.246tNt.com/mpc52xx/
|
||||
|
||||
|
||||
To compile/use :
|
||||
|
||||
- U-Boot:
|
||||
@ -10,23 +10,23 @@ To compile/use :
|
||||
if you wish to ).
|
||||
# make lite5200_defconfig
|
||||
# make uImage
|
||||
|
||||
|
||||
then, on U-boot:
|
||||
=> tftpboot 200000 uImage
|
||||
=> tftpboot 400000 pRamdisk
|
||||
=> bootm 200000 400000
|
||||
|
||||
|
||||
- DBug:
|
||||
# <edit Makefile to set ARCH=ppc & CROSS_COMPILE=... ( also EXTRAVERSION
|
||||
if you wish to ).
|
||||
# make lite5200_defconfig
|
||||
# cp your_initrd.gz arch/ppc/boot/images/ramdisk.image.gz
|
||||
# make zImage.initrd
|
||||
# make
|
||||
# make zImage.initrd
|
||||
# make
|
||||
|
||||
then in DBug:
|
||||
DBug> dn -i zImage.initrd.lite5200
|
||||
|
||||
|
||||
|
||||
Some remarks :
|
||||
- The port is named mpc52xxx, and config options are PPC_MPC52xx. The MGT5100
|
||||
|
||||
@ -1,127 +0,0 @@
|
||||
|
||||
Hypervisor-Assisted Dump
|
||||
------------------------
|
||||
November 2007
|
||||
|
||||
The goal of hypervisor-assisted dump is to enable the dump of
|
||||
a crashed system, and to do so from a fully-reset system, and
|
||||
to minimize the total elapsed time until the system is back
|
||||
in production use.
|
||||
|
||||
As compared to kdump or other strategies, hypervisor-assisted
|
||||
dump offers several strong, practical advantages:
|
||||
|
||||
-- Unlike kdump, the system has been reset, and loaded
|
||||
with a fresh copy of the kernel. In particular,
|
||||
PCI and I/O devices have been reinitialized and are
|
||||
in a clean, consistent state.
|
||||
-- As the dump is performed, the dumped memory becomes
|
||||
immediately available to the system for normal use.
|
||||
-- After the dump is completed, no further reboots are
|
||||
required; the system will be fully usable, and running
|
||||
in its normal, production mode on its normal kernel.
|
||||
|
||||
The above can only be accomplished by coordination with,
|
||||
and assistance from the hypervisor. The procedure is
|
||||
as follows:
|
||||
|
||||
-- When a system crashes, the hypervisor will save
|
||||
the low 256MB of RAM to a previously registered
|
||||
save region. It will also save system state, system
|
||||
registers, and hardware PTE's.
|
||||
|
||||
-- After the low 256MB area has been saved, the
|
||||
hypervisor will reset PCI and other hardware state.
|
||||
It will *not* clear RAM. It will then launch the
|
||||
bootloader, as normal.
|
||||
|
||||
-- The freshly booted kernel will notice that there
|
||||
is a new node (ibm,dump-kernel) in the device tree,
|
||||
indicating that there is crash data available from
|
||||
a previous boot. It will boot into only 256MB of RAM,
|
||||
reserving the rest of system memory.
|
||||
|
||||
-- Userspace tools will parse /sys/kernel/release_region
|
||||
and read /proc/vmcore to obtain the contents of memory,
|
||||
which holds the previous crashed kernel. The userspace
|
||||
tools may copy this info to disk, or network, nas, san,
|
||||
iscsi, etc. as desired.
|
||||
|
||||
For Example: the values in /sys/kernel/release-region
|
||||
would look something like this (address-range pairs).
|
||||
CPU:0x177fee000-0x10000: HPTE:0x177ffe020-0x1000: /
|
||||
DUMP:0x177fff020-0x10000000, 0x10000000-0x16F1D370A
|
||||
|
||||
-- As the userspace tools complete saving a portion of
|
||||
dump, they echo an offset and size to
|
||||
/sys/kernel/release_region to release the reserved
|
||||
memory back to general use.
|
||||
|
||||
An example of this is:
|
||||
"echo 0x40000000 0x10000000 > /sys/kernel/release_region"
|
||||
which will release 256MB at the 1GB boundary.
|
||||
|
||||
Please note that the hypervisor-assisted dump feature
|
||||
is only available on Power6-based systems with recent
|
||||
firmware versions.
|
||||
|
||||
Implementation details:
|
||||
----------------------
|
||||
|
||||
During boot, a check is made to see if firmware supports
|
||||
this feature on this particular machine. If it does, then
|
||||
we check to see if a active dump is waiting for us. If yes
|
||||
then everything but 256 MB of RAM is reserved during early
|
||||
boot. This area is released once we collect a dump from user
|
||||
land scripts that are run. If there is dump data, then
|
||||
the /sys/kernel/release_region file is created, and
|
||||
the reserved memory is held.
|
||||
|
||||
If there is no waiting dump data, then only the highest
|
||||
256MB of the ram is reserved as a scratch area. This area
|
||||
is *not* released: this region will be kept permanently
|
||||
reserved, so that it can act as a receptacle for a copy
|
||||
of the low 256MB in the case a crash does occur. See,
|
||||
however, "open issues" below, as to whether
|
||||
such a reserved region is really needed.
|
||||
|
||||
Currently the dump will be copied from /proc/vmcore to a
|
||||
a new file upon user intervention. The starting address
|
||||
to be read and the range for each data point in provided
|
||||
in /sys/kernel/release_region.
|
||||
|
||||
The tools to examine the dump will be same as the ones
|
||||
used for kdump.
|
||||
|
||||
General notes:
|
||||
--------------
|
||||
Security: please note that there are potential security issues
|
||||
with any sort of dump mechanism. In particular, plaintext
|
||||
(unencrypted) data, and possibly passwords, may be present in
|
||||
the dump data. Userspace tools must take adequate precautions to
|
||||
preserve security.
|
||||
|
||||
Open issues/ToDo:
|
||||
------------
|
||||
o The various code paths that tell the hypervisor that a crash
|
||||
occurred, vs. it simply being a normal reboot, should be
|
||||
reviewed, and possibly clarified/fixed.
|
||||
|
||||
o Instead of using /sys/kernel, should there be a /sys/dump
|
||||
instead? There is a dump_subsys being created by the s390 code,
|
||||
perhaps the pseries code should use a similar layout as well.
|
||||
|
||||
o Is reserving a 256MB region really required? The goal of
|
||||
reserving a 256MB scratch area is to make sure that no
|
||||
important crash data is clobbered when the hypervisor
|
||||
save low mem to the scratch area. But, if one could assure
|
||||
that nothing important is located in some 256MB area, then
|
||||
it would not need to be reserved. Something that can be
|
||||
improved in subsequent versions.
|
||||
|
||||
o Still working the kdump team to integrate this with kdump,
|
||||
some work remains but this would not affect the current
|
||||
patches.
|
||||
|
||||
o Still need to write a shell script, to copy the dump away.
|
||||
Currently I am parsing it manually.
|
||||
@ -4071,7 +4071,7 @@ M: Josh Boyer <jwboyer@gmail.com>
|
||||
M: Matt Porter <mporter@kernel.crashing.org>
|
||||
W: http://www.penguinppc.org/
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
T: git git://git.infradead.org/users/jwboyer/powerpc-4xx.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git
|
||||
S: Maintained
|
||||
F: arch/powerpc/platforms/40x/
|
||||
F: arch/powerpc/platforms/44x/
|
||||
|
||||
@ -134,6 +134,7 @@ config PPC
|
||||
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
|
||||
select HAVE_GENERIC_HARDIRQS
|
||||
select HAVE_SPARSE_IRQ
|
||||
select SPARSE_IRQ
|
||||
select IRQ_PER_CPU
|
||||
select IRQ_DOMAIN
|
||||
select GENERIC_IRQ_SHOW
|
||||
@ -377,13 +378,16 @@ config CRASH_DUMP
|
||||
The same kernel binary can be used as production kernel and dump
|
||||
capture kernel.
|
||||
|
||||
config PHYP_DUMP
|
||||
bool "Hypervisor-assisted dump (EXPERIMENTAL)"
|
||||
depends on PPC_PSERIES && EXPERIMENTAL
|
||||
config FA_DUMP
|
||||
bool "Firmware-assisted dump"
|
||||
depends on PPC64 && PPC_RTAS && CRASH_DUMP
|
||||
help
|
||||
Hypervisor-assisted dump is meant to be a kdump replacement
|
||||
offering robustness and speed not possible without system
|
||||
hypervisor assistance.
|
||||
A robust mechanism to get reliable kernel crash dump with
|
||||
assistance from firmware. This approach does not use kexec,
|
||||
instead firmware assists in booting the kdump kernel
|
||||
while preserving memory contents. Firmware-assisted dump
|
||||
is meant to be a kdump replacement offering robustness and
|
||||
speed not possible without system firmware assistance.
|
||||
|
||||
If unsure, say "N"
|
||||
|
||||
@ -612,7 +616,7 @@ endmenu
|
||||
|
||||
config ISA_DMA_API
|
||||
bool
|
||||
default !PPC_ISERIES || PCI
|
||||
default PCI
|
||||
|
||||
menu "Bus options"
|
||||
|
||||
|
||||
@ -196,13 +196,6 @@ config PPC_EARLY_DEBUG_MAPLE
|
||||
help
|
||||
Select this to enable early debugging for Maple.
|
||||
|
||||
config PPC_EARLY_DEBUG_ISERIES
|
||||
bool "iSeries HV Console"
|
||||
depends on PPC_ISERIES
|
||||
help
|
||||
Select this to enable early debugging for legacy iSeries. You need
|
||||
to hit "Ctrl-x Ctrl-x" to see the messages on the console.
|
||||
|
||||
config PPC_EARLY_DEBUG_PAS_REALMODE
|
||||
bool "PA Semi real mode"
|
||||
depends on PPC_PASEMI
|
||||
|
||||
@ -157,6 +157,7 @@ core-y += arch/powerpc/kernel/ \
|
||||
arch/powerpc/net/
|
||||
core-$(CONFIG_XMON) += arch/powerpc/xmon/
|
||||
core-$(CONFIG_KVM) += arch/powerpc/kvm/
|
||||
core-$(CONFIG_PERF_EVENTS) += arch/powerpc/perf/
|
||||
|
||||
drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
|
||||
|
||||
|
||||
@ -184,7 +184,6 @@ image-$(CONFIG_PPC_EFIKA) += zImage.chrp
|
||||
image-$(CONFIG_PPC_PMAC) += zImage.pmac
|
||||
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
|
||||
image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800
|
||||
image-$(CONFIG_PPC_ISERIES) += zImage.iseries
|
||||
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
|
||||
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
|
||||
|
||||
@ -247,7 +246,7 @@ image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
|
||||
image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads
|
||||
image-$(CONFIG_MPC8560_ADS) += cuImage.mpc8560ads
|
||||
image-$(CONFIG_MPC85xx_CDS) += cuImage.mpc8541cds \
|
||||
cuImage.mpc8548cds \
|
||||
cuImage.mpc8548cds_32b \
|
||||
cuImage.mpc8555cds
|
||||
image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds
|
||||
image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \
|
||||
@ -311,12 +310,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
|
||||
$(obj)/vmlinux.strip: vmlinux
|
||||
$(STRIP) -s -R .comment $< -o $@
|
||||
|
||||
# The iseries hypervisor won't take an ET_DYN executable, so this
|
||||
# changes the type (byte 17) in the file to ET_EXEC (2).
|
||||
$(obj)/zImage.iseries: vmlinux
|
||||
$(STRIP) -s -R .comment $< -o $@
|
||||
printf "\x02" | dd of=$@ conv=notrunc bs=1 seek=17
|
||||
|
||||
$(obj)/uImage: vmlinux $(wrapperbits)
|
||||
$(call if_changed,wrap,uboot)
|
||||
|
||||
@ -364,7 +357,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
|
||||
# anything not in $(targets)
|
||||
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
|
||||
zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
|
||||
zImage.iseries zImage.miboot zImage.pmac zImage.pseries \
|
||||
zImage.miboot zImage.pmac zImage.pseries \
|
||||
zImage.maple simpleImage.* otheros.bld *.dtb
|
||||
|
||||
# clean up files cached by wrapper
|
||||
|
||||
168
arch/powerpc/boot/dts/a4m072.dts
Normal file
168
arch/powerpc/boot/dts/a4m072.dts
Normal file
@ -0,0 +1,168 @@
|
||||
/*
|
||||
* a4m072 board Device Tree Source
|
||||
*
|
||||
* Copyright (C) 2011 DENX Software Engineering GmbH
|
||||
* Heiko Schocher <hs@denx.de>
|
||||
*
|
||||
* Copyright (C) 2007 Semihalf
|
||||
* Marian Balakowicz <m8@semihalf.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "mpc5200b.dtsi"
|
||||
|
||||
/ {
|
||||
model = "anonymous,a4m072";
|
||||
compatible = "anonymous,a4m072";
|
||||
|
||||
soc5200@f0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc5200b-immr";
|
||||
ranges = <0 0xf0000000 0x0000c000>;
|
||||
reg = <0xf0000000 0x00000100>;
|
||||
bus-frequency = <0>; /* From boot loader */
|
||||
system-frequency = <0>; /* From boot loader */
|
||||
|
||||
cdm@200 {
|
||||
fsl,init-ext-48mhz-en = <0x0>;
|
||||
fsl,init-fd-enable = <0x01>;
|
||||
fsl,init-fd-counters = <0x3333>;
|
||||
};
|
||||
|
||||
timer@600 {
|
||||
fsl,has-wdt;
|
||||
};
|
||||
|
||||
gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
|
||||
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
|
||||
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
|
||||
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
spi@f00 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
psc@2000 {
|
||||
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
|
||||
reg = <0x2000 0x100>;
|
||||
interrupts = <2 1 0>;
|
||||
};
|
||||
|
||||
psc@2200 {
|
||||
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
|
||||
reg = <0x2200 0x100>;
|
||||
interrupts = <2 2 0>;
|
||||
};
|
||||
|
||||
psc@2400 {
|
||||
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
|
||||
reg = <0x2400 0x100>;
|
||||
interrupts = <2 3 0>;
|
||||
};
|
||||
|
||||
psc@2600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
psc@2800 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
psc@2c00 {
|
||||
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
|
||||
reg = <0x2c00 0x100>;
|
||||
interrupts = <2 4 0>;
|
||||
};
|
||||
|
||||
ethernet@3000 {
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
mdio@3000 {
|
||||
phy0: ethernet-phy@1f {
|
||||
reg = <0x1f>;
|
||||
interrupts = <1 2 0>; /* IRQ 2 active low */
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3d00 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@3d40 {
|
||||
hwmon@2e {
|
||||
compatible = "nsc,lm87";
|
||||
reg = <0x2e>;
|
||||
};
|
||||
rtc@51 {
|
||||
compatible = "nxp,rtc8564";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
localbus {
|
||||
compatible = "fsl,mpc5200b-lpb","simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xfe000000 0x02000000
|
||||
1 0 0x62000000 0x00400000
|
||||
2 0 0x64000000 0x00200000
|
||||
3 0 0x66000000 0x01000000
|
||||
6 0 0x68000000 0x01000000
|
||||
7 0 0x6a000000 0x00000004>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x02000000>;
|
||||
bank-width = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
};
|
||||
sram0@1,0 {
|
||||
compatible = "mtd-ram";
|
||||
reg = <1 0x00000 0x00400000>;
|
||||
bank-width = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
pci@f0000d00 {
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
compatible = "fsl,mpc5200-pci";
|
||||
reg = <0xf0000d00 0x100>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x16 */
|
||||
0xc000 0 0 1 &mpc5200_pic 1 3 3
|
||||
0xc000 0 0 2 &mpc5200_pic 1 3 3
|
||||
0xc000 0 0 3 &mpc5200_pic 1 3 3
|
||||
0xc000 0 0 4 &mpc5200_pic 1 3 3>;
|
||||
clock-frequency = <0>; /* From boot loader */
|
||||
interrupts = <2 8 0 2 9 0 2 10 0>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
|
||||
0x02000000 0 0x90000000 0x90000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
|
||||
};
|
||||
};
|
||||
@ -33,7 +33,7 @@
|
||||
aliases {
|
||||
ethernet0 = &EMAC0;
|
||||
serial0 = &UART0;
|
||||
//serial1 = &UART1; --gcl missing UART1 label
|
||||
serial1 = &UART1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -52,7 +52,7 @@
|
||||
d-cache-size = <32768>;
|
||||
dcr-controller;
|
||||
dcr-access-method = "native";
|
||||
//next-level-cache = <&L2C0>; --gcl missing L2C0 label
|
||||
next-level-cache = <&L2C0>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -117,6 +117,16 @@
|
||||
dcr-reg = <0x00c 0x002>;
|
||||
};
|
||||
|
||||
L2C0: l2c {
|
||||
compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
|
||||
dcr-reg = <0x020 0x008
|
||||
0x030 0x008>;
|
||||
cache-line-size = <32>;
|
||||
cache-size = <262144>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
interrupts = <11 1>;
|
||||
};
|
||||
|
||||
plb {
|
||||
compatible = "ibm,plb4";
|
||||
#address-cells = <2>;
|
||||
@ -182,6 +192,53 @@
|
||||
reg = <0x001a0000 0x00060000>;
|
||||
};
|
||||
};
|
||||
|
||||
ndfc@1,0 {
|
||||
compatible = "ibm,ndfc";
|
||||
reg = <0x00000003 0x00000000 0x00002000>;
|
||||
ccr = <0x00001000>;
|
||||
bank-settings = <0x80002222>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
/* 2Gb Nand Flash */
|
||||
nand {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x00000000 0x00C00000>;
|
||||
};
|
||||
partition@c00000 {
|
||||
label = "environment";
|
||||
reg = <0x00C00000 0x00B00000>;
|
||||
};
|
||||
partition@1700000 {
|
||||
label = "kernel";
|
||||
reg = <0x01700000 0x00E00000>;
|
||||
};
|
||||
partition@2500000 {
|
||||
label = "root";
|
||||
reg = <0x02500000 0x08200000>;
|
||||
};
|
||||
partition@a700000 {
|
||||
label = "device-tree";
|
||||
reg = <0x0A700000 0x00B00000>;
|
||||
};
|
||||
partition@b200000 {
|
||||
label = "config";
|
||||
reg = <0x0B200000 0x00D00000>;
|
||||
};
|
||||
partition@bf00000 {
|
||||
label = "diag";
|
||||
reg = <0x0BF00000 0x00C00000>;
|
||||
};
|
||||
partition@cb00000 {
|
||||
label = "vendor";
|
||||
reg = <0x0CB00000 0x3500000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@ef600300 {
|
||||
@ -195,11 +252,36 @@
|
||||
interrupts = <0x1 0x4>;
|
||||
};
|
||||
|
||||
UART1: serial@ef600400 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0xef600400 0x00000008>;
|
||||
virtual-reg = <0xef600400>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
current-speed = <0>; /* Filled in by U-Boot */
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x1 0x4>;
|
||||
};
|
||||
|
||||
IIC0: i2c@ef600700 {
|
||||
compatible = "ibm,iic";
|
||||
reg = <0xef600700 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x2 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
rtc@68 {
|
||||
compatible = "stm,m41t80";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x9 0x8>;
|
||||
};
|
||||
sttm@4C {
|
||||
compatible = "adm,adm1032";
|
||||
reg = <0x4C>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */
|
||||
};
|
||||
};
|
||||
|
||||
IIC1: i2c@ef600800 {
|
||||
@ -250,5 +332,46 @@
|
||||
};
|
||||
};
|
||||
|
||||
PCIE0: pciex@d00000000 {
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
|
||||
primary;
|
||||
port = <0x0>; /* port number */
|
||||
reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
|
||||
0x0000000c 0x08010000 0x00001000>; /* Registers */
|
||||
dcr-reg = <0x100 0x020>;
|
||||
sdr-base = <0x300>;
|
||||
|
||||
/* Outbound ranges, one memory and one IO,
|
||||
* later cannot be changed
|
||||
*/
|
||||
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
|
||||
0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
|
||||
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
|
||||
|
||||
/* Inbound 2GB range starting at 0 */
|
||||
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
|
||||
|
||||
/* This drives busses 40 to 0x7f */
|
||||
bus-range = <0x40 0x7f>;
|
||||
|
||||
/* Legacy interrupts (note the weird polarity, the bridge seems
|
||||
* to invert PCIe legacy interrupts).
|
||||
* We are de-swizzling here because the numbers are actually for
|
||||
* port of the root complex virtual P2P bridge. But I want
|
||||
* to avoid putting a node for it in the tree, so the numbers
|
||||
* below are basically de-swizzled numbers.
|
||||
* The real slot is on idsel 0, so the swizzling is 1:1
|
||||
*/
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
|
||||
0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
|
||||
0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
|
||||
0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -202,7 +202,7 @@
|
||||
/include/ "pq3-etsec1-timer-0.dtsi"
|
||||
|
||||
usb@22000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x22000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -210,7 +210,7 @@
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -89,6 +89,21 @@
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <48 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -134,6 +149,7 @@
|
||||
|
||||
/include/ "pq3-sec2.1-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-rmu-0.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
|
||||
@ -43,7 +43,9 @@
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet2;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
|
||||
@ -156,6 +156,9 @@
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
compatible = "fsl,p1010-esdhc", "fsl,esdhc";
|
||||
|
||||
@ -142,7 +142,13 @@
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
/include/ "pq3-usb2-dr-1.dtsi"
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
|
||||
@ -142,8 +142,15 @@
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
sdhci,auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "pq3-sec3.3-0.dtsi"
|
||||
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
|
||||
@ -35,7 +35,11 @@
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
|
||||
/*
|
||||
* The localbus on the P1022 is not a simple-bus because of the eLBC
|
||||
* pin muxing when the DIU is enabled.
|
||||
*/
|
||||
compatible = "fsl,p1022-elbc", "fsl,elbc";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
@ -199,7 +203,13 @@
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
/include/ "pq3-usb2-dr-1.dtsi"
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
|
||||
@ -142,6 +142,9 @@
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
|
||||
|
||||
@ -171,6 +171,9 @@
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
|
||||
};
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
/include/ "pq3-etsec1-timer-0.dtsi"
|
||||
|
||||
|
||||
@ -309,12 +309,14 @@
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb1: usb@211000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
@ -336,12 +336,14 @@
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb1: usb@211000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
@ -291,6 +291,12 @@
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb@210000 {
|
||||
compatible = "fsl-usb2-mph-v2.2", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||
};
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb@211000 {
|
||||
compatible = "fsl-usb2-dr-v2.2", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
};
|
||||
/include/ "qoriq-sec4.1-0.dtsi"
|
||||
};
|
||||
|
||||
@ -339,12 +339,14 @@
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb1: usb@211000 {
|
||||
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2011-2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -41,6 +41,7 @@ ethernet@24000 {
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
|
||||
};
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2011-2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -41,6 +41,7 @@ ethernet@25000 {
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
|
||||
};
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2011-2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -41,6 +41,7 @@ ethernet@26000 {
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
|
||||
};
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2011-2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -41,6 +41,7 @@ ethernet@27000 {
|
||||
compatible = "gianfar";
|
||||
reg = <0x27000 0x1000>;
|
||||
ranges = <0x0 0x27000 0x1000>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
|
||||
};
|
||||
|
||||
@ -39,6 +39,9 @@ mpic: pic@40000 {
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "fsl,mpic";
|
||||
device_type = "open-pic";
|
||||
big-endian;
|
||||
single-cpu-affinity;
|
||||
last-interrupt-source = <255>;
|
||||
};
|
||||
|
||||
timer@41100 {
|
||||
|
||||
@ -33,32 +33,32 @@
|
||||
*/
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec4.4", "fsl,sec4.0";
|
||||
compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <58 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
@ -53,7 +53,7 @@ timer@41100 {
|
||||
|
||||
msi0: msi@41600 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41600 0x200>;
|
||||
reg = <0x41600 0x200 0x44140 4>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0 0 0
|
||||
@ -68,7 +68,7 @@ msi0: msi@41600 {
|
||||
|
||||
msi1: msi@41800 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41800 0x200>;
|
||||
reg = <0x41800 0x200 0x45140 4>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe8 0 0 0
|
||||
@ -83,7 +83,7 @@ msi1: msi@41800 {
|
||||
|
||||
msi2: msi@41a00 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41a00 0x200>;
|
||||
reg = <0x41a00 0x200 0x46140 4>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xf0 0 0 0
|
||||
|
||||
255
arch/powerpc/boot/dts/ge_imp3a.dts
Normal file
255
arch/powerpc/boot/dts/ge_imp3a.dts
Normal file
@ -0,0 +1,255 @@
|
||||
/*
|
||||
* GE IMP3A Device Tree Source
|
||||
*
|
||||
* Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Based on: P2020 DS Device Tree Source
|
||||
* Copyright 2009 Freescale Semiconductor Inc.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p2020si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "GE_IMP3A";
|
||||
compatible = "ge,imp3a";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fef05000 {
|
||||
reg = <0 0xfef05000 0 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0x0 0xff000000 0x01000000
|
||||
0x1 0x0 0x0 0xe0000000 0x08000000
|
||||
0x2 0x0 0x0 0xe8000000 0x08000000
|
||||
0x3 0x0 0x0 0xfc100000 0x00020000
|
||||
0x4 0x0 0x0 0xfc000000 0x00008000
|
||||
0x5 0x0 0x0 0xfc008000 0x00008000
|
||||
0x6 0x0 0x0 0xfee00000 0x00040000
|
||||
0x7 0x0 0x0 0xfee80000 0x00040000>;
|
||||
|
||||
/* nor@0,0 is a mirror of part of the memory in nor@1,0
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
|
||||
reg = <0x0 0x0 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x0 0x1000000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
*/
|
||||
|
||||
nor@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "ge,imp3a-paged-flash", "cfi-flash";
|
||||
reg = <0x1 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "user";
|
||||
reg = <0x0 0x7800000>;
|
||||
};
|
||||
|
||||
partition@7800000 {
|
||||
label = "firmware";
|
||||
reg = <0x7800000 0x800000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nvram@3,0 {
|
||||
device_type = "nvram";
|
||||
compatible = "simtek,stk14ca8";
|
||||
reg = <0x3 0x0 0x20000>;
|
||||
};
|
||||
|
||||
fpga@4,0 {
|
||||
compatible = "ge,imp3a-fpga-regs";
|
||||
reg = <0x4 0x0 0x20>;
|
||||
};
|
||||
|
||||
gef_pic: pic@4,20 {
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00";
|
||||
reg = <0x4 0x20 0x20>;
|
||||
interrupts = <6 7 0 0>;
|
||||
};
|
||||
|
||||
gef_gpio: gpio@4,400 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "ge,imp3a-gpio";
|
||||
reg = <0x4 0x400 0x24>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
wdt@4,800 {
|
||||
compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
|
||||
"gef,fpga-wdt";
|
||||
reg = <0x4 0x800 0x8>;
|
||||
interrupts = <10 4>;
|
||||
interrupt-parent = <&gef_pic>;
|
||||
};
|
||||
|
||||
/* Second watchdog available, driver currently supports one.
|
||||
wdt@4,808 {
|
||||
compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
|
||||
"gef,fpga-wdt";
|
||||
reg = <0x4 0x808 0x8>;
|
||||
interrupts = <9 4>;
|
||||
interrupt-parent = <&gef_pic>;
|
||||
};
|
||||
*/
|
||||
|
||||
nand@6,0 {
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x6 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@7,0 {
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x7 0x0 0x40000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@fef00000 {
|
||||
ranges = <0x0 0 0xfef00000 0x100000>;
|
||||
|
||||
i2c@3000 {
|
||||
hwmon@48 {
|
||||
compatible = "national,lm92";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
hwmon@4c {
|
||||
compatible = "adi,adt7461";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
rtc@51 {
|
||||
compatible = "epson,rx8581";
|
||||
reg = <0x51>;
|
||||
};
|
||||
|
||||
eti@6b {
|
||||
compatible = "dallas,ds1682";
|
||||
reg = <0x6b>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0xc 0x4>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0xb 0x4>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "gmii";
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "gmii";
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@fef08000 {
|
||||
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>;
|
||||
reg = <0 0xfef08000 0 0x1000>;
|
||||
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fef09000 {
|
||||
reg = <0 0xfef09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>;
|
||||
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci2: pcie@fef0a000 {
|
||||
reg = <0 0xfef0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>;
|
||||
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/p2020si-post.dtsi"
|
||||
@ -405,6 +405,10 @@
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi-phy@2 {
|
||||
device_type = "tbi-phy";
|
||||
reg = <0x2>;
|
||||
};
|
||||
};
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* MPC8536 DS Device Tree Source
|
||||
*
|
||||
* Copyright 2008 Freescale Semiconductor, Inc.
|
||||
* Copyright 2008, 2011 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
@ -34,6 +34,10 @@
|
||||
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
|
||||
0x2 0x0 0x0 0xffa00000 0x00040000
|
||||
0x3 0x0 0x0 0xffdf0000 0x00008000>;
|
||||
};
|
||||
|
||||
board_soc: soc: soc@ffe00000 {
|
||||
|
||||
@ -32,6 +32,99 @@
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
label = "ramdisk-nor";
|
||||
};
|
||||
|
||||
partition@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
label = "diagnostic-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
label = "dink-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
label = "kernel-nor";
|
||||
};
|
||||
|
||||
partition@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
label = "fs-nor";
|
||||
};
|
||||
|
||||
partition@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
label = "dtb-nor";
|
||||
};
|
||||
|
||||
partition@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
label = "u-boot-nor";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8536-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
label = "u-boot-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
label = "fs-nand";
|
||||
};
|
||||
|
||||
partition@12000000 {
|
||||
reg = <0x12000000 0x08000000>;
|
||||
label = "ramdisk-nand";
|
||||
};
|
||||
|
||||
partition@1a000000 {
|
||||
reg = <0x1a000000 0x04000000>;
|
||||
label = "kernel-nand";
|
||||
};
|
||||
|
||||
partition@1e000000 {
|
||||
reg = <0x1e000000 0x01000000>;
|
||||
label = "dtb-nand";
|
||||
};
|
||||
|
||||
partition@1f000000 {
|
||||
reg = <0x1f000000 0x21000000>;
|
||||
label = "empty-nand";
|
||||
};
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,mpc8536ds-fpga-pixis";
|
||||
reg = <0x3 0x0 0x8000>;
|
||||
};
|
||||
};
|
||||
|
||||
&board_soc {
|
||||
i2c@3100 {
|
||||
rtc@68 {
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* MPC8536DS Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
* Copyright 2008-2009, 2011 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
@ -33,7 +33,11 @@
|
||||
};
|
||||
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
|
||||
0x2 0x0 0xf 0xffa00000 0x00040000
|
||||
0x3 0x0 0xf 0xffdf0000 0x00008000>;
|
||||
};
|
||||
|
||||
board_soc: soc: soc@fffe00000 {
|
||||
|
||||
@ -1,306 +0,0 @@
|
||||
/*
|
||||
* MPC8548 CDS Device Tree Source
|
||||
*
|
||||
* Copyright 2006, 2008 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8548si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8548CDS";
|
||||
compatible = "MPC8548CDS", "MPC85xxCDS";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0 0x0 0x8000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
lbc: localbus@e0005000 {
|
||||
reg = <0 0xe0005000 0 0x1000>;
|
||||
};
|
||||
|
||||
soc: soc8548@e0000000 {
|
||||
ranges = <0 0x0 0xe0000000 0x100000>;
|
||||
|
||||
i2c@3000 {
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x56>;
|
||||
};
|
||||
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x57>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
};
|
||||
|
||||
mdio@27520 {
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008000 {
|
||||
reg = <0 0xe0008000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x4 (PCIX Slot 2) */
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x5 (PCIX Slot 3) */
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
|
||||
0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
|
||||
0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
|
||||
|
||||
/* IDSEL 0x6 (PCIX Slot 4) */
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x8 (PCIX Slot 5) */
|
||||
0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0xC (Tsi310 bridge) */
|
||||
0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x14 (Slot 2) */
|
||||
0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x15 (Slot 3) */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
|
||||
|
||||
/* IDSEL 0x16 (Slot 4) */
|
||||
0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x18 (Slot 5) */
|
||||
0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x1C (Tsi310 bridge PCI primary) */
|
||||
0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
|
||||
pci_bridge@1c {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x00 (PrPMC Site) */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x04 (VIA chip) */
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x05 (8139) */
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x06 (Slot 6) */
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDESL 0x07 (Slot 7) */
|
||||
0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
|
||||
0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
|
||||
|
||||
reg = <0xe000 0x0 0x0 0x0 0x0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x80000>;
|
||||
clock-frequency = <33333333>;
|
||||
|
||||
isa@4 {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0x2000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <0 1 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pci@e0009000 {
|
||||
reg = <0 0xe0009000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x15 */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
};
|
||||
|
||||
pci2: pcie@e000a000 {
|
||||
reg = <0 0xe000a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/mpc8548si-post.dtsi"
|
||||
306
arch/powerpc/boot/dts/mpc8548cds.dtsi
Normal file
306
arch/powerpc/boot/dts/mpc8548cds.dtsi
Normal file
@ -0,0 +1,306 @@
|
||||
/*
|
||||
* MPC8548CDS Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&board_lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x01000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x0b00000>;
|
||||
label = "ramdisk-nor";
|
||||
};
|
||||
|
||||
partition@300000 {
|
||||
reg = <0x0b00000 0x0400000>;
|
||||
label = "kernel-nor";
|
||||
};
|
||||
|
||||
partition@700000 {
|
||||
reg = <0x0f00000 0x060000>;
|
||||
label = "dtb-nor";
|
||||
};
|
||||
|
||||
partition@760000 {
|
||||
reg = <0x0f60000 0x020000>;
|
||||
label = "env-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@780000 {
|
||||
reg = <0x0f80000 0x080000>;
|
||||
label = "u-boot-nor";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
board-control@1,0 {
|
||||
compatible = "fsl,mpc8548cds-fpga";
|
||||
reg = <0x1 0x0 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&board_soc {
|
||||
i2c@3000 {
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x56>;
|
||||
};
|
||||
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x57>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
};
|
||||
|
||||
mdio@27520 {
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&board_pci0 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x4 (PCIX Slot 2) */
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x5 (PCIX Slot 3) */
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
|
||||
0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
|
||||
0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
|
||||
|
||||
/* IDSEL 0x6 (PCIX Slot 4) */
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x8 (PCIX Slot 5) */
|
||||
0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0xC (Tsi310 bridge) */
|
||||
0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x14 (Slot 2) */
|
||||
0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x15 (Slot 3) */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
|
||||
|
||||
/* IDSEL 0x16 (Slot 4) */
|
||||
0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x18 (Slot 5) */
|
||||
0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x1C (Tsi310 bridge PCI primary) */
|
||||
0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
|
||||
pci_bridge@1c {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x00 (PrPMC Site) */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x04 (VIA chip) */
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x05 (8139) */
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x06 (Slot 6) */
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDESL 0x07 (Slot 7) */
|
||||
0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
|
||||
0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
|
||||
|
||||
reg = <0xe000 0x0 0x0 0x0 0x0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x80000>;
|
||||
clock-frequency = <33333333>;
|
||||
|
||||
isa@4 {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0x2000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <0 1 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
86
arch/powerpc/boot/dts/mpc8548cds_32b.dts
Normal file
86
arch/powerpc/boot/dts/mpc8548cds_32b.dts
Normal file
@ -0,0 +1,86 @@
|
||||
/*
|
||||
* MPC8548 CDS Device Tree Source (32-bit address map)
|
||||
*
|
||||
* Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8548si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8548CDS";
|
||||
compatible = "MPC8548CDS", "MPC85xxCDS";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0 0x0 0x8000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
board_lbc: lbc: localbus@e0005000 {
|
||||
reg = <0 0xe0005000 0 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0x0 0xff000000 0x01000000
|
||||
0x1 0x0 0x0 0xf8004000 0x00001000>;
|
||||
|
||||
};
|
||||
|
||||
board_soc: soc: soc8548@e0000000 {
|
||||
ranges = <0 0x0 0xe0000000 0x100000>;
|
||||
};
|
||||
|
||||
board_pci0: pci0: pci@e0008000 {
|
||||
reg = <0 0xe0008000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
};
|
||||
|
||||
pci1: pci@e0009000 {
|
||||
reg = <0 0xe0009000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x15 */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
};
|
||||
|
||||
pci2: pcie@e000a000 {
|
||||
reg = <0 0xe000a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
rio: rapidio@e00c0000 {
|
||||
reg = <0x0 0xe00c0000 0x0 0x20000>;
|
||||
port1 {
|
||||
ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
|
||||
* for interrupt-map & interrupt-map-mask.
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8548si-post.dtsi"
|
||||
/include/ "mpc8548cds.dtsi"
|
||||
86
arch/powerpc/boot/dts/mpc8548cds_36b.dts
Normal file
86
arch/powerpc/boot/dts/mpc8548cds_36b.dts
Normal file
@ -0,0 +1,86 @@
|
||||
/*
|
||||
* MPC8548 CDS Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8548si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8548CDS";
|
||||
compatible = "MPC8548CDS", "MPC85xxCDS";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0 0x0 0x8000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
board_lbc: lbc: localbus@fe0005000 {
|
||||
reg = <0xf 0xe0005000 0 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0xf 0xff000000 0x01000000
|
||||
0x1 0x0 0xf 0xf8004000 0x00001000>;
|
||||
|
||||
};
|
||||
|
||||
board_soc: soc: soc8548@fe0000000 {
|
||||
ranges = <0 0xf 0xe0000000 0x100000>;
|
||||
};
|
||||
|
||||
board_pci0: pci0: pci@fe0008000 {
|
||||
reg = <0xf 0xe0008000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
};
|
||||
|
||||
pci1: pci@fe0009000 {
|
||||
reg = <0xf 0xe0009000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x15 */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
};
|
||||
|
||||
pci2: pcie@fe000a000 {
|
||||
reg = <0xf 0xe000a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
rio: rapidio@fe00c0000 {
|
||||
reg = <0xf 0xe00c0000 0x0 0x20000>;
|
||||
port1 {
|
||||
ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
|
||||
* for interrupt-map & interrupt-map-mask.
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8548si-post.dtsi"
|
||||
/include/ "mpc8548cds.dtsi"
|
||||
@ -41,37 +41,47 @@
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
ramdisk@0 {
|
||||
partition@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
read-only;
|
||||
label = "ramdisk-nor";
|
||||
};
|
||||
|
||||
diagnostic@3000000 {
|
||||
partition@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
label = "diagnostic-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
dink@3e00000 {
|
||||
partition@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
label = "dink-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@4000000 {
|
||||
partition@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
read-only;
|
||||
label = "kernel-nor";
|
||||
};
|
||||
|
||||
jffs2@4400000 {
|
||||
partition@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
label = "fs-nor";
|
||||
};
|
||||
|
||||
dtb@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
partition@7f00000 {
|
||||
reg = <0x07f00000 0x00060000>;
|
||||
label = "dtb-nor";
|
||||
};
|
||||
|
||||
partition@7f60000 {
|
||||
reg = <0x07f60000 0x00020000>;
|
||||
label = "env-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
u-boot@7f80000 {
|
||||
partition@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
label = "u-boot-nor";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
@ -83,31 +93,35 @@
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
u-boot@0 {
|
||||
partition@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
label = "u-boot-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@2000000 {
|
||||
partition@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
label = "fs-nand";
|
||||
};
|
||||
|
||||
ramdisk@12000000 {
|
||||
partition@12000000 {
|
||||
reg = <0x12000000 0x08000000>;
|
||||
read-only;
|
||||
label = "ramdisk-nand";
|
||||
};
|
||||
|
||||
kernel@1a000000 {
|
||||
partition@1a000000 {
|
||||
reg = <0x1a000000 0x04000000>;
|
||||
label = "kernel-nand";
|
||||
};
|
||||
|
||||
dtb@1e000000 {
|
||||
partition@1e000000 {
|
||||
reg = <0x1e000000 0x01000000>;
|
||||
read-only;
|
||||
label = "dtb-nand";
|
||||
};
|
||||
|
||||
empty@1f000000 {
|
||||
partition@1f000000 {
|
||||
reg = <0x1f000000 0x21000000>;
|
||||
label = "empty-nand";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -138,7 +138,7 @@
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partition@0 {
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
@ -196,7 +196,7 @@
|
||||
};
|
||||
|
||||
tbi-phy@3 {
|
||||
device-type = "tbi-phy";
|
||||
device_type = "tbi-phy";
|
||||
reg = <0x3>;
|
||||
};
|
||||
};
|
||||
|
||||
247
arch/powerpc/boot/dts/p1020rdb-pc.dtsi
Normal file
247
arch/powerpc/boot/dts/p1020rdb-pc.dtsi
Normal file
@ -0,0 +1,247 @@
|
||||
/*
|
||||
* P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 256KB for Vitesse 7385 Switch firmware */
|
||||
reg = <0x0 0x00040000>;
|
||||
label = "NOR Vitesse-7385 Firmware";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
/* 256KB for DTB Image */
|
||||
reg = <0x00040000 0x00040000>;
|
||||
label = "NOR DTB Image";
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 3.5 MB for Linux Kernel Image */
|
||||
reg = <0x00080000 0x00380000>;
|
||||
label = "NOR Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
/* 11MB for JFFS2 based Root file System */
|
||||
reg = <0x00400000 0x00b00000>;
|
||||
label = "NOR JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@f00000 {
|
||||
/* This location must not be altered */
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
/* 512KB for u-boot Environment Variables */
|
||||
reg = <0x00f00000 0x00100000>;
|
||||
label = "NOR U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1020-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x1 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND DTB Image";
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00400000>;
|
||||
label = "NAND Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
/* 4MB for Compressed Root file System Image */
|
||||
reg = <0x00600000 0x00400000>;
|
||||
label = "NAND Compressed RFS Image";
|
||||
};
|
||||
|
||||
partition@a00000 {
|
||||
/* 7MB for JFFS2 based Root file System */
|
||||
reg = <0x00a00000 0x00700000>;
|
||||
label = "NAND JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1100000 {
|
||||
/* 15MB for JFFS2 based Root file System */
|
||||
reg = <0x01100000 0x00f00000>;
|
||||
label = "NAND Writable User area";
|
||||
};
|
||||
};
|
||||
|
||||
L2switch@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "vitesse-7385";
|
||||
reg = <0x2 0x0 0x20000>;
|
||||
};
|
||||
|
||||
cpld@3,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cpld";
|
||||
reg = <0x3 0x0 0x20000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
i2c@3000 {
|
||||
rtc@68 {
|
||||
compatible = "pericom,pt7c4338";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
|
||||
partition@u-boot {
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00080000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@dtb {
|
||||
/* 512KB for DTB Image*/
|
||||
reg = <0x00080000 0x00080000>;
|
||||
label = "dtb";
|
||||
};
|
||||
|
||||
partition@kernel {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00100000 0x00400000>;
|
||||
label = "kernel";
|
||||
};
|
||||
|
||||
partition@fs {
|
||||
/* 4MB for Compressed RFS Image */
|
||||
reg = <0x00500000 0x00400000>;
|
||||
label = "file system";
|
||||
};
|
||||
|
||||
partition@jffs-fs {
|
||||
/* 7MB for JFFS2 based RFS */
|
||||
reg = <0x00900000 0x00700000>;
|
||||
label = "file system jffs2";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
/* USB2 is shared with localbus, so it must be disabled
|
||||
by default. We can't put 'status = "disabled";' here
|
||||
since U-Boot doesn't clear the status property when
|
||||
it enables USB2. OTOH, U-Boot does create a new node
|
||||
when there isn't any. So, just comment it out.
|
||||
usb@23000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
*/
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
device_type = "tbi-phy";
|
||||
reg = <0x11>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25000 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@b0000 {
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
};
|
||||
|
||||
enet1: ethernet@b1000 {
|
||||
phy-handle = <&phy0>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
|
||||
enet2: ethernet@b2000 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
90
arch/powerpc/boot/dts/p1020rdb-pc_32b.dts
Normal file
90
arch/powerpc/boot/dts/p1020rdb-pc_32b.dts
Normal file
@ -0,0 +1,90 @@
|
||||
/*
|
||||
* P1020 RDB-PC Device Tree Source (32-bit address map)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1020si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1020RDB-PC";
|
||||
compatible = "fsl,P1020RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
|
||||
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
|
||||
0x1 0x0 0x0 0xff800000 0x00040000
|
||||
0x2 0x0 0x0 0xffb00000 0x00020000
|
||||
0x3 0x0 0x0 0xffa00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1020rdb-pc.dtsi"
|
||||
/include/ "fsl/p1020si-post.dtsi"
|
||||
90
arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
Normal file
90
arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
Normal file
@ -0,0 +1,90 @@
|
||||
/*
|
||||
* P1020 RDB-PC Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1020si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1020RDB-PC";
|
||||
compatible = "fsl,P1020RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
|
||||
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
|
||||
0x1 0x0 0xf 0xff800000 0x00040000
|
||||
0x2 0x0 0xf 0xffb00000 0x00040000
|
||||
0x3 0x0 0xf 0xffa00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1020rdb-pc.dtsi"
|
||||
/include/ "fsl/p1020si-post.dtsi"
|
||||
64
arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts
Normal file
64
arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
|
||||
*
|
||||
* In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
|
||||
* can be shared, all the other devices must be assigned to one core only.
|
||||
* This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
|
||||
* eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
|
||||
*
|
||||
* Please note to add "-b 0" for core0's dts compiling.
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "p1020rdb-pc_32b.dts"
|
||||
|
||||
/ {
|
||||
model = "fsl,P1020RDB-PC";
|
||||
compatible = "fsl,P1020RDB-PC";
|
||||
|
||||
aliases {
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
serial0 = &serial0;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
PowerPC,P1020@1 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@ffe05000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
soc@ffe00000 {
|
||||
serial1: serial@4600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@b0000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
protected-sources = <
|
||||
42 29 30 34 /* serial1, enet0-queue-group0 */
|
||||
17 18 24 45 /* enet0-queue-group1, crypto */
|
||||
>;
|
||||
pic-no-reset;
|
||||
};
|
||||
};
|
||||
};
|
||||
142
arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts
Normal file
142
arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts
Normal file
@ -0,0 +1,142 @@
|
||||
/*
|
||||
* P1020 RDB-PC Core1 Device Tree Source in CAMP mode.
|
||||
*
|
||||
* In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
|
||||
* can be shared, all the other devices must be assigned to one core only.
|
||||
* This dts allows core1 to have l2, eth0, crypto.
|
||||
*
|
||||
* Please note to add "-b 1" for core1's dts compiling.
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "p1020rdb-pc_32b.dts"
|
||||
|
||||
/ {
|
||||
model = "fsl,P1020RDB-PC";
|
||||
compatible = "fsl,P1020RDB-PC";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
serial0 = &serial1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
PowerPC,P1020@0 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@ffe05000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
soc@ffe00000 {
|
||||
ecm-law@0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio: gpio-controller@f000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@25000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet1: ethernet@b1000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet2: ethernet@b2000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
protected-sources = <
|
||||
16 /* ecm, mem, L2, pci0, pci1 */
|
||||
43 42 59 /* i2c, serial0, spi */
|
||||
47 63 62 /* gpio, tdm */
|
||||
20 21 22 23 /* dma */
|
||||
03 02 /* mdio */
|
||||
35 36 40 /* enet1-queue-group0 */
|
||||
51 52 67 /* enet1-queue-group1 */
|
||||
31 32 33 /* enet2-queue-group0 */
|
||||
25 26 27 /* enet2-queue-group1 */
|
||||
28 72 58 /* usb, sdhci, crypto */
|
||||
0xb0 0xb1 0xb2 /* message */
|
||||
0xb3 0xb4 0xb5
|
||||
0xb6 0xb7
|
||||
0xe0 0xe1 0xe2 /* msi */
|
||||
0xe3 0xe4 0xe5
|
||||
0xe6 0xe7 /* sdhci, crypto , pci */
|
||||
>;
|
||||
pic-no-reset;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
96
arch/powerpc/boot/dts/p1021rdb.dts
Normal file
96
arch/powerpc/boot/dts/p1021rdb.dts
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* P1021 RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1021si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1021RDB";
|
||||
compatible = "fsl,P1021RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
|
||||
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
|
||||
0x1 0x0 0x0 0xff800000 0x00040000
|
||||
0x2 0x0 0x0 0xffb00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
qe: qe@ffe80000 {
|
||||
ranges = <0x0 0x0 0xffe80000 0x40000>;
|
||||
reg = <0 0xffe80000 0 0x480>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1021rdb.dtsi"
|
||||
/include/ "fsl/p1021si-post.dtsi"
|
||||
236
arch/powerpc/boot/dts/p1021rdb.dtsi
Normal file
236
arch/powerpc/boot/dts/p1021rdb.dtsi
Normal file
@ -0,0 +1,236 @@
|
||||
/*
|
||||
* P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 256KB for Vitesse 7385 Switch firmware */
|
||||
reg = <0x0 0x00040000>;
|
||||
label = "NOR Vitesse-7385 Firmware";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
/* 256KB for DTB Image */
|
||||
reg = <0x00040000 0x00040000>;
|
||||
label = "NOR DTB Image";
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 3.5 MB for Linux Kernel Image */
|
||||
reg = <0x00080000 0x00380000>;
|
||||
label = "NOR Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
/* 11MB for JFFS2 based Root file System */
|
||||
reg = <0x00400000 0x00b00000>;
|
||||
label = "NOR JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@f00000 {
|
||||
/* This location must not be altered */
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
/* 512KB for u-boot Environment Variables */
|
||||
reg = <0x00f00000 0x00100000>;
|
||||
label = "NOR U-Boot Image";
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1021-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x1 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND DTB Image";
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00400000>;
|
||||
label = "NAND Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
/* 4MB for Compressed Root file System Image */
|
||||
reg = <0x00600000 0x00400000>;
|
||||
label = "NAND Compressed RFS Image";
|
||||
};
|
||||
|
||||
partition@a00000 {
|
||||
/* 7MB for JFFS2 based Root file System */
|
||||
reg = <0x00a00000 0x00700000>;
|
||||
label = "NAND JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1100000 {
|
||||
/* 15MB for User Writable Area */
|
||||
reg = <0x01100000 0x00f00000>;
|
||||
label = "NAND Writable User area";
|
||||
};
|
||||
};
|
||||
|
||||
L2switch@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "vitesse-7385";
|
||||
reg = <0x2 0x0 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
i2c@3000 {
|
||||
rtc@68 {
|
||||
compatible = "pericom,pt7c4338";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
|
||||
partition@u-boot {
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00080000>;
|
||||
label = "SPI Flash U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@dtb {
|
||||
/* 512KB for DTB Image */
|
||||
reg = <0x00080000 0x00080000>;
|
||||
label = "SPI Flash DTB Image";
|
||||
};
|
||||
|
||||
partition@kernel {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00100000 0x00400000>;
|
||||
label = "SPI Flash Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@fs {
|
||||
/* 4MB for Compressed RFS Image */
|
||||
reg = <0x00500000 0x00400000>;
|
||||
label = "SPI Flash Compressed RFSImage";
|
||||
};
|
||||
|
||||
partition@jffs-fs {
|
||||
/* 7MB for JFFS2 based RFS */
|
||||
reg = <0x00900000 0x00700000>;
|
||||
label = "SPI Flash JFFS2 RFS";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1 0 0>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25000 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@26000 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@b0000 {
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
};
|
||||
|
||||
enet1: ethernet@b1000 {
|
||||
phy-handle = <&phy0>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
|
||||
enet2: ethernet@b2000 {
|
||||
phy-handle = <&phy1>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
96
arch/powerpc/boot/dts/p1021rdb_36b.dts
Normal file
96
arch/powerpc/boot/dts/p1021rdb_36b.dts
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* P1021 RDB Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1021si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1021RDB";
|
||||
compatible = "fsl,P1021RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
|
||||
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
|
||||
0x1 0x0 0xf 0xff800000 0x00040000
|
||||
0x2 0x0 0xf 0xffb00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
qe: qe@fffe80000 {
|
||||
ranges = <0x0 0xf 0xffe80000 0x40000>;
|
||||
reg = <0xf 0xffe80000 0 0x480>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1021rdb.dtsi"
|
||||
/include/ "fsl/p1021si-post.dtsi"
|
||||
@ -1,274 +0,0 @@
|
||||
/*
|
||||
* P1022 DS 36Bit Physical Address Map Device Tree Source
|
||||
*
|
||||
* Copyright 2010 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1022si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1022DS";
|
||||
compatible = "fsl,P1022DS";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
|
||||
0x1 0x0 0xf 0xe0000000 0x08000000
|
||||
0x2 0x0 0xf 0xff800000 0x00040000
|
||||
0x3 0x0 0xf 0xffdf0000 0x00008000>;
|
||||
|
||||
/*
|
||||
* This node is used to access the pixis via "indirect" mode,
|
||||
* which is done by writing the pixis register index to chip
|
||||
* select 0 and the value to/from chip select 1. Indirect
|
||||
* mode is the only way to access the pixis when DIU video
|
||||
* is enabled. Note that this assumes that the first column
|
||||
* of the 'ranges' property above is the chip select number.
|
||||
*/
|
||||
board-control@0,0 {
|
||||
compatible = "fsl,p1022ds-indirect-pixis";
|
||||
reg = <0x0 0x0 1 /* CS0 */
|
||||
0x1 0x0 1>; /* CS1 */
|
||||
};
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
label = "ramdisk-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
label = "diagnostic-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
label = "dink-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
label = "kernel-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
label = "jffs2-nor";
|
||||
};
|
||||
|
||||
partition@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
label = "dtb-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
label = "u-boot-nor";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
label = "u-boot-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
label = "jffs2-nand";
|
||||
};
|
||||
|
||||
partition@12000000 {
|
||||
reg = <0x12000000 0x10000000>;
|
||||
label = "ramdisk-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@22000000 {
|
||||
reg = <0x22000000 0x04000000>;
|
||||
label = "kernel-nand";
|
||||
};
|
||||
|
||||
partition@26000000 {
|
||||
reg = <0x26000000 0x01000000>;
|
||||
label = "dtb-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@27000000 {
|
||||
reg = <0x27000000 0x19000000>;
|
||||
label = "reserved-nand";
|
||||
};
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
interrupt-parent = <&mpic>;
|
||||
/*
|
||||
* IRQ8 is generated if the "EVENT" switch is pressed
|
||||
* and PX_CTL[EVESEL] is set to 00.
|
||||
*/
|
||||
interrupts = <8 8 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
|
||||
i2c@3100 {
|
||||
wm8776:codec@1a {
|
||||
compatible = "wlf,wm8776";
|
||||
reg = <0x1a>;
|
||||
/*
|
||||
* clock-frequency will be set by U-Boot if
|
||||
* the clock is enabled.
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot-spi";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "kernel-spi";
|
||||
reg = <0x00100000 0x00500000>;
|
||||
read-only;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "dtb-spi";
|
||||
reg = <0x00600000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@700000 {
|
||||
label = "file system-spi";
|
||||
reg = <0x00700000 0x00900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ssi@15000 {
|
||||
fsl,mode = "i2s-slave";
|
||||
codec-handle = <&wm8776>;
|
||||
fsl,ssi-asynchronous;
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <3 1 0 0>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <9 1 0 0>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
tbi-phy@2 {
|
||||
device_type = "tbi-phy";
|
||||
reg = <0x2>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@b0000 {
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
ethernet@b1000 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@fffe0b000 {
|
||||
reg = <0xf 0xffe0b000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/p1022si-post.dtsi"
|
||||
234
arch/powerpc/boot/dts/p1022ds.dtsi
Normal file
234
arch/powerpc/boot/dts/p1022ds.dtsi
Normal file
@ -0,0 +1,234 @@
|
||||
/*
|
||||
* P1022 DS Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&board_lbc {
|
||||
/*
|
||||
* This node is used to access the pixis via "indirect" mode,
|
||||
* which is done by writing the pixis register index to chip
|
||||
* select 0 and the value to/from chip select 1. Indirect
|
||||
* mode is the only way to access the pixis when DIU video
|
||||
* is enabled. Note that this assumes that the first column
|
||||
* of the 'ranges' property above is the chip select number.
|
||||
*/
|
||||
board-control@0,0 {
|
||||
compatible = "fsl,p1022ds-indirect-pixis";
|
||||
reg = <0x0 0x0 1 /* CS0 */
|
||||
0x1 0x0 1>; /* CS1 */
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <8 0 0 0>;
|
||||
};
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
label = "ramdisk-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
label = "diagnostic-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
label = "dink-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
label = "kernel-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
label = "jffs2-nor";
|
||||
};
|
||||
|
||||
partition@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
label = "dtb-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
label = "u-boot-nor";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
label = "u-boot-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
label = "jffs2-nand";
|
||||
};
|
||||
|
||||
partition@12000000 {
|
||||
reg = <0x12000000 0x10000000>;
|
||||
label = "ramdisk-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@22000000 {
|
||||
reg = <0x22000000 0x04000000>;
|
||||
label = "kernel-nand";
|
||||
};
|
||||
|
||||
partition@26000000 {
|
||||
reg = <0x26000000 0x01000000>;
|
||||
label = "dtb-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@27000000 {
|
||||
reg = <0x27000000 0x19000000>;
|
||||
label = "reserved-nand";
|
||||
};
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
interrupt-parent = <&mpic>;
|
||||
/*
|
||||
* IRQ8 is generated if the "EVENT" switch is pressed
|
||||
* and PX_CTL[EVESEL] is set to 00.
|
||||
*/
|
||||
interrupts = <8 0 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&board_soc {
|
||||
i2c@3100 {
|
||||
wm8776:codec@1a {
|
||||
compatible = "wlf,wm8776";
|
||||
reg = <0x1a>;
|
||||
/*
|
||||
* clock-frequency will be set by U-Boot if
|
||||
* the clock is enabled.
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot-spi";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "kernel-spi";
|
||||
reg = <0x00100000 0x00500000>;
|
||||
read-only;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "dtb-spi";
|
||||
reg = <0x00600000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@700000 {
|
||||
label = "file system-spi";
|
||||
reg = <0x00700000 0x00900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ssi@15000 {
|
||||
fsl,mode = "i2s-slave";
|
||||
codec-handle = <&wm8776>;
|
||||
fsl,ssi-asynchronous;
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <3 1 0 0>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <9 1 0 0>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
tbi-phy@2 {
|
||||
device_type = "tbi-phy";
|
||||
reg = <0x2>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@b0000 {
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
ethernet@b1000 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
103
arch/powerpc/boot/dts/p1022ds_32b.dts
Normal file
103
arch/powerpc/boot/dts/p1022ds_32b.dts
Normal file
@ -0,0 +1,103 @@
|
||||
/*
|
||||
* P1022 DS 32-bit Physical Address Map Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1022si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1022DS";
|
||||
compatible = "fsl,P1022DS";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
board_lbc: lbc: localbus@ffe05000 {
|
||||
ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
|
||||
0x1 0x0 0x0 0xe0000000 0x08000000
|
||||
0x2 0x0 0x0 0xff800000 0x00040000
|
||||
0x3 0x0 0x0 0xffdf0000 0x00008000>;
|
||||
reg = <0x0 0xffe05000 0 0x1000>;
|
||||
};
|
||||
|
||||
board_soc: soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
reg = <0x0 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@ffe0b000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
reg = <0 0xffe0b000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/p1022si-post.dtsi"
|
||||
/include/ "p1022ds.dtsi"
|
||||
103
arch/powerpc/boot/dts/p1022ds_36b.dts
Normal file
103
arch/powerpc/boot/dts/p1022ds_36b.dts
Normal file
@ -0,0 +1,103 @@
|
||||
/*
|
||||
* P1022 DS 36-bit Physical Address Map Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1022si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1022DS";
|
||||
compatible = "fsl,P1022DS";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
board_lbc: lbc: localbus@fffe05000 {
|
||||
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
|
||||
0x1 0x0 0xf 0xe0000000 0x08000000
|
||||
0x2 0x0 0xf 0xff800000 0x00040000
|
||||
0x3 0x0 0xf 0xffdf0000 0x00008000>;
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
};
|
||||
|
||||
board_soc: soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@fffe0b000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
reg = <0xf 0xffe0b000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/p1022si-post.dtsi"
|
||||
/include/ "p1022ds.dtsi"
|
||||
286
arch/powerpc/boot/dts/p1025rdb.dtsi
Normal file
286
arch/powerpc/boot/dts/p1025rdb.dtsi
Normal file
@ -0,0 +1,286 @@
|
||||
/*
|
||||
* P1025 RDB Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 256KB for Vitesse 7385 Switch firmware */
|
||||
reg = <0x0 0x00040000>;
|
||||
label = "NOR Vitesse-7385 Firmware";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
/* 256KB for DTB Image */
|
||||
reg = <0x00040000 0x00040000>;
|
||||
label = "NOR DTB Image";
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 3.5 MB for Linux Kernel Image */
|
||||
reg = <0x00080000 0x00380000>;
|
||||
label = "NOR Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
/* 11MB for JFFS2 based Root file System */
|
||||
reg = <0x00400000 0x00b00000>;
|
||||
label = "NOR JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@f00000 {
|
||||
/* This location must not be altered */
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
/* 512KB for u-boot Environment Variables */
|
||||
reg = <0x00f00000 0x00100000>;
|
||||
label = "NOR U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1025-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x1 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND DTB Image";
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00400000>;
|
||||
label = "NAND Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
/* 4MB for Compressed Root file System Image */
|
||||
reg = <0x00600000 0x00400000>;
|
||||
label = "NAND Compressed RFS Image";
|
||||
};
|
||||
|
||||
partition@a00000 {
|
||||
/* 7MB for JFFS2 based Root file System */
|
||||
reg = <0x00a00000 0x00700000>;
|
||||
label = "NAND JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1100000 {
|
||||
/* 15MB for JFFS2 based Root file System */
|
||||
reg = <0x01100000 0x00f00000>;
|
||||
label = "NAND Writable User area";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&soc {
|
||||
i2c@3000 {
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1339";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
|
||||
partition@u-boot {
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00080000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@dtb {
|
||||
/* 512KB for DTB Image */
|
||||
reg = <0x00080000 0x00080000>;
|
||||
label = "dtb";
|
||||
};
|
||||
|
||||
partition@kernel {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00100000 0x00400000>;
|
||||
label = "kernel";
|
||||
};
|
||||
|
||||
partition@fs {
|
||||
/* 4MB for Compressed RFS Image */
|
||||
reg = <0x00500000 0x00400000>;
|
||||
label = "file system";
|
||||
};
|
||||
|
||||
partition@jffs-fs {
|
||||
/* 7MB for JFFS2 based RFS */
|
||||
reg = <0x00900000 0x00700000>;
|
||||
label = "file system jffs2";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
/* USB2 is shared with localbus, so it must be disabled
|
||||
by default. We can't put 'status = "disabled";' here
|
||||
since U-Boot doesn't clear the status property when
|
||||
it enables USB2. OTOH, U-Boot does create a new node
|
||||
when there isn't any. So, just comment it out.
|
||||
usb@23000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
*/
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25000 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@26000 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@b0000 {
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
};
|
||||
|
||||
enet1: ethernet@b1000 {
|
||||
phy-handle = <&phy0>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
|
||||
enet2: ethernet@b2000 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
par_io@e0100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xe0100 0x60>;
|
||||
ranges = <0x0 0xe0100 0x60>;
|
||||
device_type = "par_io";
|
||||
num-ports = <3>;
|
||||
pio1: ucc_pin@01 {
|
||||
pio-map = <
|
||||
/* port pin dir open_drain assignment has_irq */
|
||||
0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
|
||||
0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
|
||||
0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
|
||||
0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
|
||||
0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
|
||||
0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
|
||||
0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
|
||||
0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
|
||||
0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
|
||||
0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
|
||||
0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
|
||||
0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
|
||||
0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
|
||||
0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */
|
||||
0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */
|
||||
0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */
|
||||
0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */
|
||||
0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */
|
||||
};
|
||||
|
||||
pio2: ucc_pin@02 {
|
||||
pio-map = <
|
||||
/* port pin dir open_drain assignment has_irq */
|
||||
0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
|
||||
0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
|
||||
0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */
|
||||
0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
|
||||
0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */
|
||||
0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */
|
||||
0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */
|
||||
0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */
|
||||
0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
|
||||
0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
|
||||
};
|
||||
};
|
||||
};
|
||||
135
arch/powerpc/boot/dts/p1025rdb_32b.dts
Normal file
135
arch/powerpc/boot/dts/p1025rdb_32b.dts
Normal file
@ -0,0 +1,135 @@
|
||||
/*
|
||||
* P1025 RDB Device Tree Source (32-bit address map)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1021si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1025RDB";
|
||||
compatible = "fsl,P1025RDB";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes */
|
||||
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
|
||||
0x1 0x0 0x0 0xff800000 0x00040000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
qe: qe@ffe80000 {
|
||||
ranges = <0x0 0x0 0xffe80000 0x40000>;
|
||||
reg = <0 0xffe80000 0 0x480>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
status = "disabled"; /* no firmware loaded */
|
||||
|
||||
enet3: ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
rx-clock-name = "clk12";
|
||||
tx-clock-name = "clk9";
|
||||
pio-handle = <&pio1>;
|
||||
phy-handle = <&qe_phy0>;
|
||||
phy-connection-type = "mii";
|
||||
};
|
||||
|
||||
mdio@2120 {
|
||||
qe_phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <4 1 0 0>;
|
||||
reg = <0x6>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy1: ethernet-phy@03 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet4: ucc@2400 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk13";
|
||||
pio-handle = <&pio2>;
|
||||
phy-handle = <&qe_phy1>;
|
||||
phy-connection-type = "rmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1025rdb.dtsi"
|
||||
/include/ "fsl/p1021si-post.dtsi"
|
||||
88
arch/powerpc/boot/dts/p1025rdb_36b.dts
Normal file
88
arch/powerpc/boot/dts/p1025rdb_36b.dts
Normal file
@ -0,0 +1,88 @@
|
||||
/*
|
||||
* P1025 RDB Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1021si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1025RDB";
|
||||
compatible = "fsl,P1025RDB";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes */
|
||||
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
|
||||
0x1 0x0 0xf 0xff800000 0x00040000>;
|
||||
};
|
||||
|
||||
soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1025rdb.dtsi"
|
||||
/include/ "fsl/p1021si-post.dtsi"
|
||||
241
arch/powerpc/boot/dts/p2020rdb-pc.dtsi
Normal file
241
arch/powerpc/boot/dts/p2020rdb-pc.dtsi
Normal file
@ -0,0 +1,241 @@
|
||||
/*
|
||||
* P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 256KB for Vitesse 7385 Switch firmware */
|
||||
reg = <0x0 0x00040000>;
|
||||
label = "NOR Vitesse-7385 Firmware";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
/* 256KB for DTB Image */
|
||||
reg = <0x00040000 0x00040000>;
|
||||
label = "NOR DTB Image";
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 3.5 MB for Linux Kernel Image */
|
||||
reg = <0x00080000 0x00380000>;
|
||||
label = "NOR Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
/* 11MB for JFFS2 based Root file System */
|
||||
reg = <0x00400000 0x00b00000>;
|
||||
label = "NOR JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@f00000 {
|
||||
/* This location must not be altered */
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
/* 512KB for u-boot Environment Variables */
|
||||
reg = <0x00f00000 0x00100000>;
|
||||
label = "NOR U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p2020-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x1 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND DTB Image";
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00400000>;
|
||||
label = "NAND Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
/* 4MB for Compressed Root file System Image */
|
||||
reg = <0x00600000 0x00400000>;
|
||||
label = "NAND Compressed RFS Image";
|
||||
};
|
||||
|
||||
partition@a00000 {
|
||||
/* 7MB for JFFS2 based Root file System */
|
||||
reg = <0x00a00000 0x00700000>;
|
||||
label = "NAND JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1100000 {
|
||||
/* 15MB for JFFS2 based Root file System */
|
||||
reg = <0x01100000 0x00f00000>;
|
||||
label = "NAND Writable User area";
|
||||
};
|
||||
};
|
||||
|
||||
L2switch@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "vitesse-7385";
|
||||
reg = <0x2 0x0 0x20000>;
|
||||
};
|
||||
|
||||
cpld@3,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cpld";
|
||||
reg = <0x3 0x0 0x20000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
i2c@3000 {
|
||||
rtc@68 {
|
||||
compatible = "pericom,pt7c4338";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,m25p80";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partition@0 {
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00080000>;
|
||||
label = "SPI U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 512KB for DTB Image */
|
||||
reg = <0x00080000 0x00080000>;
|
||||
label = "SPI DTB Image";
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00100000 0x00400000>;
|
||||
label = "SPI Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@500000 {
|
||||
/* 4MB for Compressed RFS Image */
|
||||
reg = <0x00500000 0x00400000>;
|
||||
label = "SPI Compressed RFS Image";
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
/* 7MB for JFFS2 based RFS */
|
||||
reg = <0x00900000 0x00700000>;
|
||||
label = "SPI JFFS2 RFS";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <3 1 0 0>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ptp_clock@24e00 {
|
||||
fsl,tclk-period = <5>;
|
||||
fsl,tmr-prsc = <200>;
|
||||
fsl,tmr-add = <0xCCCCCCCD>;
|
||||
fsl,tmr-fiper1 = <0x3B9AC9FB>;
|
||||
fsl,tmr-fiper2 = <0x0001869B>;
|
||||
fsl,max-adj = <249999999>;
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
96
arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
Normal file
96
arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* P2020 RDB-PC 32Bit Physical Address Map Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p2020si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,P2020RDB";
|
||||
compatible = "fsl,P2020RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR and NAND Flashes */
|
||||
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
|
||||
0x1 0x0 0x0 0xff800000 0x00040000
|
||||
0x2 0x0 0x0 0xffb00000 0x00020000
|
||||
0x3 0x0 0x0 0xffa00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe08000 {
|
||||
reg = <0 0xffe08000 0 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pci1: pcie@ffe09000 {
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@ffe0a000 {
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p2020rdb-pc.dtsi"
|
||||
/include/ "fsl/p2020si-post.dtsi"
|
||||
96
arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
Normal file
96
arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* P2020 RDB-PC 36Bit Physical Address Map Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p2020si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,P2020RDB";
|
||||
compatible = "fsl,P2020RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR and NAND Flashes */
|
||||
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
|
||||
0x1 0x0 0xf 0xff800000 0x00040000
|
||||
0x2 0x0 0xf 0xffb00000 0x00020000
|
||||
0x3 0x0 0xf 0xffa00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@fffe08000 {
|
||||
reg = <0xf 0xffe08000 0 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pci1: pcie@fffe09000 {
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@fffe0a000 {
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p2020rdb-pc.dtsi"
|
||||
/include/ "fsl/p2020si-post.dtsi"
|
||||
@ -34,7 +34,7 @@
|
||||
|
||||
/* NOR and NAND Flashes */
|
||||
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
|
||||
0x1 0x0 0x0 0xffa00000 0x00040000
|
||||
0x1 0x0 0x0 0xff800000 0x00040000
|
||||
0x2 0x0 0x0 0xffb00000 0x00020000>;
|
||||
|
||||
nor@0,0 {
|
||||
@ -157,7 +157,7 @@
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partition@0 {
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
|
||||
@ -144,6 +144,7 @@ tmp=$tmpdir/zImage.$$.o
|
||||
ksection=.kernel:vmlinux.strip
|
||||
isection=.kernel:initrd
|
||||
link_address='0x400000'
|
||||
make_space=y
|
||||
|
||||
case "$platform" in
|
||||
pseries)
|
||||
@ -210,6 +211,7 @@ ps3)
|
||||
ksection=.kernel:vmlinux.bin
|
||||
isection=.kernel:initrd
|
||||
link_address=''
|
||||
make_space=n
|
||||
pie=
|
||||
;;
|
||||
ep88xc|ep405|ep8248e)
|
||||
@ -278,17 +280,19 @@ else
|
||||
rm -f $vmz.$$
|
||||
fi
|
||||
|
||||
# Round the size to next higher MB limit
|
||||
round_size=$(((strip_size + 0xfffff) & 0xfff00000))
|
||||
if [ "$make_space" = "y" ]; then
|
||||
# Round the size to next higher MB limit
|
||||
round_size=$(((strip_size + 0xfffff) & 0xfff00000))
|
||||
|
||||
round_size=0x$(printf "%x" $round_size)
|
||||
link_addr=$(printf "%d" $link_address)
|
||||
round_size=0x$(printf "%x" $round_size)
|
||||
link_addr=$(printf "%d" $link_address)
|
||||
|
||||
if [ $link_addr -lt $strip_size ]; then
|
||||
echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \
|
||||
"overlaps the address of the wrapper($link_address)"
|
||||
echo "INFO: Fixing the link_address of wrapper to ($round_size)"
|
||||
link_address=$round_size
|
||||
if [ $link_addr -lt $strip_size ]; then
|
||||
echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \
|
||||
"overlaps the address of the wrapper($link_address)"
|
||||
echo "INFO: Fixing the link_address of wrapper to ($round_size)"
|
||||
link_address=$round_size
|
||||
fi
|
||||
fi
|
||||
|
||||
vmz="$vmz$gzip"
|
||||
|
||||
257
arch/powerpc/configs/85xx/ge_imp3a_defconfig
Normal file
257
arch/powerpc/configs/85xx/ge_imp3a_defconfig
Normal file
@ -0,0 +1,257 @@
|
||||
CONFIG_PPC_85xx=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_GE_IMP3A=y
|
||||
CONFIG_QUICC_ENGINE=y
|
||||
CONFIG_QE_GPIO=y
|
||||
CONFIG_CPM2=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_HZ_1000=y
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_MATH_EMULATION=y
|
||||
CONFIG_IRQ_ALL_CPUS=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=17
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCCARD=y
|
||||
# CONFIG_PCMCIA_LOAD_CIS is not set
|
||||
CONFIG_YENTA=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=m
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_MULTIPLE_TABLES=y
|
||||
CONFIG_IP_ROUTE_MULTIPATH=y
|
||||
CONFIG_IP_ROUTE_VERBOSE=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_IP_PNP_RARP=y
|
||||
CONFIG_NET_IPIP=m
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_IP_PIMSM_V2=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
CONFIG_NET_PKTGEN=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_FSL_ELBC=y
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_CRYPTOLOOP=m
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=131072
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_DS1682=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_AHCI=y
|
||||
CONFIG_SATA_SIL24=y
|
||||
# CONFIG_ATA_SFF is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_BONDING=m
|
||||
CONFIG_DUMMY=m
|
||||
CONFIG_NETCONSOLE=y
|
||||
CONFIG_NETPOLL_TRAP=y
|
||||
CONFIG_TUN=m
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
CONFIG_FS_ENET=y
|
||||
CONFIG_UCC_GETH=y
|
||||
CONFIG_GIANFAR=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_PPP_SYNC_TTY=m
|
||||
CONFIG_SLIP=m
|
||||
CONFIG_SLIP_COMPRESSED=y
|
||||
CONFIG_SLIP_SMART=y
|
||||
CONFIG_SLIP_MODE_SLIP6=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=2
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||
CONFIG_SERIAL_8250_RSA=y
|
||||
CONFIG_SERIAL_QE=m
|
||||
CONFIG_NVRAM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_CPM=m
|
||||
CONFIG_I2C_MPC=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_GE_FPGA=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_SENSORS_LM92=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_GEF_WDT=y
|
||||
CONFIG_VIDEO_OUTPUT_CONTROL=m
|
||||
CONFIG_HID_DRAGONRISE=y
|
||||
CONFIG_HID_GYRATION=y
|
||||
CONFIG_HID_TWINHAN=y
|
||||
CONFIG_HID_ORTEK=y
|
||||
CONFIG_HID_PANTHERLORD=y
|
||||
CONFIG_HID_PETALYNX=y
|
||||
CONFIG_HID_SAMSUNG=y
|
||||
CONFIG_HID_SONY=y
|
||||
CONFIG_HID_SUNPLUS=y
|
||||
CONFIG_HID_GREENASIA=y
|
||||
CONFIG_HID_SMARTJOYPLUS=y
|
||||
CONFIG_HID_TOPSEED=y
|
||||
CONFIG_HID_THRUSTMASTER=y
|
||||
CONFIG_HID_ZEROPLUS=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
CONFIG_USB_EHCI_FSL=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
|
||||
CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_EDAC=y
|
||||
CONFIG_EDAC_MM_EDAC=y
|
||||
CONFIG_EDAC_MPC85XX=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_INTF_PROC is not set
|
||||
CONFIG_RTC_DRV_RX8581=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_FSL_DMA=y
|
||||
# CONFIG_NET_DMA is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_EXT3_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
CONFIG_UDF_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=850
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=y
|
||||
CONFIG_NFSD_V4=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_CIFS_XATTR=y
|
||||
CONFIG_CIFS_POSIX=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_737=m
|
||||
CONFIG_NLS_CODEPAGE_775=m
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_CODEPAGE_852=m
|
||||
CONFIG_NLS_CODEPAGE_855=m
|
||||
CONFIG_NLS_CODEPAGE_857=m
|
||||
CONFIG_NLS_CODEPAGE_860=m
|
||||
CONFIG_NLS_CODEPAGE_861=m
|
||||
CONFIG_NLS_CODEPAGE_862=m
|
||||
CONFIG_NLS_CODEPAGE_863=m
|
||||
CONFIG_NLS_CODEPAGE_864=m
|
||||
CONFIG_NLS_CODEPAGE_865=m
|
||||
CONFIG_NLS_CODEPAGE_866=m
|
||||
CONFIG_NLS_CODEPAGE_869=m
|
||||
CONFIG_NLS_CODEPAGE_936=m
|
||||
CONFIG_NLS_CODEPAGE_950=m
|
||||
CONFIG_NLS_CODEPAGE_932=m
|
||||
CONFIG_NLS_CODEPAGE_949=m
|
||||
CONFIG_NLS_CODEPAGE_874=m
|
||||
CONFIG_NLS_ISO8859_8=m
|
||||
CONFIG_NLS_CODEPAGE_1250=m
|
||||
CONFIG_NLS_CODEPAGE_1251=m
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_ISO8859_2=m
|
||||
CONFIG_NLS_ISO8859_3=m
|
||||
CONFIG_NLS_ISO8859_4=m
|
||||
CONFIG_NLS_ISO8859_5=m
|
||||
CONFIG_NLS_ISO8859_6=m
|
||||
CONFIG_NLS_ISO8859_7=m
|
||||
CONFIG_NLS_ISO8859_9=m
|
||||
CONFIG_NLS_ISO8859_13=m
|
||||
CONFIG_NLS_ISO8859_14=m
|
||||
CONFIG_NLS_ISO8859_15=y
|
||||
CONFIG_NLS_KOI8_R=m
|
||||
CONFIG_NLS_KOI8_U=m
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_CRC_T10DIF=y
|
||||
CONFIG_LIBCRC32C=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_SHA256=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRYPTO_DEV_TALITOS=y
|
||||
@ -131,6 +131,7 @@ CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MPC=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_GE_FPGA=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_SENSORS_LM92=y
|
||||
CONFIG_WATCHDOG=y
|
||||
|
||||
@ -132,6 +132,7 @@ CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MPC=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_GE_FPGA=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_SENSORS_LM92=y
|
||||
CONFIG_WATCHDOG=y
|
||||
|
||||
@ -183,6 +183,8 @@ CONFIG_NVRAM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MPC=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_GE_FPGA=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_SENSORS_LM92=y
|
||||
CONFIG_WATCHDOG=y
|
||||
|
||||
@ -1,236 +0,0 @@
|
||||
CONFIG_PPC64=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_AUDIT=y
|
||||
CONFIG_AUDITSYSCALL=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODVERSIONS=y
|
||||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
# CONFIG_PPC_PSERIES is not set
|
||||
CONFIG_LPARCFG=y
|
||||
CONFIG_PPC_ISERIES=y
|
||||
CONFIG_VIODASD=y
|
||||
CONFIG_VIOCD=m
|
||||
CONFIG_VIOTAPE=m
|
||||
# CONFIG_PPC_PMAC is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IRQ_ALL_CPUS=y
|
||||
# CONFIG_MIGRATION is not set
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=m
|
||||
CONFIG_XFRM_SUB_POLICY=y
|
||||
CONFIG_NET_KEY=m
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_NET_IPIP=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_NETFILTER=y
|
||||
CONFIG_NETFILTER_NETLINK_QUEUE=m
|
||||
CONFIG_NETFILTER_NETLINK_LOG=m
|
||||
CONFIG_NF_CONNTRACK=m
|
||||
CONFIG_NF_CONNTRACK_EVENTS=y
|
||||
# CONFIG_NF_CT_PROTO_SCTP is not set
|
||||
CONFIG_NF_CONNTRACK_FTP=m
|
||||
CONFIG_NF_CONNTRACK_IRC=m
|
||||
CONFIG_NF_CONNTRACK_TFTP=m
|
||||
CONFIG_NF_CT_NETLINK=m
|
||||
CONFIG_NETFILTER_TPROXY=m
|
||||
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
|
||||
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
|
||||
CONFIG_NETFILTER_XT_TARGET_DSCP=m
|
||||
CONFIG_NETFILTER_XT_TARGET_MARK=m
|
||||
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
|
||||
CONFIG_NETFILTER_XT_TARGET_TPROXY=m
|
||||
CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
|
||||
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
|
||||
CONFIG_NETFILTER_XT_MATCH_DSCP=m
|
||||
CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
|
||||
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
|
||||
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
|
||||
CONFIG_NETFILTER_XT_MATCH_MAC=m
|
||||
CONFIG_NETFILTER_XT_MATCH_MARK=m
|
||||
CONFIG_NETFILTER_XT_MATCH_OWNER=m
|
||||
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
|
||||
CONFIG_NETFILTER_XT_MATCH_RATEEST=m
|
||||
CONFIG_NETFILTER_XT_MATCH_REALM=m
|
||||
CONFIG_NETFILTER_XT_MATCH_RECENT=m
|
||||
CONFIG_NETFILTER_XT_MATCH_STRING=m
|
||||
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
|
||||
CONFIG_NETFILTER_XT_MATCH_TIME=m
|
||||
CONFIG_NF_CONNTRACK_IPV4=m
|
||||
CONFIG_IP_NF_QUEUE=m
|
||||
CONFIG_IP_NF_IPTABLES=m
|
||||
CONFIG_IP_NF_MATCH_ADDRTYPE=m
|
||||
CONFIG_IP_NF_MATCH_ECN=m
|
||||
CONFIG_IP_NF_MATCH_TTL=m
|
||||
CONFIG_IP_NF_FILTER=m
|
||||
CONFIG_IP_NF_TARGET_REJECT=m
|
||||
CONFIG_IP_NF_TARGET_LOG=m
|
||||
CONFIG_IP_NF_TARGET_ULOG=m
|
||||
CONFIG_NF_NAT=m
|
||||
CONFIG_IP_NF_TARGET_MASQUERADE=m
|
||||
CONFIG_IP_NF_TARGET_NETMAP=m
|
||||
CONFIG_IP_NF_TARGET_REDIRECT=m
|
||||
CONFIG_IP_NF_MANGLE=m
|
||||
CONFIG_IP_NF_TARGET_CLUSTERIP=m
|
||||
CONFIG_IP_NF_TARGET_ECN=m
|
||||
CONFIG_IP_NF_TARGET_TTL=m
|
||||
CONFIG_IP_NF_RAW=m
|
||||
CONFIG_IP_NF_ARPTABLES=m
|
||||
CONFIG_IP_NF_ARPFILTER=m
|
||||
CONFIG_IP_NF_ARP_MANGLE=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=65536
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_BLK_DEV_SR_VENDOR=y
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
CONFIG_SCSI_MULTI_LUN=y
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
CONFIG_SCSI_SPI_ATTRS=y
|
||||
CONFIG_SCSI_FC_ATTRS=y
|
||||
CONFIG_SCSI_SAS_LIBSAS=m
|
||||
CONFIG_SCSI_IBMVSCSI=m
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=y
|
||||
CONFIG_MD_LINEAR=y
|
||||
CONFIG_MD_RAID0=y
|
||||
CONFIG_MD_RAID1=y
|
||||
CONFIG_MD_RAID10=m
|
||||
CONFIG_MD_MULTIPATH=m
|
||||
CONFIG_MD_FAULTY=m
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
CONFIG_DM_CRYPT=m
|
||||
CONFIG_DM_SNAPSHOT=m
|
||||
CONFIG_DM_MIRROR=m
|
||||
CONFIG_DM_ZERO=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_DUMMY=m
|
||||
CONFIG_BONDING=m
|
||||
CONFIG_TUN=m
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_NET_PCI=y
|
||||
CONFIG_PCNET32=y
|
||||
CONFIG_E100=y
|
||||
CONFIG_ACENIC=m
|
||||
CONFIG_E1000=m
|
||||
CONFIG_ISERIES_VETH=y
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_PPP_SYNC_TTY=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPPOE=m
|
||||
CONFIG_NETCONSOLE=y
|
||||
CONFIG_NETPOLL_TRAP=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
CONFIG_SERIAL_ICOM=m
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_GEN_RTC=y
|
||||
CONFIG_RAW_DRIVER=y
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT2_FS_XIP=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_POSIX_ACL=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_REISERFS_FS=y
|
||||
CONFIG_REISERFS_FS_XATTR=y
|
||||
CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_JFS_FS=m
|
||||
CONFIG_JFS_POSIX_ACL=y
|
||||
CONFIG_JFS_SECURITY=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
CONFIG_GFS2_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
CONFIG_UDF_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3_ACL=y
|
||||
CONFIG_NFSD_V4=y
|
||||
CONFIG_RPCSEC_GSS_SPKM3=m
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_CIFS_XATTR=y
|
||||
CONFIG_CIFS_POSIX=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_DLM=m
|
||||
CONFIG_CRC_T10DIF=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
CONFIG_LATENCYTOP=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_DEBUG_STACKOVERFLOW=y
|
||||
CONFIG_DEBUG_STACK_USAGE=y
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA256=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_AES=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_CAST6=m
|
||||
CONFIG_CRYPTO_KHAZAD=m
|
||||
CONFIG_CRYPTO_SEED=m
|
||||
CONFIG_CRYPTO_SERPENT=m
|
||||
CONFIG_CRYPTO_TEA=m
|
||||
CONFIG_CRYPTO_TWOFISH=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
@ -1,8 +1,8 @@
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
@ -13,15 +13,12 @@ CONFIG_PPC_EFIKA=y
|
||||
CONFIG_PPC_LITE5200=y
|
||||
CONFIG_PPC_MEDIA5200=y
|
||||
CONFIG_PPC_MPC5200_BUGFIX=y
|
||||
CONFIG_PPC_MPC5200_GPIO=y
|
||||
CONFIG_PPC_MPC5200_LPBFIFO=m
|
||||
# CONFIG_PPC_PMAC is not set
|
||||
CONFIG_PPC_BESTCOMM=y
|
||||
CONFIG_SIMPLE_GPIO=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
@ -36,23 +33,20 @@ CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CONCAT=y
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_RAM=y
|
||||
CONFIG_MTD_ROM=y
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
CONFIG_MTD_PLATRAM=y
|
||||
CONFIG_MTD_UBI=m
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=32768
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_SCSI_TGT=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
@ -61,11 +55,10 @@ CONFIG_ATA=y
|
||||
CONFIG_PATA_MPC52xx=y
|
||||
CONFIG_PATA_PLATFORM=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_LXT_PHY=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_FEC_MPC52xx=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
CONFIG_AMD_PHY=y
|
||||
CONFIG_LXT_PHY=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
@ -80,11 +73,17 @@ CONFIG_SPI_GPIO=m
|
||||
CONFIG_SPI_MPC52xx=m
|
||||
CONFIG_SPI_MPC52xx_PSC=m
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_SENSORS_LM80=y
|
||||
CONFIG_SENSORS_LM87=m
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_MFD_SM501=m
|
||||
CONFIG_DRM=y
|
||||
CONFIG_VIDEO_OUTPUT_CONTROL=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_FOREIGN_ENDIAN=y
|
||||
CONFIG_FB_RADEON=y
|
||||
CONFIG_FB_SM501=m
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
@ -124,10 +123,11 @@ CONFIG_USB_STORAGE=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_DS1307=y
|
||||
CONFIG_RTC_DRV_DS1374=y
|
||||
CONFIG_RTC_DRV_PCF8563=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
@ -145,5 +145,4 @@ CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
CONFIG_PPC_85xx=y
|
||||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
CONFIG_PPC_85xx=y
|
||||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=8
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
|
||||
@ -17,7 +17,6 @@
|
||||
#include <asm/types.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/firmware.h>
|
||||
|
||||
struct mschunks_map {
|
||||
unsigned long num_chunks;
|
||||
@ -46,30 +45,12 @@ static inline unsigned long addr_to_chunk(unsigned long addr)
|
||||
|
||||
static inline unsigned long phys_to_abs(unsigned long pa)
|
||||
{
|
||||
unsigned long chunk;
|
||||
|
||||
/* This is a no-op on non-iSeries */
|
||||
if (!firmware_has_feature(FW_FEATURE_ISERIES))
|
||||
return pa;
|
||||
|
||||
chunk = addr_to_chunk(pa);
|
||||
|
||||
if (chunk < mschunks_map.num_chunks)
|
||||
chunk = mschunks_map.mapping[chunk];
|
||||
|
||||
return chunk_to_addr(chunk) + (pa & MSCHUNKS_OFFSET_MASK);
|
||||
return pa;
|
||||
}
|
||||
|
||||
/* Convenience macros */
|
||||
#define virt_to_abs(va) phys_to_abs(__pa(va))
|
||||
#define abs_to_virt(aa) __va(aa)
|
||||
|
||||
/*
|
||||
* Converts Virtual Address to Real Address for
|
||||
* Legacy iSeries Hypervisor calls
|
||||
*/
|
||||
#define iseries_hv_addr(virtaddr) \
|
||||
(0x8000000000000000UL | virt_to_abs(virtaddr))
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_ABS_ADDR_H */
|
||||
|
||||
@ -212,6 +212,36 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
||||
return t;
|
||||
}
|
||||
|
||||
/**
|
||||
* atomic_inc_not_zero - increment unless the number is zero
|
||||
* @v: pointer of type atomic_t
|
||||
*
|
||||
* Atomically increments @v by 1, so long as @v is non-zero.
|
||||
* Returns non-zero if @v was non-zero, and zero otherwise.
|
||||
*/
|
||||
static __inline__ int atomic_inc_not_zero(atomic_t *v)
|
||||
{
|
||||
int t1, t2;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
PPC_ATOMIC_ENTRY_BARRIER
|
||||
"1: lwarx %0,0,%2 # atomic_inc_not_zero\n\
|
||||
cmpwi 0,%0,0\n\
|
||||
beq- 2f\n\
|
||||
addic %1,%0,1\n"
|
||||
PPC405_ERR77(0,%2)
|
||||
" stwcx. %1,0,%2\n\
|
||||
bne- 1b\n"
|
||||
PPC_ATOMIC_EXIT_BARRIER
|
||||
"\n\
|
||||
2:"
|
||||
: "=&r" (t1), "=&r" (t2)
|
||||
: "r" (&v->counter)
|
||||
: "cc", "xer", "memory");
|
||||
|
||||
return t1;
|
||||
}
|
||||
#define atomic_inc_not_zero(v) atomic_inc_not_zero((v))
|
||||
|
||||
#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
|
||||
#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
|
||||
@ -467,7 +497,34 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
|
||||
return t != u;
|
||||
}
|
||||
|
||||
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
|
||||
/**
|
||||
* atomic_inc64_not_zero - increment unless the number is zero
|
||||
* @v: pointer of type atomic64_t
|
||||
*
|
||||
* Atomically increments @v by 1, so long as @v is non-zero.
|
||||
* Returns non-zero if @v was non-zero, and zero otherwise.
|
||||
*/
|
||||
static __inline__ long atomic64_inc_not_zero(atomic64_t *v)
|
||||
{
|
||||
long t1, t2;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
PPC_ATOMIC_ENTRY_BARRIER
|
||||
"1: ldarx %0,0,%2 # atomic64_inc_not_zero\n\
|
||||
cmpdi 0,%0,0\n\
|
||||
beq- 2f\n\
|
||||
addic %1,%0,1\n\
|
||||
stdcx. %1,0,%2\n\
|
||||
bne- 1b\n"
|
||||
PPC_ATOMIC_EXIT_BARRIER
|
||||
"\n\
|
||||
2:"
|
||||
: "=&r" (t1), "=&r" (t2)
|
||||
: "r" (&v->counter)
|
||||
: "cc", "xer", "memory");
|
||||
|
||||
return t1;
|
||||
}
|
||||
|
||||
#endif /* __powerpc64__ */
|
||||
|
||||
|
||||
@ -390,6 +390,10 @@ extern const char *powerpc_base_platform;
|
||||
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
||||
CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
|
||||
CPU_FTR_DEBUG_LVL_EXC)
|
||||
#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
||||
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
||||
CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
|
||||
CPU_FTR_DEBUG_LVL_EXC)
|
||||
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
|
||||
|
||||
/* 64-bit CPUs */
|
||||
@ -442,7 +446,7 @@ extern const char *powerpc_base_platform;
|
||||
|
||||
#ifdef __powerpc64__
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
#define CPU_FTRS_POSSIBLE (CPU_FTRS_E5500 | CPU_FTRS_A2)
|
||||
#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500 | CPU_FTRS_A2)
|
||||
#else
|
||||
#define CPU_FTRS_POSSIBLE \
|
||||
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
|
||||
@ -483,7 +487,7 @@ enum {
|
||||
#endif
|
||||
#ifdef CONFIG_E500
|
||||
CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
|
||||
CPU_FTRS_E5500 |
|
||||
CPU_FTRS_E5500 | CPU_FTRS_E6500 |
|
||||
#endif
|
||||
0,
|
||||
};
|
||||
@ -491,7 +495,7 @@ enum {
|
||||
|
||||
#ifdef __powerpc64__
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
#define CPU_FTRS_ALWAYS (CPU_FTRS_E5500 & CPU_FTRS_A2)
|
||||
#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2)
|
||||
#else
|
||||
#define CPU_FTRS_ALWAYS \
|
||||
(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
|
||||
@ -528,7 +532,7 @@ enum {
|
||||
#endif
|
||||
#ifdef CONFIG_E500
|
||||
CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
|
||||
CPU_FTRS_E5500 &
|
||||
CPU_FTRS_E5500 & CPU_FTRS_E6500 &
|
||||
#endif
|
||||
CPU_FTRS_POSSIBLE,
|
||||
};
|
||||
|
||||
@ -31,6 +31,9 @@ struct dev_archdata {
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
dma_addr_t max_direct_dma_addr;
|
||||
#endif
|
||||
#ifdef CONFIG_EEH
|
||||
struct eeh_dev *edev;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct pdev_archdata {
|
||||
|
||||
@ -34,8 +34,6 @@
|
||||
/* Doesn't really apply... */
|
||||
#define MAX_DMA_ADDRESS (~0UL)
|
||||
|
||||
#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
|
||||
|
||||
#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
|
||||
#define dma_outb outb_p
|
||||
#else
|
||||
@ -354,7 +352,5 @@ extern int isa_dma_bridge_buggy;
|
||||
#define isa_dma_bridge_buggy (0)
|
||||
#endif
|
||||
|
||||
#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_DMA_H */
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* eeh.h
|
||||
* Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
|
||||
* Copyright 2001-2012 IBM Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@ -31,44 +31,105 @@ struct device_node;
|
||||
|
||||
#ifdef CONFIG_EEH
|
||||
|
||||
/*
|
||||
* The struct is used to trace EEH state for the associated
|
||||
* PCI device node or PCI device. In future, it might
|
||||
* represent PE as well so that the EEH device to form
|
||||
* another tree except the currently existing tree of PCI
|
||||
* buses and PCI devices
|
||||
*/
|
||||
#define EEH_MODE_SUPPORTED (1<<0) /* EEH supported on the device */
|
||||
#define EEH_MODE_NOCHECK (1<<1) /* EEH check should be skipped */
|
||||
#define EEH_MODE_ISOLATED (1<<2) /* The device has been isolated */
|
||||
#define EEH_MODE_RECOVERING (1<<3) /* Recovering the device */
|
||||
#define EEH_MODE_IRQ_DISABLED (1<<4) /* Interrupt disabled */
|
||||
|
||||
struct eeh_dev {
|
||||
int mode; /* EEH mode */
|
||||
int class_code; /* Class code of the device */
|
||||
int config_addr; /* Config address */
|
||||
int pe_config_addr; /* PE config address */
|
||||
int check_count; /* Times of ignored error */
|
||||
int freeze_count; /* Times of froze up */
|
||||
int false_positives; /* Times of reported #ff's */
|
||||
u32 config_space[16]; /* Saved PCI config space */
|
||||
struct pci_controller *phb; /* Associated PHB */
|
||||
struct device_node *dn; /* Associated device node */
|
||||
struct pci_dev *pdev; /* Associated PCI device */
|
||||
};
|
||||
|
||||
static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
|
||||
{
|
||||
return edev->dn;
|
||||
}
|
||||
|
||||
static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
|
||||
{
|
||||
return edev->pdev;
|
||||
}
|
||||
|
||||
/*
|
||||
* The struct is used to trace the registered EEH operation
|
||||
* callback functions. Actually, those operation callback
|
||||
* functions are heavily platform dependent. That means the
|
||||
* platform should register its own EEH operation callback
|
||||
* functions before any EEH further operations.
|
||||
*/
|
||||
#define EEH_OPT_DISABLE 0 /* EEH disable */
|
||||
#define EEH_OPT_ENABLE 1 /* EEH enable */
|
||||
#define EEH_OPT_THAW_MMIO 2 /* MMIO enable */
|
||||
#define EEH_OPT_THAW_DMA 3 /* DMA enable */
|
||||
#define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */
|
||||
#define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */
|
||||
#define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */
|
||||
#define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */
|
||||
#define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */
|
||||
#define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */
|
||||
#define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */
|
||||
#define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */
|
||||
#define EEH_RESET_HOT 1 /* Hot reset */
|
||||
#define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */
|
||||
#define EEH_LOG_TEMP 1 /* EEH temporary error log */
|
||||
#define EEH_LOG_PERM 2 /* EEH permanent error log */
|
||||
|
||||
struct eeh_ops {
|
||||
char *name;
|
||||
int (*init)(void);
|
||||
int (*set_option)(struct device_node *dn, int option);
|
||||
int (*get_pe_addr)(struct device_node *dn);
|
||||
int (*get_state)(struct device_node *dn, int *state);
|
||||
int (*reset)(struct device_node *dn, int option);
|
||||
int (*wait_state)(struct device_node *dn, int max_wait);
|
||||
int (*get_log)(struct device_node *dn, int severity, char *drv_log, unsigned long len);
|
||||
int (*configure_bridge)(struct device_node *dn);
|
||||
int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
|
||||
int (*write_config)(struct device_node *dn, int where, int size, u32 val);
|
||||
};
|
||||
|
||||
extern struct eeh_ops *eeh_ops;
|
||||
extern int eeh_subsystem_enabled;
|
||||
|
||||
/* Values for eeh_mode bits in device_node */
|
||||
#define EEH_MODE_SUPPORTED (1<<0)
|
||||
#define EEH_MODE_NOCHECK (1<<1)
|
||||
#define EEH_MODE_ISOLATED (1<<2)
|
||||
#define EEH_MODE_RECOVERING (1<<3)
|
||||
#define EEH_MODE_IRQ_DISABLED (1<<4)
|
||||
|
||||
/* Max number of EEH freezes allowed before we consider the device
|
||||
* to be permanently disabled. */
|
||||
/*
|
||||
* Max number of EEH freezes allowed before we consider the device
|
||||
* to be permanently disabled.
|
||||
*/
|
||||
#define EEH_MAX_ALLOWED_FREEZES 5
|
||||
|
||||
void * __devinit eeh_dev_init(struct device_node *dn, void *data);
|
||||
void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb);
|
||||
void __init eeh_dev_phb_init(void);
|
||||
void __init eeh_init(void);
|
||||
#ifdef CONFIG_PPC_PSERIES
|
||||
int __init eeh_pseries_init(void);
|
||||
#endif
|
||||
int __init eeh_ops_register(struct eeh_ops *ops);
|
||||
int __exit eeh_ops_unregister(const char *name);
|
||||
unsigned long eeh_check_failure(const volatile void __iomem *token,
|
||||
unsigned long val);
|
||||
int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
|
||||
void __init pci_addr_cache_build(void);
|
||||
|
||||
/**
|
||||
* eeh_add_device_early
|
||||
* eeh_add_device_late
|
||||
*
|
||||
* Perform eeh initialization for devices added after boot.
|
||||
* Call eeh_add_device_early before doing any i/o to the
|
||||
* device (including config space i/o). Call eeh_add_device_late
|
||||
* to finish the eeh setup for this device.
|
||||
*/
|
||||
void eeh_add_device_tree_early(struct device_node *);
|
||||
void eeh_add_device_tree_late(struct pci_bus *);
|
||||
|
||||
/**
|
||||
* eeh_remove_device_recursive - undo EEH for device & children.
|
||||
* @dev: pci device to be removed
|
||||
*
|
||||
* As above, this removes the device; it also removes child
|
||||
* pci devices as well.
|
||||
*/
|
||||
void eeh_remove_bus_device(struct pci_dev *);
|
||||
|
||||
/**
|
||||
@ -87,8 +148,25 @@ void eeh_remove_bus_device(struct pci_dev *);
|
||||
#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
|
||||
|
||||
#else /* !CONFIG_EEH */
|
||||
|
||||
static inline void *eeh_dev_init(struct device_node *dn, void *data)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { }
|
||||
|
||||
static inline void eeh_dev_phb_init(void) { }
|
||||
|
||||
static inline void eeh_init(void) { }
|
||||
|
||||
#ifdef CONFIG_PPC_PSERIES
|
||||
static inline int eeh_pseries_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PPC_PSERIES */
|
||||
|
||||
static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
|
||||
{
|
||||
return val;
|
||||
|
||||
@ -1,6 +1,4 @@
|
||||
/*
|
||||
* eeh_event.h
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
@ -22,32 +20,19 @@
|
||||
#define ASM_POWERPC_EEH_EVENT_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/** EEH event -- structure holding pci controller data that describes
|
||||
* a change in the isolation status of a PCI slot. A pointer
|
||||
* to this struct is passed as the data pointer in a notify callback.
|
||||
/*
|
||||
* structure holding pci controller data that describes a
|
||||
* change in the isolation status of a PCI slot. A pointer
|
||||
* to this struct is passed as the data pointer in a notify
|
||||
* callback.
|
||||
*/
|
||||
struct eeh_event {
|
||||
struct list_head list;
|
||||
struct device_node *dn; /* struct device node */
|
||||
struct pci_dev *dev; /* affected device */
|
||||
struct list_head list; /* to form event queue */
|
||||
struct eeh_dev *edev; /* EEH device */
|
||||
};
|
||||
|
||||
/**
|
||||
* eeh_send_failure_event - generate a PCI error event
|
||||
* @dev pci device
|
||||
*
|
||||
* This routine builds a PCI error event which will be delivered
|
||||
* to all listeners on the eeh_notifier_chain.
|
||||
*
|
||||
* This routine can be called within an interrupt context;
|
||||
* the actual event will be delivered in a normal context
|
||||
* (from a workqueue).
|
||||
*/
|
||||
int eeh_send_failure_event (struct device_node *dn,
|
||||
struct pci_dev *dev);
|
||||
|
||||
/* Main recovery function */
|
||||
struct pci_dn * handle_eeh_events (struct eeh_event *);
|
||||
int eeh_send_failure_event(struct eeh_dev *edev);
|
||||
struct eeh_dev *handle_eeh_events(struct eeh_event *);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* ASM_POWERPC_EEH_EVENT_H */
|
||||
|
||||
@ -232,23 +232,30 @@ label##_hv: \
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
|
||||
EXC_HV, KVMTEST, vec)
|
||||
|
||||
#define __SOFTEN_TEST(h) \
|
||||
/* This associate vector numbers with bits in paca->irq_happened */
|
||||
#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
|
||||
#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
|
||||
#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
|
||||
#define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
|
||||
|
||||
#define __SOFTEN_TEST(h, vec) \
|
||||
lbz r10,PACASOFTIRQEN(r13); \
|
||||
cmpwi r10,0; \
|
||||
li r10,SOFTEN_VALUE_##vec; \
|
||||
beq masked_##h##interrupt
|
||||
#define _SOFTEN_TEST(h) __SOFTEN_TEST(h)
|
||||
#define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
|
||||
|
||||
#define SOFTEN_TEST_PR(vec) \
|
||||
KVMTEST_PR(vec); \
|
||||
_SOFTEN_TEST(EXC_STD)
|
||||
_SOFTEN_TEST(EXC_STD, vec)
|
||||
|
||||
#define SOFTEN_TEST_HV(vec) \
|
||||
KVMTEST(vec); \
|
||||
_SOFTEN_TEST(EXC_HV)
|
||||
_SOFTEN_TEST(EXC_HV, vec)
|
||||
|
||||
#define SOFTEN_TEST_HV_201(vec) \
|
||||
KVMTEST(vec); \
|
||||
_SOFTEN_TEST(EXC_STD)
|
||||
_SOFTEN_TEST(EXC_STD, vec)
|
||||
|
||||
#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
|
||||
HMT_MEDIUM; \
|
||||
@ -272,73 +279,55 @@ label##_hv: \
|
||||
_MASKABLE_EXCEPTION_PSERIES(vec, label, \
|
||||
EXC_HV, SOFTEN_TEST_HV)
|
||||
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
#define DISABLE_INTS \
|
||||
li r11,0; \
|
||||
stb r11,PACASOFTIRQEN(r13); \
|
||||
BEGIN_FW_FTR_SECTION; \
|
||||
stb r11,PACAHARDIRQEN(r13); \
|
||||
END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
|
||||
TRACE_DISABLE_INTS; \
|
||||
BEGIN_FW_FTR_SECTION; \
|
||||
mfmsr r10; \
|
||||
ori r10,r10,MSR_EE; \
|
||||
mtmsrd r10,1; \
|
||||
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
|
||||
#else
|
||||
#define DISABLE_INTS \
|
||||
li r11,0; \
|
||||
stb r11,PACASOFTIRQEN(r13); \
|
||||
stb r11,PACAHARDIRQEN(r13); \
|
||||
TRACE_DISABLE_INTS
|
||||
#endif /* CONFIG_PPC_ISERIES */
|
||||
/*
|
||||
* Our exception common code can be passed various "additions"
|
||||
* to specify the behaviour of interrupts, whether to kick the
|
||||
* runlatch, etc...
|
||||
*/
|
||||
|
||||
/* Exception addition: Hard disable interrupts */
|
||||
#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
|
||||
|
||||
/* Exception addition: Keep interrupt state */
|
||||
#define ENABLE_INTS \
|
||||
ld r11,PACAKMSR(r13); \
|
||||
ld r12,_MSR(r1); \
|
||||
mfmsr r11; \
|
||||
rlwimi r11,r12,0,MSR_EE; \
|
||||
mtmsrd r11,1
|
||||
|
||||
#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
|
||||
.align 7; \
|
||||
.globl label##_common; \
|
||||
label##_common: \
|
||||
EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
|
||||
DISABLE_INTS; \
|
||||
bl .save_nvgprs; \
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
bl hdlr; \
|
||||
b .ret_from_except
|
||||
#define ADD_NVGPRS \
|
||||
bl .save_nvgprs
|
||||
|
||||
#define RUNLATCH_ON \
|
||||
BEGIN_FTR_SECTION \
|
||||
clrrdi r3,r1,THREAD_SHIFT; \
|
||||
ld r4,TI_LOCAL_FLAGS(r3); \
|
||||
andi. r0,r4,_TLF_RUNLATCH; \
|
||||
beql ppc64_runlatch_on_trampoline; \
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
|
||||
|
||||
#define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
|
||||
.align 7; \
|
||||
.globl label##_common; \
|
||||
label##_common: \
|
||||
EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
|
||||
additions; \
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
bl hdlr; \
|
||||
b ret
|
||||
|
||||
#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
|
||||
EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
|
||||
ADD_NVGPRS;DISABLE_INTS)
|
||||
|
||||
/*
|
||||
* Like STD_EXCEPTION_COMMON, but for exceptions that can occur
|
||||
* in the idle task and therefore need the special idle handling.
|
||||
* in the idle task and therefore need the special idle handling
|
||||
* (finish nap and runlatch)
|
||||
*/
|
||||
#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
|
||||
.align 7; \
|
||||
.globl label##_common; \
|
||||
label##_common: \
|
||||
EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
|
||||
FINISH_NAP; \
|
||||
DISABLE_INTS; \
|
||||
bl .save_nvgprs; \
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
bl hdlr; \
|
||||
b .ret_from_except
|
||||
|
||||
#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
|
||||
.align 7; \
|
||||
.globl label##_common; \
|
||||
label##_common: \
|
||||
EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
|
||||
FINISH_NAP; \
|
||||
DISABLE_INTS; \
|
||||
BEGIN_FTR_SECTION \
|
||||
bl .ppc64_runlatch_on; \
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
bl hdlr; \
|
||||
b .ret_from_except_lite
|
||||
#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
|
||||
EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
|
||||
FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
|
||||
|
||||
/*
|
||||
* When the idle code in power4_idle puts the CPU into NAP mode,
|
||||
|
||||
218
arch/powerpc/include/asm/fadump.h
Normal file
218
arch/powerpc/include/asm/fadump.h
Normal file
@ -0,0 +1,218 @@
|
||||
/*
|
||||
* Firmware Assisted dump header file.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*
|
||||
* Copyright 2011 IBM Corporation
|
||||
* Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
|
||||
*/
|
||||
|
||||
#ifndef __PPC64_FA_DUMP_H__
|
||||
#define __PPC64_FA_DUMP_H__
|
||||
|
||||
#ifdef CONFIG_FA_DUMP
|
||||
|
||||
/*
|
||||
* The RMA region will be saved for later dumping when kernel crashes.
|
||||
* RMA is Real Mode Area, the first block of logical memory address owned
|
||||
* by logical partition, containing the storage that may be accessed with
|
||||
* translate off.
|
||||
*/
|
||||
#define RMA_START 0x0
|
||||
#define RMA_END (ppc64_rma_size)
|
||||
|
||||
/*
|
||||
* On some Power systems where RMO is 128MB, it still requires minimum of
|
||||
* 256MB for kernel to boot successfully. When kdump infrastructure is
|
||||
* configured to save vmcore over network, we run into OOM issue while
|
||||
* loading modules related to network setup. Hence we need aditional 64M
|
||||
* of memory to avoid OOM issue.
|
||||
*/
|
||||
#define MIN_BOOT_MEM (((RMA_END < (0x1UL << 28)) ? (0x1UL << 28) : RMA_END) \
|
||||
+ (0x1UL << 26))
|
||||
|
||||
#define memblock_num_regions(memblock_type) (memblock.memblock_type.cnt)
|
||||
|
||||
#ifndef ELF_CORE_EFLAGS
|
||||
#define ELF_CORE_EFLAGS 0
|
||||
#endif
|
||||
|
||||
/* Firmware provided dump sections */
|
||||
#define FADUMP_CPU_STATE_DATA 0x0001
|
||||
#define FADUMP_HPTE_REGION 0x0002
|
||||
#define FADUMP_REAL_MODE_REGION 0x0011
|
||||
|
||||
/* Dump request flag */
|
||||
#define FADUMP_REQUEST_FLAG 0x00000001
|
||||
|
||||
/* FAD commands */
|
||||
#define FADUMP_REGISTER 1
|
||||
#define FADUMP_UNREGISTER 2
|
||||
#define FADUMP_INVALIDATE 3
|
||||
|
||||
/* Dump status flag */
|
||||
#define FADUMP_ERROR_FLAG 0x2000
|
||||
|
||||
#define FADUMP_CPU_ID_MASK ((1UL << 32) - 1)
|
||||
|
||||
#define CPU_UNKNOWN (~((u32)0))
|
||||
|
||||
/* Utility macros */
|
||||
#define SKIP_TO_NEXT_CPU(reg_entry) \
|
||||
({ \
|
||||
while (reg_entry->reg_id != REG_ID("CPUEND")) \
|
||||
reg_entry++; \
|
||||
reg_entry++; \
|
||||
})
|
||||
|
||||
/* Kernel Dump section info */
|
||||
struct fadump_section {
|
||||
u32 request_flag;
|
||||
u16 source_data_type;
|
||||
u16 error_flags;
|
||||
u64 source_address;
|
||||
u64 source_len;
|
||||
u64 bytes_dumped;
|
||||
u64 destination_address;
|
||||
};
|
||||
|
||||
/* ibm,configure-kernel-dump header. */
|
||||
struct fadump_section_header {
|
||||
u32 dump_format_version;
|
||||
u16 dump_num_sections;
|
||||
u16 dump_status_flag;
|
||||
u32 offset_first_dump_section;
|
||||
|
||||
/* Fields for disk dump option. */
|
||||
u32 dd_block_size;
|
||||
u64 dd_block_offset;
|
||||
u64 dd_num_blocks;
|
||||
u32 dd_offset_disk_path;
|
||||
|
||||
/* Maximum time allowed to prevent an automatic dump-reboot. */
|
||||
u32 max_time_auto;
|
||||
};
|
||||
|
||||
/*
|
||||
* Firmware Assisted dump memory structure. This structure is required for
|
||||
* registering future kernel dump with power firmware through rtas call.
|
||||
*
|
||||
* No disk dump option. Hence disk dump path string section is not included.
|
||||
*/
|
||||
struct fadump_mem_struct {
|
||||
struct fadump_section_header header;
|
||||
|
||||
/* Kernel dump sections */
|
||||
struct fadump_section cpu_state_data;
|
||||
struct fadump_section hpte_region;
|
||||
struct fadump_section rmr_region;
|
||||
};
|
||||
|
||||
/* Firmware-assisted dump configuration details. */
|
||||
struct fw_dump {
|
||||
unsigned long cpu_state_data_size;
|
||||
unsigned long hpte_region_size;
|
||||
unsigned long boot_memory_size;
|
||||
unsigned long reserve_dump_area_start;
|
||||
unsigned long reserve_dump_area_size;
|
||||
/* cmd line option during boot */
|
||||
unsigned long reserve_bootvar;
|
||||
|
||||
unsigned long fadumphdr_addr;
|
||||
unsigned long cpu_notes_buf;
|
||||
unsigned long cpu_notes_buf_size;
|
||||
|
||||
int ibm_configure_kernel_dump;
|
||||
|
||||
unsigned long fadump_enabled:1;
|
||||
unsigned long fadump_supported:1;
|
||||
unsigned long dump_active:1;
|
||||
unsigned long dump_registered:1;
|
||||
};
|
||||
|
||||
/*
|
||||
* Copy the ascii values for first 8 characters from a string into u64
|
||||
* variable at their respective indexes.
|
||||
* e.g.
|
||||
* The string "FADMPINF" will be converted into 0x4641444d50494e46
|
||||
*/
|
||||
static inline u64 str_to_u64(const char *str)
|
||||
{
|
||||
u64 val = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < sizeof(val); i++)
|
||||
val = (*str) ? (val << 8) | *str++ : val << 8;
|
||||
return val;
|
||||
}
|
||||
#define STR_TO_HEX(x) str_to_u64(x)
|
||||
#define REG_ID(x) str_to_u64(x)
|
||||
|
||||
#define FADUMP_CRASH_INFO_MAGIC STR_TO_HEX("FADMPINF")
|
||||
#define REGSAVE_AREA_MAGIC STR_TO_HEX("REGSAVE")
|
||||
|
||||
/* The firmware-assisted dump format.
|
||||
*
|
||||
* The register save area is an area in the partition's memory used to preserve
|
||||
* the register contents (CPU state data) for the active CPUs during a firmware
|
||||
* assisted dump. The dump format contains register save area header followed
|
||||
* by register entries. Each list of registers for a CPU starts with
|
||||
* "CPUSTRT" and ends with "CPUEND".
|
||||
*/
|
||||
|
||||
/* Register save area header. */
|
||||
struct fadump_reg_save_area_header {
|
||||
u64 magic_number;
|
||||
u32 version;
|
||||
u32 num_cpu_offset;
|
||||
};
|
||||
|
||||
/* Register entry. */
|
||||
struct fadump_reg_entry {
|
||||
u64 reg_id;
|
||||
u64 reg_value;
|
||||
};
|
||||
|
||||
/* fadump crash info structure */
|
||||
struct fadump_crash_info_header {
|
||||
u64 magic_number;
|
||||
u64 elfcorehdr_addr;
|
||||
u32 crashing_cpu;
|
||||
struct pt_regs regs;
|
||||
struct cpumask cpu_online_mask;
|
||||
};
|
||||
|
||||
/* Crash memory ranges */
|
||||
#define INIT_CRASHMEM_RANGES (INIT_MEMBLOCK_REGIONS + 2)
|
||||
|
||||
struct fad_crash_memory_ranges {
|
||||
unsigned long long base;
|
||||
unsigned long long size;
|
||||
};
|
||||
|
||||
extern int early_init_dt_scan_fw_dump(unsigned long node,
|
||||
const char *uname, int depth, void *data);
|
||||
extern int fadump_reserve_mem(void);
|
||||
extern int setup_fadump(void);
|
||||
extern int is_fadump_active(void);
|
||||
extern void crash_fadump(struct pt_regs *, const char *);
|
||||
extern void fadump_cleanup(void);
|
||||
|
||||
extern void vmcore_cleanup(void);
|
||||
#else /* CONFIG_FA_DUMP */
|
||||
static inline int is_fadump_active(void) { return 0; }
|
||||
static inline void crash_fadump(struct pt_regs *regs, const char *str) { }
|
||||
#endif
|
||||
#endif
|
||||
@ -41,7 +41,6 @@
|
||||
#define FW_FEATURE_XDABR ASM_CONST(0x0000000000040000)
|
||||
#define FW_FEATURE_MULTITCE ASM_CONST(0x0000000000080000)
|
||||
#define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000)
|
||||
#define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000)
|
||||
#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000)
|
||||
#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000)
|
||||
#define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000)
|
||||
@ -65,8 +64,6 @@ enum {
|
||||
FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR |
|
||||
FW_FEATURE_CMO | FW_FEATURE_VPHN | FW_FEATURE_XCMO,
|
||||
FW_FEATURE_PSERIES_ALWAYS = 0,
|
||||
FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
|
||||
FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
|
||||
FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2,
|
||||
FW_FEATURE_POWERNV_ALWAYS = 0,
|
||||
FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
|
||||
@ -79,9 +76,6 @@ enum {
|
||||
#ifdef CONFIG_PPC_PSERIES
|
||||
FW_FEATURE_PSERIES_POSSIBLE |
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
FW_FEATURE_ISERIES_POSSIBLE |
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_POWERNV
|
||||
FW_FEATURE_POWERNV_POSSIBLE |
|
||||
#endif
|
||||
@ -99,9 +93,6 @@ enum {
|
||||
#ifdef CONFIG_PPC_PSERIES
|
||||
FW_FEATURE_PSERIES_ALWAYS &
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
FW_FEATURE_ISERIES_ALWAYS &
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_POWERNV
|
||||
FW_FEATURE_POWERNV_ALWAYS &
|
||||
#endif
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
* Authors: Jeff Brown
|
||||
* Timur Tabi <timur@freescale.com>
|
||||
*
|
||||
* Copyright 2004,2007 Freescale Semiconductor, Inc
|
||||
* Copyright 2004,2007,2012 Freescale Semiconductor, Inc
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
@ -114,6 +114,10 @@ struct ccsr_guts_86xx {
|
||||
__be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
/* Alternate function signal multiplex control */
|
||||
#define MPC85xx_PMUXCR_QE(x) (0x8000 >> (x))
|
||||
|
||||
#ifdef CONFIG_PPC_86xx
|
||||
|
||||
#define CCSR_GUTS_DMACR_DEV_SSI 0 /* DMA controller/channel set to SSI */
|
||||
|
||||
@ -11,6 +11,27 @@
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
|
||||
/*
|
||||
* PACA flags in paca->irq_happened.
|
||||
*
|
||||
* This bits are set when interrupts occur while soft-disabled
|
||||
* and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
|
||||
* is set whenever we manually hard disable.
|
||||
*/
|
||||
#define PACA_IRQ_HARD_DIS 0x01
|
||||
#define PACA_IRQ_DBELL 0x02
|
||||
#define PACA_IRQ_EE 0x04
|
||||
#define PACA_IRQ_DEC 0x08 /* Or FIT */
|
||||
#define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
|
||||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
extern void __replay_interrupt(unsigned int vector);
|
||||
|
||||
extern void timer_interrupt(struct pt_regs *);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
@ -42,7 +63,6 @@ static inline unsigned long arch_local_irq_disable(void)
|
||||
}
|
||||
|
||||
extern void arch_local_irq_restore(unsigned long);
|
||||
extern void iseries_handle_interrupts(void);
|
||||
|
||||
static inline void arch_local_irq_enable(void)
|
||||
{
|
||||
@ -68,16 +88,33 @@ static inline bool arch_irqs_disabled(void)
|
||||
#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory");
|
||||
#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory");
|
||||
#else
|
||||
#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1)
|
||||
#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
|
||||
#define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
|
||||
#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
|
||||
#endif
|
||||
|
||||
#define hard_irq_disable() \
|
||||
do { \
|
||||
__hard_irq_disable(); \
|
||||
get_paca()->soft_enabled = 0; \
|
||||
get_paca()->hard_enabled = 0; \
|
||||
} while(0)
|
||||
static inline void hard_irq_disable(void)
|
||||
{
|
||||
__hard_irq_disable();
|
||||
get_paca()->soft_enabled = 0;
|
||||
get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is called by asynchronous interrupts to conditionally
|
||||
* re-enable hard interrupts when soft-disabled after having
|
||||
* cleared the source of the interrupt
|
||||
*/
|
||||
static inline void may_hard_irq_enable(void)
|
||||
{
|
||||
get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
|
||||
if (!(get_paca()->irq_happened & PACA_IRQ_EE))
|
||||
__hard_irq_enable();
|
||||
}
|
||||
|
||||
static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
|
||||
{
|
||||
return !regs->softe;
|
||||
}
|
||||
|
||||
#else /* CONFIG_PPC64 */
|
||||
|
||||
@ -139,6 +176,13 @@ static inline bool arch_irqs_disabled(void)
|
||||
|
||||
#define hard_irq_disable() arch_local_irq_disable()
|
||||
|
||||
static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
|
||||
{
|
||||
return !(regs->msr & MSR_EE);
|
||||
}
|
||||
|
||||
static inline void may_hard_irq_enable(void) { }
|
||||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
#define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
|
||||
@ -149,5 +193,6 @@ static inline bool arch_irqs_disabled(void)
|
||||
*/
|
||||
struct irq_chip;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_HW_IRQ_H */
|
||||
|
||||
@ -39,24 +39,31 @@
|
||||
#define TRACE_ENABLE_INTS TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on)
|
||||
#define TRACE_DISABLE_INTS TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)
|
||||
|
||||
#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) \
|
||||
cmpdi en,0; \
|
||||
bne 95f; \
|
||||
stb en,PACASOFTIRQEN(r13); \
|
||||
TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off) \
|
||||
b skip; \
|
||||
95: TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on) \
|
||||
li en,1;
|
||||
#define TRACE_AND_RESTORE_IRQ(en) \
|
||||
TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f); \
|
||||
stb en,PACASOFTIRQEN(r13); \
|
||||
96:
|
||||
/*
|
||||
* This is used by assembly code to soft-disable interrupts
|
||||
*/
|
||||
#define SOFT_DISABLE_INTS(__rA, __rB) \
|
||||
lbz __rA,PACASOFTIRQEN(r13); \
|
||||
lbz __rB,PACAIRQHAPPENED(r13); \
|
||||
cmpwi cr0,__rA,0; \
|
||||
li __rA,0; \
|
||||
ori __rB,__rB,PACA_IRQ_HARD_DIS; \
|
||||
stb __rB,PACAIRQHAPPENED(r13); \
|
||||
beq 44f; \
|
||||
stb __rA,PACASOFTIRQEN(r13); \
|
||||
TRACE_DISABLE_INTS; \
|
||||
44:
|
||||
|
||||
#else
|
||||
#define TRACE_ENABLE_INTS
|
||||
#define TRACE_DISABLE_INTS
|
||||
#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip)
|
||||
#define TRACE_AND_RESTORE_IRQ(en) \
|
||||
stb en,PACASOFTIRQEN(r13)
|
||||
|
||||
#define SOFT_DISABLE_INTS(__rA, __rB) \
|
||||
lbz __rA,PACAIRQHAPPENED(r13); \
|
||||
li __rB,0; \
|
||||
ori __rA,__rA,PACA_IRQ_HARD_DIS; \
|
||||
stb __rB,PACASOFTIRQEN(r13); \
|
||||
stb __rA,PACAIRQHAPPENED(r13)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
@ -1,31 +0,0 @@
|
||||
/*
|
||||
* Copyright © 2008 Stephen Rothwell IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_ALPACA_H
|
||||
#define _ASM_POWERPC_ISERIES_ALPACA_H
|
||||
|
||||
/*
|
||||
* This is the part of the paca that the iSeries hypervisor
|
||||
* needs to be statically initialised. Immediately after boot
|
||||
* we switch to the normal Linux paca.
|
||||
*/
|
||||
struct alpaca {
|
||||
struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
|
||||
const void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */
|
||||
};
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_ALPACA_H */
|
||||
@ -1,111 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* This file contains the "hypervisor call" interface which is used to
|
||||
* drive the hypervisor from the OS.
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_CALL_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_CALL_H
|
||||
|
||||
#include <asm/iseries/hv_call_sc.h>
|
||||
#include <asm/iseries/hv_types.h>
|
||||
#include <asm/paca.h>
|
||||
|
||||
/* Type of yield for HvCallBaseYieldProcessor */
|
||||
#define HvCall_YieldTimed 0 /* Yield until specified time (tb) */
|
||||
#define HvCall_YieldToActive 1 /* Yield until all active procs have run */
|
||||
#define HvCall_YieldToProc 2 /* Yield until the specified processor has run */
|
||||
|
||||
/* interrupt masks for setEnabledInterrupts */
|
||||
#define HvCall_MaskIPI 0x00000001
|
||||
#define HvCall_MaskLpEvent 0x00000002
|
||||
#define HvCall_MaskLpProd 0x00000004
|
||||
#define HvCall_MaskTimeout 0x00000008
|
||||
|
||||
/* Log buffer formats */
|
||||
#define HvCall_LogBuffer_ASCII 0
|
||||
#define HvCall_LogBuffer_EBCDIC 1
|
||||
|
||||
#define HvCallBaseAckDeferredInts HvCallBase + 0
|
||||
#define HvCallBaseCpmPowerOff HvCallBase + 1
|
||||
#define HvCallBaseGetHwPatch HvCallBase + 2
|
||||
#define HvCallBaseReIplSpAttn HvCallBase + 3
|
||||
#define HvCallBaseSetASR HvCallBase + 4
|
||||
#define HvCallBaseSetASRAndRfi HvCallBase + 5
|
||||
#define HvCallBaseSetIMR HvCallBase + 6
|
||||
#define HvCallBaseSendIPI HvCallBase + 7
|
||||
#define HvCallBaseTerminateMachine HvCallBase + 8
|
||||
#define HvCallBaseTerminateMachineSrc HvCallBase + 9
|
||||
#define HvCallBaseProcessPlicInterrupts HvCallBase + 10
|
||||
#define HvCallBaseIsPrimaryCpmOrMsdIpl HvCallBase + 11
|
||||
#define HvCallBaseSetVirtualSIT HvCallBase + 12
|
||||
#define HvCallBaseVaryOffThisProcessor HvCallBase + 13
|
||||
#define HvCallBaseVaryOffMemoryChunk HvCallBase + 14
|
||||
#define HvCallBaseVaryOffInteractivePercentage HvCallBase + 15
|
||||
#define HvCallBaseSendLpProd HvCallBase + 16
|
||||
#define HvCallBaseSetEnabledInterrupts HvCallBase + 17
|
||||
#define HvCallBaseYieldProcessor HvCallBase + 18
|
||||
#define HvCallBaseVaryOffSharedProcUnits HvCallBase + 19
|
||||
#define HvCallBaseSetVirtualDecr HvCallBase + 20
|
||||
#define HvCallBaseClearLogBuffer HvCallBase + 21
|
||||
#define HvCallBaseGetLogBufferCodePage HvCallBase + 22
|
||||
#define HvCallBaseGetLogBufferFormat HvCallBase + 23
|
||||
#define HvCallBaseGetLogBufferLength HvCallBase + 24
|
||||
#define HvCallBaseReadLogBuffer HvCallBase + 25
|
||||
#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26
|
||||
#define HvCallBaseWriteLogBuffer HvCallBase + 27
|
||||
#define HvCallBaseRouter28 HvCallBase + 28
|
||||
#define HvCallBaseRouter29 HvCallBase + 29
|
||||
#define HvCallBaseRouter30 HvCallBase + 30
|
||||
#define HvCallBaseSetDebugBus HvCallBase + 31
|
||||
|
||||
#define HvCallCcSetDABR HvCallCc + 7
|
||||
|
||||
static inline void HvCall_setVirtualDecr(void)
|
||||
{
|
||||
/*
|
||||
* Ignore any error return codes - most likely means that the
|
||||
* target value for the LP has been increased and this vary off
|
||||
* would bring us below the new target.
|
||||
*/
|
||||
HvCall0(HvCallBaseSetVirtualDecr);
|
||||
}
|
||||
|
||||
static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
|
||||
{
|
||||
HvCall2(HvCallBaseYieldProcessor, typeOfYield, yieldParm);
|
||||
}
|
||||
|
||||
static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
|
||||
{
|
||||
HvCall1(HvCallBaseSetEnabledInterrupts, enabledInterrupts);
|
||||
}
|
||||
|
||||
static inline void HvCall_setLogBufferFormatAndCodepage(int format,
|
||||
u32 codePage)
|
||||
{
|
||||
HvCall2(HvCallBaseSetLogBufferFormatAndCodePage, format, codePage);
|
||||
}
|
||||
|
||||
extern void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
|
||||
|
||||
static inline void HvCall_sendIPI(struct paca_struct *targetPaca)
|
||||
{
|
||||
HvCall1(HvCallBaseSendIPI, targetPaca->paca_index);
|
||||
}
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_CALL_H */
|
||||
@ -1,201 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* This file contains the "hypervisor call" interface which is used to
|
||||
* drive the hypervisor from the OS.
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
#include <asm/iseries/hv_call_sc.h>
|
||||
#include <asm/iseries/hv_types.h>
|
||||
#include <asm/abs_addr.h>
|
||||
|
||||
struct HvLpEvent;
|
||||
|
||||
typedef u8 HvLpEvent_Type;
|
||||
typedef u8 HvLpEvent_AckInd;
|
||||
typedef u8 HvLpEvent_AckType;
|
||||
|
||||
typedef u8 HvLpDma_Direction;
|
||||
typedef u8 HvLpDma_AddressType;
|
||||
|
||||
typedef u64 HvLpEvent_Rc;
|
||||
typedef u64 HvLpDma_Rc;
|
||||
|
||||
#define HvCallEventAckLpEvent HvCallEvent + 0
|
||||
#define HvCallEventCancelLpEvent HvCallEvent + 1
|
||||
#define HvCallEventCloseLpEventPath HvCallEvent + 2
|
||||
#define HvCallEventDmaBufList HvCallEvent + 3
|
||||
#define HvCallEventDmaSingle HvCallEvent + 4
|
||||
#define HvCallEventDmaToSp HvCallEvent + 5
|
||||
#define HvCallEventGetOverflowLpEvents HvCallEvent + 6
|
||||
#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7
|
||||
#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8
|
||||
#define HvCallEventOpenLpEventPath HvCallEvent + 9
|
||||
#define HvCallEventSetLpEventStack HvCallEvent + 10
|
||||
#define HvCallEventSignalLpEvent HvCallEvent + 11
|
||||
#define HvCallEventSignalLpEventParms HvCallEvent + 12
|
||||
#define HvCallEventSetInterLpQueueIndex HvCallEvent + 13
|
||||
#define HvCallEventSetLpEventQueueInterruptProc HvCallEvent + 14
|
||||
#define HvCallEventRouter15 HvCallEvent + 15
|
||||
|
||||
static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex)
|
||||
{
|
||||
HvCall1(HvCallEventGetOverflowLpEvents, queueIndex);
|
||||
}
|
||||
|
||||
static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex)
|
||||
{
|
||||
HvCall1(HvCallEventSetInterLpQueueIndex, queueIndex);
|
||||
}
|
||||
|
||||
static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
|
||||
char *eventStackAddr, u32 eventStackSize)
|
||||
{
|
||||
HvCall3(HvCallEventSetLpEventStack, queueIndex,
|
||||
virt_to_abs(eventStackAddr), eventStackSize);
|
||||
}
|
||||
|
||||
static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
|
||||
u16 lpLogicalProcIndex)
|
||||
{
|
||||
HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex,
|
||||
lpLogicalProcIndex);
|
||||
}
|
||||
|
||||
static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event)
|
||||
{
|
||||
return HvCall1(HvCallEventSignalLpEvent, virt_to_abs(event));
|
||||
}
|
||||
|
||||
static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
|
||||
HvLpEvent_Type type, u16 subtype, HvLpEvent_AckInd ackInd,
|
||||
HvLpEvent_AckType ackType, HvLpInstanceId sourceInstanceId,
|
||||
HvLpInstanceId targetInstanceId, u64 correlationToken,
|
||||
u64 eventData1, u64 eventData2, u64 eventData3,
|
||||
u64 eventData4, u64 eventData5)
|
||||
{
|
||||
/* Pack the misc bits into a single Dword to pass to PLIC */
|
||||
union {
|
||||
struct {
|
||||
u8 ack_and_target;
|
||||
u8 type;
|
||||
u16 subtype;
|
||||
HvLpInstanceId src_inst;
|
||||
HvLpInstanceId target_inst;
|
||||
} parms;
|
||||
u64 dword;
|
||||
} packed;
|
||||
|
||||
packed.parms.ack_and_target = (ackType << 7) | (ackInd << 6) | targetLp;
|
||||
packed.parms.type = type;
|
||||
packed.parms.subtype = subtype;
|
||||
packed.parms.src_inst = sourceInstanceId;
|
||||
packed.parms.target_inst = targetInstanceId;
|
||||
|
||||
return HvCall7(HvCallEventSignalLpEventParms, packed.dword,
|
||||
correlationToken, eventData1, eventData2,
|
||||
eventData3, eventData4, eventData5);
|
||||
}
|
||||
|
||||
extern void *iseries_hv_alloc(size_t size, dma_addr_t *dma_handle, gfp_t flag);
|
||||
extern void iseries_hv_free(size_t size, void *vaddr, dma_addr_t dma_handle);
|
||||
extern dma_addr_t iseries_hv_map(void *vaddr, size_t size,
|
||||
enum dma_data_direction direction);
|
||||
extern void iseries_hv_unmap(dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction);
|
||||
|
||||
static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event)
|
||||
{
|
||||
return HvCall1(HvCallEventAckLpEvent, virt_to_abs(event));
|
||||
}
|
||||
|
||||
static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event)
|
||||
{
|
||||
return HvCall1(HvCallEventCancelLpEvent, virt_to_abs(event));
|
||||
}
|
||||
|
||||
static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId(
|
||||
HvLpIndex targetLp, HvLpEvent_Type type)
|
||||
{
|
||||
return HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
|
||||
}
|
||||
|
||||
static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId(
|
||||
HvLpIndex targetLp, HvLpEvent_Type type)
|
||||
{
|
||||
return HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
|
||||
}
|
||||
|
||||
static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp,
|
||||
HvLpEvent_Type type)
|
||||
{
|
||||
HvCall2(HvCallEventOpenLpEventPath, targetLp, type);
|
||||
}
|
||||
|
||||
static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp,
|
||||
HvLpEvent_Type type)
|
||||
{
|
||||
HvCall2(HvCallEventCloseLpEventPath, targetLp, type);
|
||||
}
|
||||
|
||||
static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
|
||||
HvLpIndex remoteLp, HvLpDma_Direction direction,
|
||||
HvLpInstanceId localInstanceId,
|
||||
HvLpInstanceId remoteInstanceId,
|
||||
HvLpDma_AddressType localAddressType,
|
||||
HvLpDma_AddressType remoteAddressType,
|
||||
/* Do these need to be converted to absolute addresses? */
|
||||
u64 localBufList, u64 remoteBufList, u32 transferLength)
|
||||
{
|
||||
/* Pack the misc bits into a single Dword to pass to PLIC */
|
||||
union {
|
||||
struct {
|
||||
u8 flags;
|
||||
HvLpIndex remote;
|
||||
u8 type;
|
||||
u8 reserved;
|
||||
HvLpInstanceId local_inst;
|
||||
HvLpInstanceId remote_inst;
|
||||
} parms;
|
||||
u64 dword;
|
||||
} packed;
|
||||
|
||||
packed.parms.flags = (direction << 7) |
|
||||
(localAddressType << 6) | (remoteAddressType << 5);
|
||||
packed.parms.remote = remoteLp;
|
||||
packed.parms.type = type;
|
||||
packed.parms.reserved = 0;
|
||||
packed.parms.local_inst = localInstanceId;
|
||||
packed.parms.remote_inst = remoteInstanceId;
|
||||
|
||||
return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList,
|
||||
remoteBufList, transferLength);
|
||||
}
|
||||
|
||||
static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
|
||||
u32 length, HvLpDma_Direction dir)
|
||||
{
|
||||
return HvCall4(HvCallEventDmaToSp, virt_to_abs(local), remote,
|
||||
length, dir);
|
||||
}
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H */
|
||||
@ -1,50 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_CALL_SC_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_CALL_SC_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define HvCallBase 0x8000000000000000ul
|
||||
#define HvCallCc 0x8001000000000000ul
|
||||
#define HvCallCfg 0x8002000000000000ul
|
||||
#define HvCallEvent 0x8003000000000000ul
|
||||
#define HvCallHpt 0x8004000000000000ul
|
||||
#define HvCallPci 0x8005000000000000ul
|
||||
#define HvCallSm 0x8007000000000000ul
|
||||
#define HvCallXm 0x8009000000000000ul
|
||||
|
||||
extern u64 HvCall0(u64);
|
||||
extern u64 HvCall1(u64, u64);
|
||||
extern u64 HvCall2(u64, u64, u64);
|
||||
extern u64 HvCall3(u64, u64, u64, u64);
|
||||
extern u64 HvCall4(u64, u64, u64, u64, u64);
|
||||
extern u64 HvCall5(u64, u64, u64, u64, u64, u64);
|
||||
extern u64 HvCall6(u64, u64, u64, u64, u64, u64, u64);
|
||||
extern u64 HvCall7(u64, u64, u64, u64, u64, u64, u64, u64);
|
||||
|
||||
extern u64 HvCall0Ret16(u64, void *);
|
||||
extern u64 HvCall1Ret16(u64, void *, u64);
|
||||
extern u64 HvCall2Ret16(u64, void *, u64, u64);
|
||||
extern u64 HvCall3Ret16(u64, void *, u64, u64, u64);
|
||||
extern u64 HvCall4Ret16(u64, void *, u64, u64, u64, u64);
|
||||
extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64);
|
||||
extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64);
|
||||
extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64);
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_CALL_SC_H */
|
||||
@ -1,61 +0,0 @@
|
||||
/*
|
||||
* This file contains the "hypervisor call" interface which is used to
|
||||
* drive the hypervisor from SLIC.
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_CALL_XM_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_CALL_XM_H
|
||||
|
||||
#include <asm/iseries/hv_call_sc.h>
|
||||
#include <asm/iseries/hv_types.h>
|
||||
|
||||
#define HvCallXmGetTceTableParms HvCallXm + 0
|
||||
#define HvCallXmTestBus HvCallXm + 1
|
||||
#define HvCallXmConnectBusUnit HvCallXm + 2
|
||||
#define HvCallXmLoadTod HvCallXm + 8
|
||||
#define HvCallXmTestBusUnit HvCallXm + 9
|
||||
#define HvCallXmSetTce HvCallXm + 11
|
||||
#define HvCallXmSetTces HvCallXm + 13
|
||||
|
||||
static inline void HvCallXm_getTceTableParms(u64 cb)
|
||||
{
|
||||
HvCall1(HvCallXmGetTceTableParms, cb);
|
||||
}
|
||||
|
||||
static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce)
|
||||
{
|
||||
return HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce);
|
||||
}
|
||||
|
||||
static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset,
|
||||
u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
|
||||
{
|
||||
return HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
|
||||
tce1, tce2, tce3, tce4);
|
||||
}
|
||||
|
||||
static inline u64 HvCallXm_testBus(u16 busNumber)
|
||||
{
|
||||
return HvCall1(HvCallXmTestBus, busNumber);
|
||||
}
|
||||
|
||||
static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber,
|
||||
u8 deviceId)
|
||||
{
|
||||
return HvCall2(HvCallXmTestBusUnit, busNumber,
|
||||
(subBusNumber << 8) | deviceId);
|
||||
}
|
||||
|
||||
static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber,
|
||||
u8 deviceId, u64 interruptToken)
|
||||
{
|
||||
return HvCall5(HvCallXmConnectBusUnit, busNumber,
|
||||
(subBusNumber << 8) | deviceId, interruptToken, 0,
|
||||
0 /* HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)) */);
|
||||
}
|
||||
|
||||
static inline u64 HvCallXm_loadTod(void)
|
||||
{
|
||||
return HvCall0(HvCallXmLoadTod);
|
||||
}
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_CALL_XM_H */
|
||||
@ -1,128 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H
|
||||
|
||||
/*
|
||||
* This file contains the interface to the LPAR configuration data
|
||||
* to determine which resources should be allocated to each partition.
|
||||
*/
|
||||
|
||||
#include <asm/iseries/hv_call_sc.h>
|
||||
#include <asm/iseries/hv_types.h>
|
||||
|
||||
enum {
|
||||
HvCallCfg_Cur = 0,
|
||||
HvCallCfg_Init = 1,
|
||||
HvCallCfg_Max = 2,
|
||||
HvCallCfg_Min = 3
|
||||
};
|
||||
|
||||
#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
|
||||
#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
|
||||
#define HvCallCfgGetMsChunks HvCallCfg + 9
|
||||
#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
|
||||
#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
|
||||
#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
|
||||
#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
|
||||
#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
|
||||
|
||||
extern HvLpIndex HvLpConfig_getLpIndex_outline(void);
|
||||
extern HvLpIndex HvLpConfig_getLpIndex(void);
|
||||
extern HvLpIndex HvLpConfig_getPrimaryLpIndex(void);
|
||||
|
||||
static inline u64 HvLpConfig_getMsChunks(void)
|
||||
{
|
||||
return HvCall2(HvCallCfgGetMsChunks, HvLpConfig_getLpIndex(),
|
||||
HvCallCfg_Cur);
|
||||
}
|
||||
|
||||
static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
|
||||
{
|
||||
return HvCall0(HvCallCfgGetSystemPhysicalProcessors);
|
||||
}
|
||||
|
||||
static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
|
||||
{
|
||||
return (u16)HvCall1(HvCallCfgGetNumProcsInSharedPool, sPI);
|
||||
}
|
||||
|
||||
static inline u64 HvLpConfig_getPhysicalProcessors(void)
|
||||
{
|
||||
return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
|
||||
HvCallCfg_Cur);
|
||||
}
|
||||
|
||||
static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
|
||||
{
|
||||
return HvCall1(HvCallCfgGetSharedPoolIndex, HvLpConfig_getLpIndex());
|
||||
}
|
||||
|
||||
static inline u64 HvLpConfig_getSharedProcUnits(void)
|
||||
{
|
||||
return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
|
||||
HvCallCfg_Cur);
|
||||
}
|
||||
|
||||
static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
|
||||
{
|
||||
return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
|
||||
HvCallCfg_Max);
|
||||
}
|
||||
|
||||
static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
|
||||
{
|
||||
return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
|
||||
HvCallCfg_Max);
|
||||
}
|
||||
|
||||
static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(
|
||||
HvLpIndex lp)
|
||||
{
|
||||
/*
|
||||
* This is a new function in V5R1 so calls to this on older
|
||||
* hypervisors will return -1
|
||||
*/
|
||||
u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
|
||||
if (retVal == -1)
|
||||
retVal = 0;
|
||||
return retVal;
|
||||
}
|
||||
|
||||
static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void)
|
||||
{
|
||||
return HvLpConfig_getVirtualLanIndexMapForLp(
|
||||
HvLpConfig_getLpIndex_outline());
|
||||
}
|
||||
|
||||
static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1,
|
||||
HvLpIndex lp2)
|
||||
{
|
||||
HvLpVirtualLanIndexMap virtualLanIndexMap1 =
|
||||
HvLpConfig_getVirtualLanIndexMapForLp(lp1);
|
||||
HvLpVirtualLanIndexMap virtualLanIndexMap2 =
|
||||
HvLpConfig_getVirtualLanIndexMapForLp(lp2);
|
||||
return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0);
|
||||
}
|
||||
|
||||
static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
|
||||
{
|
||||
return HvCall1(HvCallCfgGetHostingLpIndex, lp);
|
||||
}
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H */
|
||||
@ -1,162 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* This file contains the class for HV events in the system. */
|
||||
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_LP_EVENT_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_LP_EVENT_H
|
||||
|
||||
#include <asm/types.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/iseries/hv_types.h>
|
||||
#include <asm/iseries/hv_call_event.h>
|
||||
|
||||
/*
|
||||
* HvLpEvent is the structure for Lp Event messages passed between
|
||||
* partitions through PLIC.
|
||||
*/
|
||||
|
||||
struct HvLpEvent {
|
||||
u8 flags; /* Event flags x00-x00 */
|
||||
u8 xType; /* Type of message x01-x01 */
|
||||
u16 xSubtype; /* Subtype for event x02-x03 */
|
||||
u8 xSourceLp; /* Source LP x04-x04 */
|
||||
u8 xTargetLp; /* Target LP x05-x05 */
|
||||
u8 xSizeMinus1; /* Size of Derived class - 1 x06-x06 */
|
||||
u8 xRc; /* RC for Ack flows x07-x07 */
|
||||
u16 xSourceInstanceId; /* Source sides instance id x08-x09 */
|
||||
u16 xTargetInstanceId; /* Target sides instance id x0A-x0B */
|
||||
union {
|
||||
u32 xSubtypeData; /* Data usable by the subtype x0C-x0F */
|
||||
u16 xSubtypeDataShort[2]; /* Data as 2 shorts */
|
||||
u8 xSubtypeDataChar[4]; /* Data as 4 chars */
|
||||
} x;
|
||||
|
||||
u64 xCorrelationToken; /* Unique value for source/type x10-x17 */
|
||||
};
|
||||
|
||||
typedef void (*LpEventHandler)(struct HvLpEvent *);
|
||||
|
||||
/* Register a handler for an event type - returns 0 on success */
|
||||
extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType,
|
||||
LpEventHandler hdlr);
|
||||
|
||||
/*
|
||||
* Unregister a handler for an event type
|
||||
*
|
||||
* This call will sleep until the handler being removed is guaranteed to
|
||||
* be no longer executing on any CPU. Do not call with locks held.
|
||||
*
|
||||
* returns 0 on success
|
||||
* Unregister will fail if there are any paths open for the type
|
||||
*/
|
||||
extern int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType);
|
||||
|
||||
/*
|
||||
* Open an Lp Event Path for an event type
|
||||
* returns 0 on success
|
||||
* openPath will fail if there is no handler registered for the event type.
|
||||
* The lpIndex specified is the partition index for the target partition
|
||||
* (for VirtualIo, VirtualLan and SessionMgr) other types specify zero)
|
||||
*/
|
||||
extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
|
||||
|
||||
/*
|
||||
* Close an Lp Event Path for a type and partition
|
||||
* returns 0 on success
|
||||
*/
|
||||
extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
|
||||
|
||||
#define HvLpEvent_Type_Hypervisor 0
|
||||
#define HvLpEvent_Type_MachineFac 1
|
||||
#define HvLpEvent_Type_SessionMgr 2
|
||||
#define HvLpEvent_Type_SpdIo 3
|
||||
#define HvLpEvent_Type_VirtualBus 4
|
||||
#define HvLpEvent_Type_PciIo 5
|
||||
#define HvLpEvent_Type_RioIo 6
|
||||
#define HvLpEvent_Type_VirtualLan 7
|
||||
#define HvLpEvent_Type_VirtualIo 8
|
||||
#define HvLpEvent_Type_NumTypes 9
|
||||
|
||||
#define HvLpEvent_Rc_Good 0
|
||||
#define HvLpEvent_Rc_BufferNotAvailable 1
|
||||
#define HvLpEvent_Rc_Cancelled 2
|
||||
#define HvLpEvent_Rc_GenericError 3
|
||||
#define HvLpEvent_Rc_InvalidAddress 4
|
||||
#define HvLpEvent_Rc_InvalidPartition 5
|
||||
#define HvLpEvent_Rc_InvalidSize 6
|
||||
#define HvLpEvent_Rc_InvalidSubtype 7
|
||||
#define HvLpEvent_Rc_InvalidSubtypeData 8
|
||||
#define HvLpEvent_Rc_InvalidType 9
|
||||
#define HvLpEvent_Rc_PartitionDead 10
|
||||
#define HvLpEvent_Rc_PathClosed 11
|
||||
#define HvLpEvent_Rc_SubtypeError 12
|
||||
|
||||
#define HvLpEvent_Function_Ack 0
|
||||
#define HvLpEvent_Function_Int 1
|
||||
|
||||
#define HvLpEvent_AckInd_NoAck 0
|
||||
#define HvLpEvent_AckInd_DoAck 1
|
||||
|
||||
#define HvLpEvent_AckType_ImmediateAck 0
|
||||
#define HvLpEvent_AckType_DeferredAck 1
|
||||
|
||||
#define HV_LP_EVENT_INT 0x01
|
||||
#define HV_LP_EVENT_DO_ACK 0x02
|
||||
#define HV_LP_EVENT_DEFERRED_ACK 0x04
|
||||
#define HV_LP_EVENT_VALID 0x80
|
||||
|
||||
#define HvLpDma_Direction_LocalToRemote 0
|
||||
#define HvLpDma_Direction_RemoteToLocal 1
|
||||
|
||||
#define HvLpDma_AddressType_TceIndex 0
|
||||
#define HvLpDma_AddressType_RealAddress 1
|
||||
|
||||
#define HvLpDma_Rc_Good 0
|
||||
#define HvLpDma_Rc_Error 1
|
||||
#define HvLpDma_Rc_PartitionDead 2
|
||||
#define HvLpDma_Rc_PathClosed 3
|
||||
#define HvLpDma_Rc_InvalidAddress 4
|
||||
#define HvLpDma_Rc_InvalidLength 5
|
||||
|
||||
static inline int hvlpevent_is_valid(struct HvLpEvent *h)
|
||||
{
|
||||
return h->flags & HV_LP_EVENT_VALID;
|
||||
}
|
||||
|
||||
static inline void hvlpevent_invalidate(struct HvLpEvent *h)
|
||||
{
|
||||
h->flags &= ~ HV_LP_EVENT_VALID;
|
||||
}
|
||||
|
||||
static inline int hvlpevent_is_int(struct HvLpEvent *h)
|
||||
{
|
||||
return h->flags & HV_LP_EVENT_INT;
|
||||
}
|
||||
|
||||
static inline int hvlpevent_is_ack(struct HvLpEvent *h)
|
||||
{
|
||||
return !hvlpevent_is_int(h);
|
||||
}
|
||||
|
||||
static inline int hvlpevent_need_ack(struct HvLpEvent *h)
|
||||
{
|
||||
return h->flags & HV_LP_EVENT_DO_ACK;
|
||||
}
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_LP_EVENT_H */
|
||||
@ -1,112 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_HV_TYPES_H
|
||||
#define _ASM_POWERPC_ISERIES_HV_TYPES_H
|
||||
|
||||
/*
|
||||
* General typedefs for the hypervisor.
|
||||
*/
|
||||
|
||||
#include <asm/types.h>
|
||||
|
||||
typedef u8 HvLpIndex;
|
||||
typedef u16 HvLpInstanceId;
|
||||
typedef u64 HvLpTOD;
|
||||
typedef u64 HvLpSystemSerialNum;
|
||||
typedef u8 HvLpDeviceSerialNum[12];
|
||||
typedef u16 HvLpSanHwSet;
|
||||
typedef u16 HvLpBus;
|
||||
typedef u16 HvLpBoard;
|
||||
typedef u16 HvLpCard;
|
||||
typedef u8 HvLpDeviceType[4];
|
||||
typedef u8 HvLpDeviceModel[3];
|
||||
typedef u64 HvIoToken;
|
||||
typedef u8 HvLpName[8];
|
||||
typedef u32 HvIoId;
|
||||
typedef u64 HvRealMemoryIndex;
|
||||
typedef u32 HvLpIndexMap; /* Must hold HVMAXARCHITECTEDLPS bits!!! */
|
||||
typedef u16 HvLpVrmIndex;
|
||||
typedef u32 HvXmGenerationId;
|
||||
typedef u8 HvLpBusPool;
|
||||
typedef u8 HvLpSharedPoolIndex;
|
||||
typedef u16 HvLpSharedProcUnitsX100;
|
||||
typedef u8 HvLpVirtualLanIndex;
|
||||
typedef u16 HvLpVirtualLanIndexMap; /* Must hold HVMAXARCHITECTEDVIRTUALLANS bits!!! */
|
||||
typedef u16 HvBusNumber; /* Hypervisor Bus Number */
|
||||
typedef u8 HvSubBusNumber; /* Hypervisor SubBus Number */
|
||||
typedef u8 HvAgentId; /* Hypervisor DevFn */
|
||||
|
||||
|
||||
#define HVMAXARCHITECTEDLPS 32
|
||||
#define HVMAXARCHITECTEDVIRTUALLANS 16
|
||||
#define HVMAXARCHITECTEDVIRTUALDISKS 32
|
||||
#define HVMAXARCHITECTEDVIRTUALCDROMS 8
|
||||
#define HVMAXARCHITECTEDVIRTUALTAPES 8
|
||||
#define HVCHUNKSIZE (256 * 1024)
|
||||
#define HVPAGESIZE (4 * 1024)
|
||||
#define HVLPMINMEGSPRIMARY 256
|
||||
#define HVLPMINMEGSSECONDARY 64
|
||||
#define HVCHUNKSPERMEG 4
|
||||
#define HVPAGESPERMEG 256
|
||||
#define HVPAGESPERCHUNK 64
|
||||
|
||||
#define HvLpIndexInvalid ((HvLpIndex)0xff)
|
||||
|
||||
/*
|
||||
* Enums for the sub-components under PLIC
|
||||
* Used in HvCall and HvPrimaryCall
|
||||
*/
|
||||
enum {
|
||||
HvCallCompId = 0,
|
||||
HvCallCpuCtlsCompId = 1,
|
||||
HvCallCfgCompId = 2,
|
||||
HvCallEventCompId = 3,
|
||||
HvCallHptCompId = 4,
|
||||
HvCallPciCompId = 5,
|
||||
HvCallSlmCompId = 6,
|
||||
HvCallSmCompId = 7,
|
||||
HvCallSpdCompId = 8,
|
||||
HvCallXmCompId = 9,
|
||||
HvCallRioCompId = 10,
|
||||
HvCallRsvd3CompId = 11,
|
||||
HvCallRsvd2CompId = 12,
|
||||
HvCallRsvd1CompId = 13,
|
||||
HvCallMaxCompId = 14,
|
||||
HvPrimaryCallCompId = 0,
|
||||
HvPrimaryCallCfgCompId = 1,
|
||||
HvPrimaryCallPciCompId = 2,
|
||||
HvPrimaryCallSmCompId = 3,
|
||||
HvPrimaryCallSpdCompId = 4,
|
||||
HvPrimaryCallXmCompId = 5,
|
||||
HvPrimaryCallRioCompId = 6,
|
||||
HvPrimaryCallRsvd7CompId = 7,
|
||||
HvPrimaryCallRsvd6CompId = 8,
|
||||
HvPrimaryCallRsvd5CompId = 9,
|
||||
HvPrimaryCallRsvd4CompId = 10,
|
||||
HvPrimaryCallRsvd3CompId = 11,
|
||||
HvPrimaryCallRsvd2CompId = 12,
|
||||
HvPrimaryCallRsvd1CompId = 13,
|
||||
HvPrimaryCallMaxCompId = HvCallMaxCompId
|
||||
};
|
||||
|
||||
struct HvLpBufferList {
|
||||
u64 addr;
|
||||
u64 len;
|
||||
};
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_HV_TYPES_H */
|
||||
@ -1,37 +0,0 @@
|
||||
#ifndef _ASM_POWERPC_ISERIES_IOMMU_H
|
||||
#define _ASM_POWERPC_ISERIES_IOMMU_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 2005 Stephen Rothwell, IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the:
|
||||
* Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330,
|
||||
* Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
struct pci_dev;
|
||||
struct vio_dev;
|
||||
struct device_node;
|
||||
struct iommu_table;
|
||||
|
||||
/* Get table parameters from HV */
|
||||
extern void iommu_table_getparms_iSeries(unsigned long busno,
|
||||
unsigned char slotno, unsigned char virtbus,
|
||||
struct iommu_table *tbl);
|
||||
|
||||
extern struct iommu_table *vio_build_iommu_table_iseries(struct vio_dev *dev);
|
||||
extern void iommu_vio_init(void);
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_IOMMU_H */
|
||||
@ -1,78 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H
|
||||
#define _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H
|
||||
|
||||
/*
|
||||
* This control block defines the simple LP queue structure that is
|
||||
* shared between the hypervisor (PLIC) and the OS in order to send
|
||||
* events to an LP.
|
||||
*/
|
||||
|
||||
#include <asm/types.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#define IT_LP_MAX_QUEUES 8
|
||||
|
||||
#define IT_LP_NOT_USED 0 /* Queue will not be used by PLIC */
|
||||
#define IT_LP_DEDICATED_IO 1 /* Queue dedicated to IO processor specified */
|
||||
#define IT_LP_DEDICATED_LP 2 /* Queue dedicated to LP specified */
|
||||
#define IT_LP_SHARED 3 /* Queue shared for both IO and LP */
|
||||
|
||||
#define IT_LP_EVENT_STACK_SIZE 4096
|
||||
#define IT_LP_EVENT_MAX_SIZE 256
|
||||
#define IT_LP_EVENT_ALIGN 64
|
||||
|
||||
struct hvlpevent_queue {
|
||||
/*
|
||||
* The hq_current_event is the pointer to the next event stack entry
|
||||
* that will become valid. The OS must peek at this entry to determine
|
||||
* if it is valid. PLIC will set the valid indicator as the very last
|
||||
* store into that entry.
|
||||
*
|
||||
* When the OS has completed processing of the event then it will mark
|
||||
* the event as invalid so that PLIC knows it can store into that event
|
||||
* location again.
|
||||
*
|
||||
* If the event stack fills and there are overflow events, then PLIC
|
||||
* will set the hq_overflow_pending flag in which case the OS will
|
||||
* have to fetch the additional LP events once they have drained the
|
||||
* event stack.
|
||||
*
|
||||
* The first 16-bytes are known by both the OS and PLIC. The remainder
|
||||
* of the cache line is for use by the OS.
|
||||
*/
|
||||
u8 hq_overflow_pending; /* 0x00 Overflow events are pending */
|
||||
u8 hq_status; /* 0x01 DedicatedIo or DedicatedLp or NotUsed */
|
||||
u16 hq_proc_index; /* 0x02 Logical Proc Index for correlation */
|
||||
u8 hq_reserved1[12]; /* 0x04 */
|
||||
char *hq_current_event; /* 0x10 */
|
||||
char *hq_last_event; /* 0x18 */
|
||||
char *hq_event_stack; /* 0x20 */
|
||||
u8 hq_index; /* 0x28 unique sequential index. */
|
||||
u8 hq_reserved2[3]; /* 0x29-2b */
|
||||
spinlock_t hq_lock;
|
||||
};
|
||||
|
||||
extern struct hvlpevent_queue hvlpevent_queue;
|
||||
|
||||
extern int hvlpevent_is_pending(void);
|
||||
extern void process_hvlpevents(void);
|
||||
extern void setup_hvlpevent_queue(void);
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H */
|
||||
@ -1,85 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_LPAR_MAP_H
|
||||
#define _ASM_POWERPC_ISERIES_LPAR_MAP_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <asm/types.h>
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The iSeries hypervisor will set up mapping for one or more
|
||||
* ESID/VSID pairs (in SLB/segment registers) and will set up
|
||||
* mappings of one or more ranges of pages to VAs.
|
||||
* We will have the hypervisor set up the ESID->VSID mapping
|
||||
* for the four kernel segments (C-F). With shared processors,
|
||||
* the hypervisor will clear all segment registers and reload
|
||||
* these four whenever the processor is switched from one
|
||||
* partition to another.
|
||||
*/
|
||||
|
||||
/* The Vsid and Esid identified below will be used by the hypervisor
|
||||
* to set up a memory mapping for part of the load area before giving
|
||||
* control to the Linux kernel. The load area is 64 MB, but this must
|
||||
* not attempt to map the whole load area. The Hashed Page Table may
|
||||
* need to be located within the load area (if the total partition size
|
||||
* is 64 MB), but cannot be mapped. Typically, this should specify
|
||||
* to map half (32 MB) of the load area.
|
||||
*
|
||||
* The hypervisor will set up page table entries for the number of
|
||||
* pages specified.
|
||||
*
|
||||
* In 32-bit mode, the hypervisor will load all four of the
|
||||
* segment registers (identified by the low-order four bits of the
|
||||
* Esid field. In 64-bit mode, the hypervisor will load one SLB
|
||||
* entry to map the Esid to the Vsid.
|
||||
*/
|
||||
|
||||
#define HvEsidsToMap 2
|
||||
#define HvRangesToMap 1
|
||||
|
||||
/* Hypervisor initially maps 32MB of the load area */
|
||||
#define HvPagesToMap 8192
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
struct LparMap {
|
||||
u64 xNumberEsids; // Number of ESID/VSID pairs
|
||||
u64 xNumberRanges; // Number of VA ranges to map
|
||||
u64 xSegmentTableOffs; // Page number within load area of seg table
|
||||
u64 xRsvd[5];
|
||||
struct {
|
||||
u64 xKernelEsid; // Esid used to map kernel load
|
||||
u64 xKernelVsid; // Vsid used to map kernel load
|
||||
} xEsids[HvEsidsToMap];
|
||||
struct {
|
||||
u64 xPages; // Number of pages to be mapped
|
||||
u64 xOffset; // Offset from start of load area
|
||||
u64 xVPN; // Virtual Page Number
|
||||
} xRanges[HvRangesToMap];
|
||||
};
|
||||
|
||||
extern const struct LparMap xLparMap;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/* the fixed address where the LparMap exists */
|
||||
#define LPARMAP_PHYS 0x7000
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_LPAR_MAP_H */
|
||||
@ -1,51 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001 Troy D. Armstrong IBM Corporation
|
||||
* Copyright (C) 2004 Stephen Rothwell IBM Corporation
|
||||
*
|
||||
* This modules exists as an interface between a Linux secondary partition
|
||||
* running on an iSeries and the primary partition's Virtual Service
|
||||
* Processor (VSP) object. The VSP has final authority over powering on/off
|
||||
* all partitions in the iSeries. It also provides miscellaneous low-level
|
||||
* machine facility type operations.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_MF_H
|
||||
#define _ASM_POWERPC_ISERIES_MF_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/iseries/hv_types.h>
|
||||
#include <asm/iseries/hv_call_event.h>
|
||||
|
||||
struct rtc_time;
|
||||
|
||||
typedef void (*MFCompleteHandler)(void *clientToken, int returnCode);
|
||||
|
||||
extern void mf_allocate_lp_events(HvLpIndex targetLp, HvLpEvent_Type type,
|
||||
unsigned size, unsigned amount, MFCompleteHandler hdlr,
|
||||
void *userToken);
|
||||
extern void mf_deallocate_lp_events(HvLpIndex targetLp, HvLpEvent_Type type,
|
||||
unsigned count, MFCompleteHandler hdlr, void *userToken);
|
||||
|
||||
extern void mf_power_off(void);
|
||||
extern void mf_reboot(char *cmd);
|
||||
|
||||
extern void mf_display_src(u32 word);
|
||||
extern void mf_display_progress(u16 value);
|
||||
|
||||
extern void mf_init(void);
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_MF_H */
|
||||
@ -1,265 +0,0 @@
|
||||
/* -*- linux-c -*-
|
||||
*
|
||||
* iSeries Virtual I/O Message Path header
|
||||
*
|
||||
* Authors: Dave Boutcher <boutcher@us.ibm.com>
|
||||
* Ryan Arnold <ryanarn@us.ibm.com>
|
||||
* Colin Devilbiss <devilbis@us.ibm.com>
|
||||
*
|
||||
* (C) Copyright 2000 IBM Corporation
|
||||
*
|
||||
* This header file is used by the iSeries virtual I/O device
|
||||
* drivers. It defines the interfaces to the common functions
|
||||
* (implemented in drivers/char/viopath.h) as well as defining
|
||||
* common functions and structures. Currently (at the time I
|
||||
* wrote this comment) the iSeries virtual I/O device drivers
|
||||
* that use this are
|
||||
* drivers/block/viodasd.c
|
||||
* drivers/char/viocons.c
|
||||
* drivers/char/viotape.c
|
||||
* drivers/cdrom/viocd.c
|
||||
*
|
||||
* The iSeries virtual ethernet support (veth.c) uses a whole
|
||||
* different set of functions.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) anyu later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software Foundation,
|
||||
* Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_ISERIES_VIO_H
|
||||
#define _ASM_POWERPC_ISERIES_VIO_H
|
||||
|
||||
#include <asm/iseries/hv_types.h>
|
||||
#include <asm/iseries/hv_lp_event.h>
|
||||
|
||||
/*
|
||||
* iSeries virtual I/O events use the subtype field in
|
||||
* HvLpEvent to figure out what kind of vio event is coming
|
||||
* in. We use a table to route these, and this defines
|
||||
* the maximum number of distinct subtypes
|
||||
*/
|
||||
#define VIO_MAX_SUBTYPES 8
|
||||
|
||||
#define VIOMAXBLOCKDMA 12
|
||||
|
||||
struct open_data {
|
||||
u64 disk_size;
|
||||
u16 max_disk;
|
||||
u16 cylinders;
|
||||
u16 tracks;
|
||||
u16 sectors;
|
||||
u16 bytes_per_sector;
|
||||
};
|
||||
|
||||
struct rw_data {
|
||||
u64 offset;
|
||||
struct {
|
||||
u32 token;
|
||||
u32 reserved;
|
||||
u64 len;
|
||||
} dma_info[VIOMAXBLOCKDMA];
|
||||
};
|
||||
|
||||
struct vioblocklpevent {
|
||||
struct HvLpEvent event;
|
||||
u32 reserved;
|
||||
u16 version;
|
||||
u16 sub_result;
|
||||
u16 disk;
|
||||
u16 flags;
|
||||
union {
|
||||
struct open_data open_data;
|
||||
struct rw_data rw_data;
|
||||
u64 changed;
|
||||
} u;
|
||||
};
|
||||
|
||||
#define vioblockflags_ro 0x0001
|
||||
|
||||
enum vioblocksubtype {
|
||||
vioblockopen = 0x0001,
|
||||
vioblockclose = 0x0002,
|
||||
vioblockread = 0x0003,
|
||||
vioblockwrite = 0x0004,
|
||||
vioblockflush = 0x0005,
|
||||
vioblockcheck = 0x0007
|
||||
};
|
||||
|
||||
struct viocdlpevent {
|
||||
struct HvLpEvent event;
|
||||
u32 reserved;
|
||||
u16 version;
|
||||
u16 sub_result;
|
||||
u16 disk;
|
||||
u16 flags;
|
||||
u32 token;
|
||||
u64 offset; /* On open, max number of disks */
|
||||
u64 len; /* On open, size of the disk */
|
||||
u32 block_size; /* Only set on open */
|
||||
u32 media_size; /* Only set on open */
|
||||
};
|
||||
|
||||
enum viocdsubtype {
|
||||
viocdopen = 0x0001,
|
||||
viocdclose = 0x0002,
|
||||
viocdread = 0x0003,
|
||||
viocdwrite = 0x0004,
|
||||
viocdlockdoor = 0x0005,
|
||||
viocdgetinfo = 0x0006,
|
||||
viocdcheck = 0x0007
|
||||
};
|
||||
|
||||
struct viotapelpevent {
|
||||
struct HvLpEvent event;
|
||||
u32 reserved;
|
||||
u16 version;
|
||||
u16 sub_type_result;
|
||||
u16 tape;
|
||||
u16 flags;
|
||||
u32 token;
|
||||
u64 len;
|
||||
union {
|
||||
struct {
|
||||
u32 tape_op;
|
||||
u32 count;
|
||||
} op;
|
||||
struct {
|
||||
u32 type;
|
||||
u32 resid;
|
||||
u32 dsreg;
|
||||
u32 gstat;
|
||||
u32 erreg;
|
||||
u32 file_no;
|
||||
u32 block_no;
|
||||
} get_status;
|
||||
struct {
|
||||
u32 block_no;
|
||||
} get_pos;
|
||||
} u;
|
||||
};
|
||||
|
||||
enum viotapesubtype {
|
||||
viotapeopen = 0x0001,
|
||||
viotapeclose = 0x0002,
|
||||
viotaperead = 0x0003,
|
||||
viotapewrite = 0x0004,
|
||||
viotapegetinfo = 0x0005,
|
||||
viotapeop = 0x0006,
|
||||
viotapegetpos = 0x0007,
|
||||
viotapesetpos = 0x0008,
|
||||
viotapegetstatus = 0x0009
|
||||
};
|
||||
|
||||
/*
|
||||
* Each subtype can register a handler to process their events.
|
||||
* The handler must have this interface.
|
||||
*/
|
||||
typedef void (vio_event_handler_t) (struct HvLpEvent * event);
|
||||
|
||||
extern int viopath_open(HvLpIndex remoteLp, int subtype, int numReq);
|
||||
extern int viopath_close(HvLpIndex remoteLp, int subtype, int numReq);
|
||||
extern int vio_setHandler(int subtype, vio_event_handler_t * beh);
|
||||
extern int vio_clearHandler(int subtype);
|
||||
extern int viopath_isactive(HvLpIndex lp);
|
||||
extern HvLpInstanceId viopath_sourceinst(HvLpIndex lp);
|
||||
extern HvLpInstanceId viopath_targetinst(HvLpIndex lp);
|
||||
extern void vio_set_hostlp(void);
|
||||
extern void *vio_get_event_buffer(int subtype);
|
||||
extern void vio_free_event_buffer(int subtype, void *buffer);
|
||||
|
||||
extern struct vio_dev *vio_create_viodasd(u32 unit);
|
||||
|
||||
extern HvLpIndex viopath_hostLp;
|
||||
extern HvLpIndex viopath_ourLp;
|
||||
|
||||
#define VIOCHAR_MAX_DATA 200
|
||||
|
||||
#define VIOMAJOR_SUBTYPE_MASK 0xff00
|
||||
#define VIOMINOR_SUBTYPE_MASK 0x00ff
|
||||
#define VIOMAJOR_SUBTYPE_SHIFT 8
|
||||
|
||||
#define VIOVERSION 0x0101
|
||||
|
||||
/*
|
||||
* This is the general structure for VIO errors; each module should have
|
||||
* a table of them, and each table should be terminated by an entry of
|
||||
* { 0, 0, NULL }. Then, to find a specific error message, a module
|
||||
* should pass its local table and the return code.
|
||||
*/
|
||||
struct vio_error_entry {
|
||||
u16 rc;
|
||||
int errno;
|
||||
const char *msg;
|
||||
};
|
||||
extern const struct vio_error_entry *vio_lookup_rc(
|
||||
const struct vio_error_entry *local_table, u16 rc);
|
||||
|
||||
enum viosubtypes {
|
||||
viomajorsubtype_monitor = 0x0100,
|
||||
viomajorsubtype_blockio = 0x0200,
|
||||
viomajorsubtype_chario = 0x0300,
|
||||
viomajorsubtype_config = 0x0400,
|
||||
viomajorsubtype_cdio = 0x0500,
|
||||
viomajorsubtype_tape = 0x0600,
|
||||
viomajorsubtype_scsi = 0x0700
|
||||
};
|
||||
|
||||
enum vioconfigsubtype {
|
||||
vioconfigget = 0x0001,
|
||||
};
|
||||
|
||||
enum viorc {
|
||||
viorc_good = 0x0000,
|
||||
viorc_noConnection = 0x0001,
|
||||
viorc_noReceiver = 0x0002,
|
||||
viorc_noBufferAvailable = 0x0003,
|
||||
viorc_invalidMessageType = 0x0004,
|
||||
viorc_invalidRange = 0x0201,
|
||||
viorc_invalidToken = 0x0202,
|
||||
viorc_DMAError = 0x0203,
|
||||
viorc_useError = 0x0204,
|
||||
viorc_releaseError = 0x0205,
|
||||
viorc_invalidDisk = 0x0206,
|
||||
viorc_openRejected = 0x0301
|
||||
};
|
||||
|
||||
/*
|
||||
* The structure of the events that flow between us and OS/400 for chario
|
||||
* events. You can't mess with this unless the OS/400 side changes too.
|
||||
*/
|
||||
struct viocharlpevent {
|
||||
struct HvLpEvent event;
|
||||
u32 reserved;
|
||||
u16 version;
|
||||
u16 subtype_result_code;
|
||||
u8 virtual_device;
|
||||
u8 len;
|
||||
u8 data[VIOCHAR_MAX_DATA];
|
||||
};
|
||||
|
||||
#define VIOCHAR_WINDOW 10
|
||||
|
||||
enum viocharsubtype {
|
||||
viocharopen = 0x0001,
|
||||
viocharclose = 0x0002,
|
||||
viochardata = 0x0003,
|
||||
viocharack = 0x0004,
|
||||
viocharconfig = 0x0005
|
||||
};
|
||||
|
||||
enum viochar_rc {
|
||||
viochar_rc_ebusy = 1
|
||||
};
|
||||
|
||||
#endif /* _ASM_POWERPC_ISERIES_VIO_H */
|
||||
@ -41,15 +41,7 @@
|
||||
* We only have to have statically allocated lppaca structs on
|
||||
* legacy iSeries, which supports at most 64 cpus.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
#if NR_CPUS < 64
|
||||
#define NR_LPPACAS NR_CPUS
|
||||
#else
|
||||
#define NR_LPPACAS 64
|
||||
#endif
|
||||
#else /* not iSeries */
|
||||
#define NR_LPPACAS 1
|
||||
#endif
|
||||
|
||||
|
||||
/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
|
||||
|
||||
@ -273,7 +273,6 @@ struct mpic
|
||||
unsigned int isu_size;
|
||||
unsigned int isu_shift;
|
||||
unsigned int isu_mask;
|
||||
unsigned int irq_count;
|
||||
/* Number of sources */
|
||||
unsigned int num_sources;
|
||||
/* default senses array */
|
||||
@ -349,8 +348,6 @@ struct mpic
|
||||
#define MPIC_U3_HT_IRQS 0x00000004
|
||||
/* Broken IPI registers (autodetected) */
|
||||
#define MPIC_BROKEN_IPI 0x00000008
|
||||
/* MPIC wants a reset */
|
||||
#define MPIC_WANTS_RESET 0x00000010
|
||||
/* Spurious vector requires EOI */
|
||||
#define MPIC_SPV_EOI 0x00000020
|
||||
/* No passthrough disable */
|
||||
@ -363,15 +360,11 @@ struct mpic
|
||||
#define MPIC_ENABLE_MCK 0x00000200
|
||||
/* Disable bias among target selection, spread interrupts evenly */
|
||||
#define MPIC_NO_BIAS 0x00000400
|
||||
/* Ignore NIRQS as reported by FRR */
|
||||
#define MPIC_BROKEN_FRR_NIRQS 0x00000800
|
||||
/* Destination only supports a single CPU at a time */
|
||||
#define MPIC_SINGLE_DEST_CPU 0x00001000
|
||||
/* Enable CoreInt delivery of interrupts */
|
||||
#define MPIC_ENABLE_COREINT 0x00002000
|
||||
/* Disable resetting of the MPIC.
|
||||
* NOTE: This flag trumps MPIC_WANTS_RESET.
|
||||
*/
|
||||
/* Do not reset the MPIC during initialization */
|
||||
#define MPIC_NO_RESET 0x00004000
|
||||
/* Freescale MPIC (compatible includes "fsl,mpic") */
|
||||
#define MPIC_FSL 0x00008000
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user