liquidio CN23XX: device states
Cleaned up resource leaks during destroy resources by introducing more device states. Signed-off-by: Raghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com> Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com> Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com> Signed-off-by: Felix Manlunas <felix.manlunas@caviumnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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86dea55b9a
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515e752d2b
@ -770,6 +770,7 @@ static void delete_glists(struct lio *lio)
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}
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kfree((void *)lio->glist);
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kfree((void *)lio->glist_lock);
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}
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/**
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@ -1329,6 +1330,7 @@ liquidio_probe(struct pci_dev *pdev,
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complete(&first_stage);
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if (octeon_device_init(oct_dev)) {
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complete(&hs->init);
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liquidio_remove(pdev);
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return -ENOMEM;
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}
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@ -1353,7 +1355,15 @@ liquidio_probe(struct pci_dev *pdev,
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oct_dev->watchdog_task = kthread_create(
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liquidio_watchdog, oct_dev,
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"liowd/%02hhx:%02hhx.%hhx", bus, device, function);
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wake_up_process(oct_dev->watchdog_task);
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if (!IS_ERR(oct_dev->watchdog_task)) {
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wake_up_process(oct_dev->watchdog_task);
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} else {
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oct_dev->watchdog_task = NULL;
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dev_err(&oct_dev->pci_dev->dev,
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"failed to create kernel_thread\n");
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liquidio_remove(pdev);
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return -1;
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}
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}
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}
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@ -1417,6 +1427,8 @@ static void octeon_destroy_resources(struct octeon_device *oct)
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if (lio_wait_for_oq_pkts(oct))
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dev_err(&oct->pci_dev->dev, "OQ had pending packets\n");
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/* fallthrough */
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case OCT_DEV_INTR_SET_DONE:
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/* Disable interrupts */
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oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
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@ -1443,6 +1455,8 @@ static void octeon_destroy_resources(struct octeon_device *oct)
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pci_disable_msi(oct->pci_dev);
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}
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/* fallthrough */
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case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
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if (OCTEON_CN23XX_PF(oct))
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octeon_free_ioq_vector(oct);
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@ -1508,10 +1522,13 @@ static void octeon_destroy_resources(struct octeon_device *oct)
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octeon_unmap_pci_barx(oct, 1);
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/* fallthrough */
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case OCT_DEV_BEGIN_STATE:
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case OCT_DEV_PCI_ENABLE_DONE:
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pci_clear_master(oct->pci_dev);
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/* Disable the device, releasing the PCI INT */
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pci_disable_device(oct->pci_dev);
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/* fallthrough */
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case OCT_DEV_BEGIN_STATE:
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/* Nothing to be done here either */
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break;
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} /* end switch (oct->status) */
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@ -1781,6 +1798,7 @@ static int octeon_pci_os_setup(struct octeon_device *oct)
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if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) {
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dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n");
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pci_disable_device(oct->pci_dev);
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return 1;
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}
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@ -4434,6 +4452,8 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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if (octeon_pci_os_setup(octeon_dev))
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return 1;
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atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE);
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/* Identify the Octeon type and map the BAR address space. */
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if (octeon_chip_specific_setup(octeon_dev)) {
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dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n");
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@ -4505,9 +4525,6 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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if (octeon_setup_instr_queues(octeon_dev)) {
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dev_err(&octeon_dev->pci_dev->dev,
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"instruction queue initialization failed\n");
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/* On error, release any previously allocated queues */
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for (j = 0; j < octeon_dev->num_iqs; j++)
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octeon_delete_instr_queue(octeon_dev, j);
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return 1;
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}
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atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE);
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@ -4523,9 +4540,6 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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if (octeon_setup_output_queues(octeon_dev)) {
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dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n");
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/* Release any previously allocated queues */
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for (j = 0; j < octeon_dev->num_oqs; j++)
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octeon_delete_droq(octeon_dev, j);
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return 1;
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}
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@ -4542,6 +4556,7 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n");
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return 1;
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}
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atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE);
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} else {
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/* The input and output queue registers were setup earlier (the
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@ -4569,6 +4584,8 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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/* Enable Octeon device interrupts */
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octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR);
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atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE);
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/* Enable the input and output queues for this Octeon device */
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ret = octeon_dev->fn_list.enable_io_queues(octeon_dev);
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if (ret) {
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@ -822,6 +822,7 @@ int octeon_setup_instr_queues(struct octeon_device *oct)
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if (octeon_init_instr_queue(oct, txpciq, num_descs)) {
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/* prevent memory leak */
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vfree(oct->instr_queue[0]);
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oct->instr_queue[0] = NULL;
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return 1;
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}
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@ -854,8 +855,11 @@ int octeon_setup_output_queues(struct octeon_device *oct)
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if (!oct->droq[0])
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return 1;
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if (octeon_init_droq(oct, oq_no, num_descs, desc_size, NULL))
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if (octeon_init_droq(oct, oq_no, num_descs, desc_size, NULL)) {
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vfree(oct->droq[oq_no]);
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oct->droq[oq_no] = NULL;
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return 1;
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}
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oct->num_oqs++;
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return 0;
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@ -72,20 +72,23 @@ enum octeon_pci_swap_mode {
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* as it is initialized.
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*/
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#define OCT_DEV_BEGIN_STATE 0x0
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#define OCT_DEV_PCI_MAP_DONE 0x1
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#define OCT_DEV_DISPATCH_INIT_DONE 0x2
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#define OCT_DEV_INSTR_QUEUE_INIT_DONE 0x3
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#define OCT_DEV_SC_BUFF_POOL_INIT_DONE 0x4
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#define OCT_DEV_RESP_LIST_INIT_DONE 0x5
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#define OCT_DEV_DROQ_INIT_DONE 0x6
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#define OCT_DEV_PCI_ENABLE_DONE 0x1
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#define OCT_DEV_PCI_MAP_DONE 0x2
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#define OCT_DEV_DISPATCH_INIT_DONE 0x3
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#define OCT_DEV_INSTR_QUEUE_INIT_DONE 0x4
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#define OCT_DEV_SC_BUFF_POOL_INIT_DONE 0x5
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#define OCT_DEV_RESP_LIST_INIT_DONE 0x6
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#define OCT_DEV_DROQ_INIT_DONE 0x7
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#define OCT_DEV_MBOX_SETUP_DONE 0x8
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#define OCT_DEV_IO_QUEUES_DONE 0x9
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#define OCT_DEV_CONSOLE_INIT_DONE 0xa
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#define OCT_DEV_HOST_OK 0xb
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#define OCT_DEV_CORE_OK 0xc
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#define OCT_DEV_RUNNING 0xd
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#define OCT_DEV_IN_RESET 0xe
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#define OCT_DEV_STATE_INVALID 0xf
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#define OCT_DEV_MSIX_ALLOC_VECTOR_DONE 0x9
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#define OCT_DEV_INTR_SET_DONE 0xa
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#define OCT_DEV_IO_QUEUES_DONE 0xb
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#define OCT_DEV_CONSOLE_INIT_DONE 0xc
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#define OCT_DEV_HOST_OK 0xd
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#define OCT_DEV_CORE_OK 0xe
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#define OCT_DEV_RUNNING 0xf
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#define OCT_DEV_IN_RESET 0x10
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#define OCT_DEV_STATE_INVALID 0x11
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#define OCT_DEV_STATES OCT_DEV_STATE_INVALID
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@ -988,7 +988,8 @@ int octeon_create_droq(struct octeon_device *oct,
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if (!droq)
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droq = vmalloc(sizeof(*droq));
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if (!droq)
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goto create_droq_fail;
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return -1;
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memset(droq, 0, sizeof(struct octeon_droq));
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/*Disable the pkt o/p for this Q */
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@ -996,7 +997,11 @@ int octeon_create_droq(struct octeon_device *oct,
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oct->droq[q_no] = droq;
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/* Initialize the Droq */
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octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx);
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if (octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx)) {
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vfree(oct->droq[q_no]);
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oct->droq[q_no] = NULL;
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return -1;
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}
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oct->num_oqs++;
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@ -1009,8 +1014,4 @@ int octeon_create_droq(struct octeon_device *oct,
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* the same time.
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*/
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return 0;
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create_droq_fail:
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octeon_delete_droq(oct, q_no);
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return -ENOMEM;
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}
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@ -116,7 +116,7 @@ static inline int octeon_map_pci_barx(struct octeon_device *oct,
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mapped_len = oct->mmio[baridx].len;
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if (!mapped_len)
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return 1;
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goto err_release_region;
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if (max_map_len && (mapped_len > max_map_len))
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mapped_len = max_map_len;
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@ -132,11 +132,15 @@ static inline int octeon_map_pci_barx(struct octeon_device *oct,
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if (!oct->mmio[baridx].hw_addr) {
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dev_err(&oct->pci_dev->dev, "error ioremap for bar %d\n",
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baridx);
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return 1;
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goto err_release_region;
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}
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oct->mmio[baridx].done = 1;
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return 0;
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err_release_region:
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pci_release_region(oct->pci_dev, baridx * 2);
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return 1;
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}
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static inline void *
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@ -157,6 +157,8 @@ int octeon_init_instr_queue(struct octeon_device *oct,
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WQ_MEM_RECLAIM,
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0);
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if (!oct->check_db_wq[iq_no].wq) {
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vfree(iq->request_list);
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iq->request_list = NULL;
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lio_dma_free(oct, q_size, iq->base_addr, iq->base_addr_dma);
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dev_err(&oct->pci_dev->dev, "check db wq create failed for iq %d\n",
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iq_no);
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@ -749,8 +751,10 @@ int octeon_setup_sc_buffer_pool(struct octeon_device *oct)
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lio_dma_alloc(oct,
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SOFT_COMMAND_BUFFER_SIZE,
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(dma_addr_t *)&dma_addr);
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if (!sc)
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if (!sc) {
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octeon_free_sc_buffer_pool(oct);
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return 1;
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}
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sc->dma_addr = dma_addr;
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sc->size = SOFT_COMMAND_BUFFER_SIZE;
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