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drm/amdgpu: fix VM PD addr shift

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The block size only affects the leave nodes, everything else is fixed.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2017-11-27 14:01:51 +01:00 committed by Alex Deucher
parent 722570435b
commit 507831473f
1 changed files with 23 additions and 5 deletions
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28
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
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@ -138,6 +138,24 @@ struct amdgpu_prt_cb {
struct dma_fence_cb cb; struct dma_fence_cb cb;
}; };
/**
* amdgpu_vm_level_shift - return the addr shift for each level
*
* @adev: amdgpu_device pointer
*
* Returns the number of bits the pfn needs to be right shifted for a level.
*/
static unsigned amdgpu_vm_level_shift(struct amdgpu_device *adev,
unsigned level)
{
if (level != adev->vm_manager.num_level)
return 9 * (adev->vm_manager.num_level - level - 1) +
adev->vm_manager.block_size;
else
/* For the page tables on the leaves */
return 0;
}
/** /**
* amdgpu_vm_num_entries - return the number of entries in a PD/PT * amdgpu_vm_num_entries - return the number of entries in a PD/PT
* *
@ -288,8 +306,7 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
uint64_t saddr, uint64_t eaddr, uint64_t saddr, uint64_t eaddr,
unsigned level) unsigned level)
{ {
unsigned shift = (adev->vm_manager.num_level - level) * unsigned shift = amdgpu_vm_level_shift(adev, level);
adev->vm_manager.block_size;
unsigned pt_idx, from, to; unsigned pt_idx, from, to;
int r; int r;
u64 flags; u64 flags;
@ -1302,18 +1319,19 @@ void amdgpu_vm_get_entry(struct amdgpu_pte_update_params *p, uint64_t addr,
struct amdgpu_vm_pt **entry, struct amdgpu_vm_pt **entry,
struct amdgpu_vm_pt **parent) struct amdgpu_vm_pt **parent)
{ {
unsigned idx, level = p->adev->vm_manager.num_level; unsigned level = 0;
*parent = NULL; *parent = NULL;
*entry = &p->vm->root; *entry = &p->vm->root;
while ((*entry)->entries) { while ((*entry)->entries) {
idx = addr >> (p->adev->vm_manager.block_size * level--); unsigned idx = addr >> amdgpu_vm_level_shift(p->adev, level++);
idx %= amdgpu_bo_size((*entry)->base.bo) / 8; idx %= amdgpu_bo_size((*entry)->base.bo) / 8;
*parent = *entry; *parent = *entry;
*entry = &(*entry)->entries[idx]; *entry = &(*entry)->entries[idx];
} }
if (level) if (level != p->adev->vm_manager.num_level)
*entry = NULL; *entry = NULL;
} }