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mfd: Set asic3 DS1WM clock_rate

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The mfd/asic3 driver does not set the ds1wm_driver_data clock_rate field
before passing the structure to the DS1WM w1 busmaster driver.
This was not noticed before commit 26a6afb, because ds1wm_find_divisor()
unintentionally returned the correct divisor when a zero clock_rate was
passed in. However after that commit DS1WM fails a zero clock_rate:

ds1wm ds1wm: no suitable divisor for 0Hz clock

This patch sets the ds1wm_driver_data clock_rate field.

Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Paul Parsons 2012-04-09 13:18:31 +01:00 committed by Samuel Ortiz
parent e1277f45d8
commit 4f304245bb
2 changed files with 8 additions and 3 deletions
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9
drivers/mfd/asic3.c
View File

@ -894,10 +894,13 @@ static int __init asic3_mfd_probe(struct platform_device *pdev,
asic3_mmc_resources[0].start >>= asic->bus_shift; asic3_mmc_resources[0].start >>= asic->bus_shift;
asic3_mmc_resources[0].end >>= asic->bus_shift; asic3_mmc_resources[0].end >>= asic->bus_shift;
ret = mfd_add_devices(&pdev->dev, pdev->id, if (pdata->clock_rate) {
ds1wm_pdata.clock_rate = pdata->clock_rate;
ret = mfd_add_devices(&pdev->dev, pdev->id,
&asic3_cell_ds1wm, 1, mem, asic->irq_base); &asic3_cell_ds1wm, 1, mem, asic->irq_base);
if (ret < 0) if (ret < 0)
goto out; goto out;
}
if (mem_sdio && (irq >= 0)) { if (mem_sdio && (irq >= 0)) {
ret = mfd_add_devices(&pdev->dev, pdev->id, ret = mfd_add_devices(&pdev->dev, pdev->id,

2
include/linux/mfd/asic3.h
View File

@ -31,6 +31,8 @@ struct asic3_platform_data {
unsigned int gpio_base; unsigned int gpio_base;
unsigned int clock_rate;
struct asic3_led *leds; struct asic3_led *leds;
}; };