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drm/amdgpu: fix incorrect use of amdgpu_irq_add_id in si_dma.c

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Adding a second irq source because of a different src_id is actually a
bug.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2018-09-26 16:15:44 +02:00 committed by Alex Deucher
parent 2ccecaf661
commit 4eb10b5be7
2 changed files with 8 additions and 23 deletions
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4
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
View File

@ -46,10 +46,6 @@ struct amdgpu_sdma_instance {
struct amdgpu_sdma { struct amdgpu_sdma {
struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES]; struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES];
#ifdef CONFIG_DRM_AMDGPU_SI
//SI DMA has a difference trap irq number for the second engine
struct amdgpu_irq_src trap_irq_1;
#endif
struct amdgpu_irq_src trap_irq; struct amdgpu_irq_src trap_irq;
struct amdgpu_irq_src illegal_inst_irq; struct amdgpu_irq_src illegal_inst_irq;
int num_instances; int num_instances;

27
drivers/gpu/drm/amd/amdgpu/si_dma.c
View File

@ -502,12 +502,14 @@ static int si_dma_sw_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
/* DMA0 trap event */ /* DMA0 trap event */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224, &adev->sdma.trap_irq); r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224,
&adev->sdma.trap_irq);
if (r) if (r)
return r; return r;
/* DMA1 trap event */ /* DMA1 trap event */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 244, &adev->sdma.trap_irq_1); r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 244,
&adev->sdma.trap_irq);
if (r) if (r)
return r; return r;
@ -649,17 +651,10 @@ static int si_dma_process_trap_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source, struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) struct amdgpu_iv_entry *entry)
{ {
amdgpu_fence_process(&adev->sdma.instance[0].ring); if (entry->src_id == 224)
amdgpu_fence_process(&adev->sdma.instance[0].ring);
return 0; else
} amdgpu_fence_process(&adev->sdma.instance[1].ring);
static int si_dma_process_trap_irq_1(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
amdgpu_fence_process(&adev->sdma.instance[1].ring);
return 0; return 0;
} }
@ -786,11 +781,6 @@ static const struct amdgpu_irq_src_funcs si_dma_trap_irq_funcs = {
.process = si_dma_process_trap_irq, .process = si_dma_process_trap_irq,
}; };
static const struct amdgpu_irq_src_funcs si_dma_trap_irq_funcs_1 = {
.set = si_dma_set_trap_irq_state,
.process = si_dma_process_trap_irq_1,
};
static const struct amdgpu_irq_src_funcs si_dma_illegal_inst_irq_funcs = { static const struct amdgpu_irq_src_funcs si_dma_illegal_inst_irq_funcs = {
.process = si_dma_process_illegal_inst_irq, .process = si_dma_process_illegal_inst_irq,
}; };
@ -799,7 +789,6 @@ static void si_dma_set_irq_funcs(struct amdgpu_device *adev)
{ {
adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
adev->sdma.trap_irq.funcs = &si_dma_trap_irq_funcs; adev->sdma.trap_irq.funcs = &si_dma_trap_irq_funcs;
adev->sdma.trap_irq_1.funcs = &si_dma_trap_irq_funcs_1;
adev->sdma.illegal_inst_irq.funcs = &si_dma_illegal_inst_irq_funcs; adev->sdma.illegal_inst_irq.funcs = &si_dma_illegal_inst_irq_funcs;
} }