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drm/i915: set conservative clock gating values on VLV v2

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We'll re-enable select bits as needed after testing and power measurement.

v2: split out wake handling bits (Jani)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Jesse Barnes 2013-03-08 10:45:54 -08:00 committed by Daniel Vetter
parent d3bc03030a
commit 4e8c84a5b1
1 changed files with 10 additions and 1 deletions
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11
drivers/gpu/drm/i915/intel_pm.c
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@ -3987,7 +3987,16 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
* Disable clock gating on th GCFG unit to prevent a delay
* in the reporting of vblank events.
*/
I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
I915_WRITE(VLV_GUNIT_CLOCK_GATE, 0xffffffff);
/* Conservative clock gating settings for now */
I915_WRITE(0x9400, 0xffffffff);
I915_WRITE(0x9404, 0xffffffff);
I915_WRITE(0x9408, 0xffffffff);
I915_WRITE(0x940c, 0xffffffff);
I915_WRITE(0x9410, 0xffffffff);
I915_WRITE(0x9414, 0xffffffff);
I915_WRITE(0x9418, 0xffffffff);
}
static void g4x_init_clock_gating(struct drm_device *dev)