forked from Minki/linux
ARM: OMAP: Make plat/fpga.h local to arch/arm/plat-omap
There's no need to have this file in plat/fpga.h. We can make it local to plat-omap replacing fpga_read/write functions directly with readb/writeb as that's how they are already defined in fpga.h. Note that 2420 based H4 is also using the fpga, so let's keep the led support around in plat-omap until we flip over mach-omap2 to device tree. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: linux-fbdev@vger.kernel.org Cc: Felipe Balbi <balbi@ti.com> Cc: linux-usb@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren
parent
6832c95599
commit
4c98dc6b8e
@ -30,7 +30,7 @@
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#include <plat/tc.h>
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#include <mach/mux.h>
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#include <mach/flash.h>
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#include <plat/fpga.h>
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#include <../plat-omap/fpga.h>
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#include <linux/platform_data/keypad-omap.h>
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#include <mach/hardware.h>
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@ -123,9 +123,9 @@ static struct resource smc91x_resources[] = {
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static void __init fsample_init_smc91x(void)
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{
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fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
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__raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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__raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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}
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@ -33,7 +33,7 @@
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#include <mach/mux.h>
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#include <mach/flash.h>
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#include <plat/fpga.h>
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#include <../plat-omap/fpga.h>
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#include <plat/tc.h>
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#include <linux/platform_data/keypad-omap.h>
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@ -215,7 +215,7 @@ static struct platform_device *innovator1510_devices[] __initdata = {
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static int innovator_get_pendown_state(void)
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{
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return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
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return !(__raw_readb(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
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}
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static const struct ads7846_platform_data innovator1510_ts_info = {
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@ -279,7 +279,7 @@ static struct platform_device *innovator1610_devices[] __initdata = {
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static void __init innovator_init_smc91x(void)
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{
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if (cpu_is_omap1510()) {
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fpga_write(fpga_read(OMAP1510_FPGA_RST) & ~1,
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__raw_writeb(__raw_readb(OMAP1510_FPGA_RST) & ~1,
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OMAP1510_FPGA_RST);
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udelay(750);
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} else {
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@ -335,10 +335,10 @@ static int mmc_set_power(struct device *dev, int slot, int power_on,
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int vdd)
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{
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if (power_on)
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fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
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__raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) | (1 << 3),
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OMAP1510_FPGA_POWER);
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else
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fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
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__raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) & ~(1 << 3),
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OMAP1510_FPGA_POWER);
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return 0;
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@ -390,14 +390,14 @@ static void __init innovator_init(void)
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omap_cfg_reg(UART3_TX);
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omap_cfg_reg(UART3_RX);
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reg = fpga_read(OMAP1510_FPGA_POWER);
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reg = __raw_readb(OMAP1510_FPGA_POWER);
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reg |= OMAP1510_FPGA_PCR_COM1_EN;
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fpga_write(reg, OMAP1510_FPGA_POWER);
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__raw_writeb(reg, OMAP1510_FPGA_POWER);
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udelay(10);
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reg = fpga_read(OMAP1510_FPGA_POWER);
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reg = __raw_readb(OMAP1510_FPGA_POWER);
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reg |= OMAP1510_FPGA_PCR_COM2_EN;
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fpga_write(reg, OMAP1510_FPGA_POWER);
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__raw_writeb(reg, OMAP1510_FPGA_POWER);
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udelay(10);
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platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
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@ -437,6 +437,7 @@ static void __init innovator_init(void)
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*/
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static void __init innovator_map_io(void)
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{
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#ifdef CONFIG_ARCH_OMAP15XX
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omap15xx_map_io();
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iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc));
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@ -444,9 +445,10 @@ static void __init innovator_map_io(void)
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/* Dump the Innovator FPGA rev early - useful info for support. */
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pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n",
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fpga_read(OMAP1510_FPGA_REV_HIGH),
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fpga_read(OMAP1510_FPGA_REV_LOW),
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fpga_read(OMAP1510_FPGA_BOARD_REV));
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__raw_readb(OMAP1510_FPGA_REV_HIGH),
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__raw_readb(OMAP1510_FPGA_REV_LOW),
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__raw_readb(OMAP1510_FPGA_BOARD_REV));
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#endif
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}
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MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
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@ -30,7 +30,7 @@
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#include <plat/tc.h>
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#include <mach/mux.h>
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#include <plat/fpga.h>
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#include <../plat-omap/fpga.h>
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#include <mach/flash.h>
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#include <mach/hardware.h>
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@ -231,9 +231,9 @@ static struct omap_lcd_config perseus2_lcd_config __initdata = {
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static void __init perseus2_init_smc91x(void)
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{
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fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
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__raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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__raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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}
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@ -38,6 +38,7 @@ static inline void omap7xx_map_io(void)
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#endif
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#ifdef CONFIG_ARCH_OMAP15XX
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void omap1510_fpga_init_irq(void);
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void omap15xx_map_io(void);
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#else
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static inline void omap15xx_map_io(void)
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@ -27,7 +27,7 @@
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <plat/fpga.h>
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#include <../plat-omap/fpga.h>
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#include <mach/hardware.h>
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@ -45,5 +45,118 @@
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#define OMAP1510_DSP_MMU_BASE (0xfffed200)
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/*
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* ---------------------------------------------------------------------------
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* OMAP-1510 FPGA
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* ---------------------------------------------------------------------------
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*/
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#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
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#define OMAP1510_FPGA_SIZE SZ_4K
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#define OMAP1510_FPGA_START 0x08000000 /* PA */
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/* Revision */
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#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
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#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
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#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
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#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
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#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
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#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
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/* Interrupt status */
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#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
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#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
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/* Interrupt mask */
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#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
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#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
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/* Reset registers */
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#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
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#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
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#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
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#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
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#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
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#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
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#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
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#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
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#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
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#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
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#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
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#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
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#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
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#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
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#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
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#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
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#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
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#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
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#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
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#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
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#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
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#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
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#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
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#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
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#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
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/*
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* Power up Giga UART driver, turn on HID clock.
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* Turn off BT power, since we're not using it and it
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* draws power.
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*/
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#define OMAP1510_FPGA_RESET_VALUE 0x42
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#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7)
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#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6)
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#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5)
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#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4)
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#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3)
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#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2)
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#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1)
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#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0)
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/*
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* Innovator/OMAP1510 FPGA HID register bit definitions
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*/
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#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */
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#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */
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#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
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#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
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#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */
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#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
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#define OMAP1510_FPGA_HID_rsrvd (1<<6)
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#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
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/* The FPGA IRQ is cascaded through GPIO_13 */
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#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
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/* IRQ Numbers for interrupts muxed through the FPGA */
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#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
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#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
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#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
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#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
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#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
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#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
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#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
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#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
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#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
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#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
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#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
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#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
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#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
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#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
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#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
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#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
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#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
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#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
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#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
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#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
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#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
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#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
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#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
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#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
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#endif /* __ASM_ARCH_OMAP15XX_H */
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@ -23,7 +23,6 @@
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#include <asm/mach-types.h>
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#include <mach/mux.h>
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#include <plat/fpga.h>
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#include "pm.h"
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@ -20,7 +20,7 @@
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <plat/fpga.h>
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#include "fpga.h"
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/* Many OMAP development platforms reuse the same "debug board"; these
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* platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the
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74
arch/arm/plat-omap/fpga.h
Normal file
74
arch/arm/plat-omap/fpga.h
Normal file
@ -0,0 +1,74 @@
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/*
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* arch/arm/plat-omap/include/mach/fpga.h
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*
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* Interrupt handler for OMAP-1510 FPGA
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*
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* Copyright (C) 2001 RidgeRun, Inc.
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* Author: Greg Lonnon <glonnon@ridgerun.com>
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*
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* Copyright (C) 2002 MontaVista Software, Inc.
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*
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* Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
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* Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_OMAP_FPGA_H
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#define __ASM_ARCH_OMAP_FPGA_H
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/*
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* ---------------------------------------------------------------------------
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* H2/P2 Debug board FPGA
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* ---------------------------------------------------------------------------
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*/
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/* maps in the FPGA registers and the ETHR registers */
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#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
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#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
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#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
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#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
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#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
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#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
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#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
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#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
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#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
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#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
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#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
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/* NOTE: most boards don't have a static mapping for the FPGA ... */
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struct h2p2_dbg_fpga {
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/* offset 0x00 */
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u16 smc91x[8];
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/* offset 0x10 */
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u16 fpga_rev;
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u16 board_rev;
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u16 gpio_outputs;
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u16 leds;
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/* offset 0x18 */
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u16 misc_inputs;
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u16 lan_status;
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u16 lan_reset;
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u16 reserved0;
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/* offset 0x20 */
|
||||
u16 ps2_data;
|
||||
u16 ps2_ctrl;
|
||||
/* plus also 4 rs232 ports ... */
|
||||
};
|
||||
|
||||
/* LEDs definition on debug board (16 LEDs, all physically green) */
|
||||
#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
|
||||
#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
|
||||
#define H2P2_DBG_FPGA_LED_RED (1 << 13)
|
||||
#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
|
||||
/* cpu0 load-meter LEDs */
|
||||
#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
|
||||
#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
|
||||
#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
|
||||
|
||||
#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
|
||||
#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
|
||||
|
||||
#endif
|
||||
@ -1,193 +0,0 @@
|
||||
/*
|
||||
* arch/arm/plat-omap/include/mach/fpga.h
|
||||
*
|
||||
* Interrupt handler for OMAP-1510 FPGA
|
||||
*
|
||||
* Copyright (C) 2001 RidgeRun, Inc.
|
||||
* Author: Greg Lonnon <glonnon@ridgerun.com>
|
||||
*
|
||||
* Copyright (C) 2002 MontaVista Software, Inc.
|
||||
*
|
||||
* Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
|
||||
* Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_OMAP_FPGA_H
|
||||
#define __ASM_ARCH_OMAP_FPGA_H
|
||||
|
||||
extern void omap1510_fpga_init_irq(void);
|
||||
|
||||
#define fpga_read(reg) __raw_readb(reg)
|
||||
#define fpga_write(val, reg) __raw_writeb(val, reg)
|
||||
|
||||
/*
|
||||
* ---------------------------------------------------------------------------
|
||||
* H2/P2 Debug board FPGA
|
||||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
/* maps in the FPGA registers and the ETHR registers */
|
||||
#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
|
||||
#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
|
||||
#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
|
||||
|
||||
#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
|
||||
#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
|
||||
#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
|
||||
#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
|
||||
#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
|
||||
#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
|
||||
#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
|
||||
#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
|
||||
|
||||
/* NOTE: most boards don't have a static mapping for the FPGA ... */
|
||||
struct h2p2_dbg_fpga {
|
||||
/* offset 0x00 */
|
||||
u16 smc91x[8];
|
||||
/* offset 0x10 */
|
||||
u16 fpga_rev;
|
||||
u16 board_rev;
|
||||
u16 gpio_outputs;
|
||||
u16 leds;
|
||||
/* offset 0x18 */
|
||||
u16 misc_inputs;
|
||||
u16 lan_status;
|
||||
u16 lan_reset;
|
||||
u16 reserved0;
|
||||
/* offset 0x20 */
|
||||
u16 ps2_data;
|
||||
u16 ps2_ctrl;
|
||||
/* plus also 4 rs232 ports ... */
|
||||
};
|
||||
|
||||
/* LEDs definition on debug board (16 LEDs, all physically green) */
|
||||
#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
|
||||
#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
|
||||
#define H2P2_DBG_FPGA_LED_RED (1 << 13)
|
||||
#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
|
||||
/* cpu0 load-meter LEDs */
|
||||
#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
|
||||
#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
|
||||
#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
|
||||
|
||||
#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
|
||||
#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
|
||||
|
||||
/*
|
||||
* ---------------------------------------------------------------------------
|
||||
* OMAP-1510 FPGA
|
||||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
|
||||
#define OMAP1510_FPGA_SIZE SZ_4K
|
||||
#define OMAP1510_FPGA_START 0x08000000 /* PA */
|
||||
|
||||
/* Revision */
|
||||
#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
|
||||
#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
|
||||
|
||||
#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
|
||||
#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
|
||||
#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
|
||||
#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
|
||||
|
||||
/* Interrupt status */
|
||||
#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
|
||||
#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
|
||||
|
||||
/* Interrupt mask */
|
||||
#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
|
||||
#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
|
||||
|
||||
/* Reset registers */
|
||||
#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
|
||||
#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
|
||||
|
||||
#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
|
||||
#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
|
||||
#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
|
||||
#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
|
||||
#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
|
||||
#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
|
||||
#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
|
||||
#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
|
||||
#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
|
||||
#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
|
||||
|
||||
#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
|
||||
|
||||
#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
|
||||
#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
|
||||
#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
|
||||
#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
|
||||
#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
|
||||
#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
|
||||
#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
|
||||
#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
|
||||
#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
|
||||
#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
|
||||
#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
|
||||
|
||||
#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
|
||||
|
||||
/*
|
||||
* Power up Giga UART driver, turn on HID clock.
|
||||
* Turn off BT power, since we're not using it and it
|
||||
* draws power.
|
||||
*/
|
||||
#define OMAP1510_FPGA_RESET_VALUE 0x42
|
||||
|
||||
#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7)
|
||||
#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6)
|
||||
#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5)
|
||||
#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4)
|
||||
#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3)
|
||||
#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2)
|
||||
#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1)
|
||||
#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0)
|
||||
|
||||
/*
|
||||
* Innovator/OMAP1510 FPGA HID register bit definitions
|
||||
*/
|
||||
#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */
|
||||
#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */
|
||||
#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
|
||||
#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
|
||||
#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */
|
||||
#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
|
||||
#define OMAP1510_FPGA_HID_rsrvd (1<<6)
|
||||
#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
|
||||
|
||||
/* The FPGA IRQ is cascaded through GPIO_13 */
|
||||
#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
|
||||
|
||||
/* IRQ Numbers for interrupts muxed through the FPGA */
|
||||
#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
|
||||
#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
|
||||
#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
|
||||
#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
|
||||
#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
|
||||
#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
|
||||
#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
|
||||
#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
|
||||
#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
|
||||
#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
|
||||
#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
|
||||
#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
|
||||
#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
|
||||
#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
|
||||
#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
|
||||
#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
|
||||
#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
|
||||
#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
|
||||
#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
|
||||
#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
|
||||
#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
|
||||
#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
|
||||
#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
|
||||
#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
|
||||
|
||||
#endif
|
||||
@ -25,7 +25,6 @@
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <mach/mux.h>
|
||||
#include <plat/fpga.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/irqs.h>
|
||||
@ -93,14 +92,14 @@ static int omap_ohci_transceiver_power(int on)
|
||||
{
|
||||
if (on) {
|
||||
if (machine_is_omap_innovator() && cpu_is_omap1510())
|
||||
fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
|
||||
__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
|
||||
| ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
|
||||
INNOVATOR_FPGA_CAM_USB_CONTROL);
|
||||
else if (machine_is_omap_osk())
|
||||
tps65010_set_gpio_out_value(GPIO1, LOW);
|
||||
} else {
|
||||
if (machine_is_omap_innovator() && cpu_is_omap1510())
|
||||
fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
|
||||
__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
|
||||
& ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
|
||||
INNOVATOR_FPGA_CAM_USB_CONTROL);
|
||||
else if (machine_is_omap_osk())
|
||||
|
||||
@ -23,7 +23,8 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <plat/fpga.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "omapfb.h"
|
||||
|
||||
static int innovator1510_panel_init(struct lcd_panel *panel,
|
||||
@ -38,13 +39,13 @@ static void innovator1510_panel_cleanup(struct lcd_panel *panel)
|
||||
|
||||
static int innovator1510_panel_enable(struct lcd_panel *panel)
|
||||
{
|
||||
fpga_write(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL);
|
||||
__raw_writeb(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void innovator1510_panel_disable(struct lcd_panel *panel)
|
||||
{
|
||||
fpga_write(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL);
|
||||
__raw_writeb(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL);
|
||||
}
|
||||
|
||||
static unsigned long innovator1510_panel_get_caps(struct lcd_panel *panel)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user