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clk: exynos4: Add missing mout_mipihsi clock

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This patch adds missing output of mux MIPIHSI which is needed for
div_mipihsi clock.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Tomasz Figa 2013-04-04 13:32:43 +09:00 committed by Kukjin Kim
parent 74f7f8ba50
commit 4c3cc72cc7
1 changed files with 1 additions and 0 deletions
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drivers/clk/samsung/clk-exynos4.c
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@ -381,6 +381,7 @@ struct samsung_mux_clock exynos4x12_mux_clks[] __initdata = {
MUX(none, "mout_mmc2", group1_p4x12, SRC_FSYS, 8, 4),
MUX(none, "mout_mmc3", group1_p4x12, SRC_FSYS, 12, 4),
MUX(none, "mout_mmc4", group1_p4x12, SRC_FSYS, 16, 4),
MUX(none, "mout_mipihsi", aclk_p4412, SRC_FSYS, 24, 1),
MUX(none, "mout_uart0", group1_p4x12, SRC_PERIL0, 0, 4),
MUX(none, "mout_uart1", group1_p4x12, SRC_PERIL0, 4, 4),
MUX(none, "mout_uart2", group1_p4x12, SRC_PERIL0, 8, 4),