forked from Minki/linux
net: Add MDIO bus driver for the Allwinner EMAC
This patch adds a separate driver for the MDIO interface of the Allwinner ethernet controllers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -0,0 +1,26 @@
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* Allwinner A10 MDIO Ethernet Controller interface
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Required properties:
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- compatible: should be "allwinner,sun4i-mdio".
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- reg: address and length of the register set for the device.
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Optional properties:
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- phy-supply: phandle to a regulator if the PHY needs one
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Example at the SoC level:
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mdio@01c0b080 {
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compatible = "allwinner,sun4i-mdio";
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reg = <0x01c0b080 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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And at the board level:
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mdio@01c0b080 {
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phy-supply = <®_emac_3v3>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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@ -144,6 +144,16 @@ config MDIO_OCTEON
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If in doubt, say Y.
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config MDIO_SUN4I
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tristate "Allwinner sun4i MDIO interface support"
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depends on ARCH_SUNXI
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select REGULATOR
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select REGULATOR_FIXED_VOLTAGE
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help
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This driver supports the MDIO interface found in the network
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interface units of the Allwinner SoC that have an EMAC (A10,
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A12, A10s, etc.)
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config MDIO_BUS_MUX
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tristate
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depends on OF_MDIO
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@ -30,3 +30,4 @@ obj-$(CONFIG_AMD_PHY) += amd.o
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obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
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obj-$(CONFIG_MDIO_BUS_MUX_GPIO) += mdio-mux-gpio.o
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obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
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obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o
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194
drivers/net/phy/mdio-sun4i.c
Normal file
194
drivers/net/phy/mdio-sun4i.c
Normal file
@ -0,0 +1,194 @@
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/*
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* Allwinner EMAC MDIO interface driver
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*
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* Copyright 2012-2013 Stefan Roese <sr@denx.de>
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* Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* Based on the Linux driver provided by Allwinner:
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* Copyright (C) 1997 Sten Wang
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of_address.h>
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#include <linux/of_mdio.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#define EMAC_MAC_MCMD_REG (0x00)
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#define EMAC_MAC_MADR_REG (0x04)
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#define EMAC_MAC_MWTD_REG (0x08)
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#define EMAC_MAC_MRDD_REG (0x0c)
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#define EMAC_MAC_MIND_REG (0x10)
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#define EMAC_MAC_SSRR_REG (0x14)
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#define MDIO_TIMEOUT (msecs_to_jiffies(100))
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struct sun4i_mdio_data {
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void __iomem *membase;
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struct regulator *regulator;
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};
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static int sun4i_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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{
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struct sun4i_mdio_data *data = bus->priv;
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unsigned long start_jiffies;
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int value;
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/* issue the phy address and reg */
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writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG);
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/* pull up the phy io line */
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writel(0x1, data->membase + EMAC_MAC_MCMD_REG);
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/* Wait read complete */
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start_jiffies = jiffies;
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while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) {
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if (time_after(start_jiffies,
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start_jiffies + MDIO_TIMEOUT))
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return -ETIMEDOUT;
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msleep(1);
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}
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/* push down the phy io line */
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writel(0x0, data->membase + EMAC_MAC_MCMD_REG);
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/* and read data */
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value = readl(data->membase + EMAC_MAC_MRDD_REG);
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return value;
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}
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static int sun4i_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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u16 value)
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{
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struct sun4i_mdio_data *data = bus->priv;
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unsigned long start_jiffies;
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/* issue the phy address and reg */
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writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG);
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/* pull up the phy io line */
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writel(0x1, data->membase + EMAC_MAC_MCMD_REG);
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/* Wait read complete */
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start_jiffies = jiffies;
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while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) {
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if (time_after(start_jiffies,
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start_jiffies + MDIO_TIMEOUT))
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return -ETIMEDOUT;
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msleep(1);
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}
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/* push down the phy io line */
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writel(0x0, data->membase + EMAC_MAC_MCMD_REG);
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/* and write data */
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writel(value, data->membase + EMAC_MAC_MWTD_REG);
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return 0;
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}
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static int sun4i_mdio_reset(struct mii_bus *bus)
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{
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return 0;
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}
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static int sun4i_mdio_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct mii_bus *bus;
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struct sun4i_mdio_data *data;
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int ret, i;
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bus = mdiobus_alloc_size(sizeof(*data));
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if (!bus)
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return -ENOMEM;
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bus->name = "sun4i_mii_bus";
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bus->read = &sun4i_mdio_read;
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bus->write = &sun4i_mdio_write;
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bus->reset = &sun4i_mdio_reset;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
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bus->parent = &pdev->dev;
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bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
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if (!bus->irq) {
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ret = -ENOMEM;
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goto err_out_free_mdiobus;
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}
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for (i = 0; i < PHY_MAX_ADDR; i++)
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bus->irq[i] = PHY_POLL;
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data = bus->priv;
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data->membase = of_iomap(np, 0);
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if (!data->membase) {
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ret = -ENOMEM;
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goto err_out_free_mdio_irq;
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}
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data->regulator = devm_regulator_get(&pdev->dev, "phy");
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if (IS_ERR(data->regulator)) {
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if (PTR_ERR(data->regulator) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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dev_info(&pdev->dev, "no regulator found\n");
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} else {
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ret = regulator_enable(data->regulator);
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if (ret)
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goto err_out_free_mdio_irq;
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}
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ret = of_mdiobus_register(bus, np);
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if (ret < 0)
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goto err_out_disable_regulator;
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platform_set_drvdata(pdev, bus);
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return 0;
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err_out_disable_regulator:
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regulator_disable(data->regulator);
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err_out_free_mdio_irq:
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kfree(bus->irq);
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err_out_free_mdiobus:
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mdiobus_free(bus);
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return ret;
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}
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static int sun4i_mdio_remove(struct platform_device *pdev)
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{
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struct mii_bus *bus = platform_get_drvdata(pdev);
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mdiobus_unregister(bus);
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kfree(bus->irq);
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mdiobus_free(bus);
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return 0;
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}
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static const struct of_device_id sun4i_mdio_dt_ids[] = {
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{ .compatible = "allwinner,sun4i-mdio" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, sun4i_mdio_dt_ids);
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static struct platform_driver sun4i_mdio_driver = {
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.probe = sun4i_mdio_probe,
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.remove = sun4i_mdio_remove,
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.driver = {
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.name = "sun4i-mdio",
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.of_match_table = sun4i_mdio_dt_ids,
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},
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};
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module_platform_driver(sun4i_mdio_driver);
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MODULE_DESCRIPTION("Allwinner EMAC MDIO interface driver");
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MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
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MODULE_LICENSE("GPL");
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