KVM: ARM: vgic: abstract MISR decoding
Instead of directly dealing with the GICH_MISR bits, move the code to its own function and use a couple of public flags to represent the actual state. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -87,6 +87,7 @@ struct vgic_ops {
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void (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr);
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void (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr);
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u64 (*get_elrsr)(const struct kvm_vcpu *vcpu);
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u64 (*get_elrsr)(const struct kvm_vcpu *vcpu);
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u64 (*get_eisr)(const struct kvm_vcpu *vcpu);
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u64 (*get_eisr)(const struct kvm_vcpu *vcpu);
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u32 (*get_interrupt_status)(const struct kvm_vcpu *vcpu);
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};
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};
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struct vgic_dist {
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struct vgic_dist {
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@ -165,6 +166,9 @@ struct vgic_cpu {
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#define LR_EMPTY 0xff
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#define LR_EMPTY 0xff
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#define INT_STATUS_EOI (1 << 0)
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#define INT_STATUS_UNDERFLOW (1 << 1)
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struct kvm;
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struct kvm;
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struct kvm_vcpu;
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struct kvm_vcpu;
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struct kvm_run;
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struct kvm_run;
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@ -1050,12 +1050,26 @@ static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu)
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return val;
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return val;
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}
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}
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static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu)
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{
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u32 misr = vcpu->arch.vgic_cpu.vgic_v2.vgic_misr;
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u32 ret = 0;
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if (misr & GICH_MISR_EOI)
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ret |= INT_STATUS_EOI;
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if (misr & GICH_MISR_U)
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ret |= INT_STATUS_UNDERFLOW;
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return ret;
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}
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static const struct vgic_ops vgic_ops = {
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static const struct vgic_ops vgic_ops = {
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.get_lr = vgic_v2_get_lr,
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.get_lr = vgic_v2_get_lr,
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.set_lr = vgic_v2_set_lr,
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.set_lr = vgic_v2_set_lr,
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.sync_lr_elrsr = vgic_v2_sync_lr_elrsr,
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.sync_lr_elrsr = vgic_v2_sync_lr_elrsr,
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.get_elrsr = vgic_v2_get_elrsr,
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.get_elrsr = vgic_v2_get_elrsr,
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.get_eisr = vgic_v2_get_eisr,
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.get_eisr = vgic_v2_get_eisr,
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.get_interrupt_status = vgic_v2_get_interrupt_status,
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};
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};
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static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr)
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static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr)
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@ -1085,6 +1099,11 @@ static inline u64 vgic_get_eisr(struct kvm_vcpu *vcpu)
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return vgic_ops.get_eisr(vcpu);
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return vgic_ops.get_eisr(vcpu);
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}
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}
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static inline u32 vgic_get_interrupt_status(struct kvm_vcpu *vcpu)
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{
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return vgic_ops.get_interrupt_status(vcpu);
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}
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static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu)
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static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu)
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{
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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@ -1282,11 +1301,12 @@ epilog:
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static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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{
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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u32 status = vgic_get_interrupt_status(vcpu);
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bool level_pending = false;
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bool level_pending = false;
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kvm_debug("MISR = %08x\n", vgic_cpu->vgic_v2.vgic_misr);
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kvm_debug("STATUS = %08x\n", status);
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if (vgic_cpu->vgic_v2.vgic_misr & GICH_MISR_EOI) {
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if (status & INT_STATUS_EOI) {
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/*
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/*
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* Some level interrupts have been EOIed. Clear their
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* Some level interrupts have been EOIed. Clear their
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* active bit.
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* active bit.
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@ -1319,7 +1339,7 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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}
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}
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}
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}
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if (vgic_cpu->vgic_v2.vgic_misr & GICH_MISR_U)
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if (status & INT_STATUS_UNDERFLOW)
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vgic_cpu->vgic_v2.vgic_hcr &= ~GICH_HCR_UIE;
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vgic_cpu->vgic_v2.vgic_hcr &= ~GICH_HCR_UIE;
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return level_pending;
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return level_pending;
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