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Merge tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91 into next/dt

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"Jean-Christophe PLAGNIOL-VILLARD" <plagnioj@jcrosoft.com> writes:

 ARM: AT91 more DT material

 New SoC conversion and boards support

 SoC convertion to DT:
  - at91sam9260
  - at91sam9263

 boards:
  - Atmel at91sam9g20ek/9263ek
  - Calao TNY-A9260/A9263/A9G20
  - Calao USB-A9260/A9263
  - Ethernnut 5
  - Kizbox

* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91: (32 commits)
  Ethernut 5 board support
  ARM: at91: add kizbox board dt support.
  ARM: at91: DT: add Calao TNY A9263 board support
  ARM: at91: DT: add Calao USB A9263 board support
  ARM: at91: add at91sam9263ek DT support
  ARM: at91: add at91sam9263 DT support
  ARM: at91: standard device init only if DT is not populated.
  ARM: at91: DT: add Calao USB A9260 DT support
  ARM: at91: Calao USB A926x factorize common binding in usb_a9260_common
  ARM: at91: USB A926x update nand partition
  ARM: at91: add at91sam9g20ek boards dt support
  arm: at91: add Calao TNY-A9260 and TNY-A9G20 board support
  ARM: at91: add at91sam9260 DT support
  ARM: at91: add defconfig for device tree
  ARM: at91/dt: do not specify the board any more
  ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
  ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select
  ARM: at91: pm select memory controler at runtime
  ARM: at91: move at91_init_leds to board init
  ARM: at91: do not pin mux the UARTs in init_early
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Arnd Bergmann 2012-05-01 00:08:35 +02:00 committed by Olof Johansson
commit 47fad7c6f8
90 changed files with 2441 additions and 1278 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/Kconfig
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@ -340,8 +340,8 @@ config ARCH_AT91
select IRQ_DOMAIN
select NEED_MACH_IO_H if PCCARD
help
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 processors.
This enables support for systems based on Atmel
AT91RM9200 and AT91SAM9* processors.
config ARCH_BCMRING
bool "Broadcom BCMRING"

238
arch/arm/boot/dts/at91sam9260.dtsi Normal file
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@ -0,0 +1,238 @@
/*
* at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
model = "Atmel AT91SAM9260 family SoC";
compatible = "atmel,at91sam9260";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
serial5 = &usart4;
serial6 = &usart5;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
tcb0 = &tcb0;
tcb1 = &tcb1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
memory {
reg = <0x20000000 0x04000000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
};
ramc0: ramc@ffffea00 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffea00 0x200>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};
rstc@fffffd00 {
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
interrupts = <17 4 18 4 19 4>;
};
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffdc000 0x100>;
interrupts = <26 4 27 4 28 4>;
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4>;
status = "disabled";
};
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
interrupts = <6 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
interrupts = <7 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart2: serial@fffb8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
interrupts = <8 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart3: serial@fffd0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd0000 0x200>;
interrupts = <23 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart4: serial@fffd4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd4000 0x200>;
interrupts = <24 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart5: serial@fffd8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd8000 0x200>;
interrupts = <25 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
macb0: ethernet@fffc4000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffc4000 0x100>;
interrupts = <21 4>;
status = "disabled";
};
usb1: gadget@fffa4000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 4>;
status = "disabled";
};
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000
0xffffe800 0x200
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioC 13 0
&pioC 14 0
0
>;
status = "disabled";
};
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 4>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 23 0 /* sda */
&pioA 24 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};

220
arch/arm/boot/dts/at91sam9263.dtsi Normal file
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@ -0,0 +1,220 @@
/*
* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 only.
*/
/include/ "skeleton.dtsi"
/ {
model = "Atmel AT91SAM9263 family SoC";
compatible = "atmel,at91sam9263";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
gpio3 = &pioD;
gpio4 = &pioE;
tcb0 = &tcb0;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
memory {
reg = <0x20000000 0x08000000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};
ramc: ramc@ffffe200 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffe200 0x200
0xffffe800 0x200>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4>;
};
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <19 4>;
};
rstc@fffffd00 {
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 4>;
status = "disabled";
};
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x200>;
interrupts = <7 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart1: serial@fff90000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff90000 0x200>;
interrupts = <8 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart2: serial@fff94000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff94000 0x200>;
interrupts = <9 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
macb0: ethernet@fffbc000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
interrupts = <21 4>;
status = "disabled";
};
usb1: gadget@fff78000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfff78000 0x4000>;
interrupts = <24 4>;
status = "disabled";
};
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000
0xffffe000 0x200
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioA 22 0
&pioD 15 0
0
>;
status = "disabled";
};
usb0: ohci@00a00000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 4>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioB 4 0 /* sda */
&pioB 5 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};

156
arch/arm/boot/dts/at91sam9263ek.dts Normal file
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@ -0,0 +1,156 @@
/*
* at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91sam9263.dtsi"
/ {
model = "Atmel at91sam9263ek";
compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <16367660>;
};
};
ahb {
apb {
dbgu: serial@ffffee00 {
status = "okay";
};
usart0: serial@fff8c000 {
status = "okay";
};
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioA 25 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt = <1>;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
usb0: ohci@00a00000 {
num-ports = <2>;
status = "okay";
atmel,vbus-gpio = <&pioA 24 0
&pioA 21 0
>;
};
};
leds {
compatible = "gpio-leds";
d3 {
label = "d3";
gpios = <&pioB 7 0>;
linux,default-trigger = "heartbeat";
};
d2 {
label = "d2";
gpios = <&pioC 29 1>;
linux,default-trigger = "nand-disk";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
left_click {
label = "left_click";
gpios = <&pioC 5 1>;
linux,code = <272>;
gpio-key,wakeup;
};
right_click {
label = "right_click";
gpios = <&pioC 4 1>;
linux,code = <273>;
gpio-key,wakeup;
};
};
i2c@0 {
status = "okay";
24c512@50 {
compatible = "24c512";
reg = <0x50>;
pagesize = <128>;
};
};
};

226
arch/arm/boot/dts/at91sam9g20.dtsi
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@ -1,238 +1,18 @@
/*
* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 or later.
* Licensed under GPLv2.
*/
/include/ "skeleton.dtsi"
/include/ "at91sam9260.dtsi"
/ {
model = "Atmel AT91SAM9G20 family SoC";
compatible = "atmel,at91sam9g20";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
serial5 = &usart4;
serial6 = &usart5;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
tcb0 = &tcb0;
tcb1 = &tcb1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
memory {
reg = <0x20000000 0x08000000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
};
ramc0: ramc@ffffea00 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffea00 0x200>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};
rstc@fffffd00 {
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
interrupts = <17 4 18 4 19 4>;
};
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffdc000 0x100>;
interrupts = <26 4 27 4 28 4>;
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4>;
status = "disabled";
};
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
interrupts = <6 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
interrupts = <7 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart2: serial@fffb8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
interrupts = <8 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart3: serial@fffd0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd0000 0x200>;
interrupts = <23 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart4: serial@fffd4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd4000 0x200>;
interrupts = <24 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart5: serial@fffd8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd8000 0x200>;
interrupts = <25 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
macb0: ethernet@fffc4000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffc4000 0x100>;
interrupts = <21 4>;
status = "disabled";
};
usb1: gadget@fffa4000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 4>;
status = "disabled";
};
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000
0xffffe800 0x200
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioC 13 0
&pioC 14 0
0
>;
status = "disabled";
};
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 4>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 23 0 /* sda */
&pioA 24 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};

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arch/arm/boot/dts/at91sam9g20ek.dts Normal file
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/*
* at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek";
compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9";
leds {
compatible = "gpio-leds";
ds1 {
label = "ds1";
gpios = <&pioA 9 0>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioA 6 1>;
};
};
};

29
arch/arm/boot/dts/at91sam9g20ek_2mmc.dts Normal file
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/*
* at91sam9g20ek_2mmc.dts - Device Tree file for Atmel at91sam9g20ek 2 MMC board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek 2 mmc";
compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
leds {
compatible = "gpio-leds";
ds1 {
label = "ds1";
gpios = <&pioB 9 0>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioB 8 1>;
};
};
};

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arch/arm/boot/dts/at91sam9g20ek_common.dtsi Normal file
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/*
* at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/include/ "at91sam9g20.dtsi"
/ {
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
usart0: serial@fffb0000 {
status = "okay";
};
usart1: serial@fffb4000 {
status = "okay";
};
macb0: ethernet@fffc4000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
usb0: ohci@00500000 {
num-ports = <2>;
status = "okay";
};
};
i2c@0 {
status = "okay";
24c512@50 {
compatible = "24c512";
reg = <0x50>;
};
wm8731@1b {
compatible = "wm8731";
reg = <0x1b>;
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
btn3 {
label = "Buttin 3";
gpios = <&pioA 30 1>;
linux,code = <0x103>;
gpio-key,wakeup;
};
btn4 {
label = "Buttin 4";
gpios = <&pioA 31 1>;
linux,code = <0x104>;
gpio-key,wakeup;
};
};
};

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arch/arm/boot/dts/ethernut5.dts Normal file
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/*
* ethernut5.dts - Device Tree file for Ethernut 5 board
*
* Copyright (C) 2012 egnite GmbH <info@egnite.de>
*
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
/ {
model = "Ethernut 5";
compatible = "egnite,ethernut5", "atmel,at91sam9260", "atmel,at91sam9";
chosen {
bootargs = "console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2";
};
memory {
reg = <0x20000000 0x08000000>;
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
usart0: serial@fffb0000 {
status = "okay";
};
usart1: serial@fffb4000 {
status = "okay";
};
macb0: ethernet@fffc4000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
gpios = <0
&pioC 14 0
0
>;
root@0 {
label = "root";
reg = <0x0 0x08000000>;
};
data@20000 {
label = "data";
reg = <0x08000000 0x38000000>;
};
};
usb0: ohci@00500000 {
num-ports = <2>;
status = "okay";
};
};
i2c@0 {
status = "okay";
pcf8563@50 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
};

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arch/arm/boot/dts/kizbox.dts Normal file
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/*
* kizbox.dts - Device Tree file for Overkiz Kizbox board
*
* Copyright (C) 2012 Boris BREZILLON <linux-arm@overkiz.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20.dtsi"
/ {
model = "Overkiz kizbox";
compatible = "overkiz,kizbox", "atmel,at91sam9g20", "atmel,at91sam9";
chosen {
bootargs = "panic=5 ubi.mtd=1 rootfstype=ubifs root=ubi0:root";
};
memory {
reg = <0x20000000 0x2000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
usart0: serial@fffb0000 {
status = "okay";
};
usart1: serial@fffb4000 {
status = "okay";
};
macb0: ethernet@fffc4000 {
phy-mode = "mii";
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
status = "okay";
bootloaderkernel@0 {
label = "bootloader-kernel";
reg = <0x0 0xc0000>;
};
ubi@c0000 {
label = "ubi";
reg = <0xc0000 0x7f40000>;
};
};
usb0: ohci@00500000 {
num-ports = <1>;
status = "okay";
};
};
i2c@0 {
status = "okay";
pcf8563@51 {
/* nxp pcf8563 rtc */
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
leds {
compatible = "gpio-leds";
led1g {
label = "led1:green";
gpios = <&pioB 0 1>;
linux,default-trigger = "none";
};
led1r {
label = "led1:red";
gpios = <&pioB 1 1>;
linux,default-trigger = "none";
};
led2g {
label = "led2:green";
gpios = <&pioB 2 1>;
linux,default-trigger = "none";
default-state = "on";
};
led2r {
label = "led2:red";
gpios = <&pioB 3 1>;
linux,default-trigger = "none";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
reset {
label = "reset";
gpios = <&pioB 30 1>;
linux,code = <0x100>;
gpio-key,wakeup;
};
mode {
label = "mode";
gpios = <&pioB 31 1>;
linux,code = <0x101>;
gpio-key,wakeup;
};
};
};

15
arch/arm/boot/dts/tny_a9260.dts Normal file
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@ -0,0 +1,15 @@
/*
* tny_a9260.dts - Device Tree file for Caloa TNY A9260 board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
/include/ "tny_a9260_common.dtsi"
/ {
model = "Calao TNY A9260";
compatible = "calao,tny-a9260", "atmel,at91sam9260", "atmel,at91sam9";
};

83
arch/arm/boot/dts/tny_a9260_common.dtsi Normal file
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/*
* tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/ {
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock6 rw rootfstype=ubifs";
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
};
};

97
arch/arm/boot/dts/tny_a9263.dts Normal file
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/*
* usb_a9263.dts - Device Tree file for Caloa USB A9293 board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91sam9263.dtsi"
/ {
model = "Calao TNY A9263";
compatible = "atmel,tny-a9263", "atmel,at91sam9263", "atmel,at91sam9";
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@ffffee00 {
status = "okay";
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioB 11 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
};
i2c@0 {
status = "okay";
};
};

15
arch/arm/boot/dts/tny_a9g20.dts Normal file
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@ -0,0 +1,15 @@
/*
* tny_a9g20.dts - Device Tree file for Caloa TNY A9G20 board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20.dtsi"
/include/ "tny_a9260_common.dtsi"
/ {
model = "Calao TNY A9G20";
compatible = "calao,tny-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
};

23
arch/arm/boot/dts/usb_a9260.dts Normal file
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@ -0,0 +1,23 @@
/*
* usb_a9260.dts - Device Tree file for Caloa USB A9260 board
*
* Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
/include/ "usb_a9260_common.dtsi"
/ {
model = "Calao USB A9260";
compatible = "calao,usb-a9260", "atmel,at91sam9260", "atmel,at91sam9";
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
};
memory {
reg = <0x20000000 0x4000000>;
};
};

117
arch/arm/boot/dts/usb_a9260_common.dtsi Normal file
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@ -0,0 +1,117 @@
/*
* usb_a926x.dts - Device Tree file for Caloa USB A926x board
*
* Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 or later.
*/
/ {
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
macb0: ethernet@fffc4000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
usb0: ohci@00500000 {
num-ports = <2>;
status = "okay";
};
};
leds {
compatible = "gpio-leds";
user_led {
label = "user_led";
gpios = <&pioB 21 1>;
linux,default-trigger = "heartbeat";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user_pb {
label = "user_pb";
gpios = <&pioB 10 1>;
linux,code = <28>;
gpio-key,wakeup;
};
};
i2c@0 {
status = "okay";
};
};

131
arch/arm/boot/dts/usb_a9263.dts Normal file
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/*
* usb_a9263.dts - Device Tree file for Caloa USB A9293 board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91sam9263.dtsi"
/ {
model = "Calao USB A9263";
compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@ffffee00 {
status = "okay";
};
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioB 11 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
usb0: ohci@00a00000 {
num-ports = <2>;
status = "okay";
};
};
leds {
compatible = "gpio-leds";
user_led {
label = "user_led";
gpios = <&pioB 21 0>;
linux,default-trigger = "heartbeat";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user_pb {
label = "user_pb";
gpios = <&pioB 10 1>;
linux,code = <28>;
gpio-key,wakeup;
};
};
i2c@0 {
status = "okay";
};
};

102
arch/arm/boot/dts/usb_a9g20.dts
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@ -7,6 +7,7 @@
*/
/dts-v1/;
/include/ "at91sam9g20.dtsi"
/include/ "usb_a9260_common.dtsi"
/ {
model = "Calao USB A9G20";
@ -20,108 +21,7 @@
reg = <0x20000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
macb0: ethernet@fffc4000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xa0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4a0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7ca0000 0x8360000>;
};
};
usb0: ohci@00500000 {
num-ports = <2>;
status = "okay";
};
};
leds {
compatible = "gpio-leds";
user_led {
label = "user_led";
gpios = <&pioB 21 1>;
linux,default-trigger = "heartbeat";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user_pb {
label = "user_pb";
gpios = <&pioB 10 1>;
linux,code = <28>;
gpio-key,wakeup;
};
};
i2c@0 {
status = "okay";
rv3029c2@56 {
compatible = "rv3029c2";
reg = <0x56>;

196
arch/arm/configs/at91_dt_defconfig Normal file
View File

@ -0,0 +1,196 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_AT91SAM9260=y
CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
CONFIG_MACH_AT91SAM_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_EEPROM_93CX6=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_DAVICOM_PHY=y
CONFIG_MICREL_PHY=y
# CONFIG_WLAN is not set
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=4
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SSB=m
CONFIG_FB=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_AT91=m
CONFIG_USB_ATMEL_USBA=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_ACM_MS=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_ARC4=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=m
CONFIG_CRC_ITU_T=m
CONFIG_CRC7=m
CONFIG_AVERAGE=y

1
arch/arm/configs/at91rm9200_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y
CONFIG_MACH_ONEARM=y
CONFIG_ARCH_AT91RM9200DK=y
CONFIG_MACH_AT91RM9200EK=y

186
arch/arm/mach-at91/Kconfig
View File

@ -9,15 +9,6 @@ config HAVE_AT91_DBGU0
config HAVE_AT91_DBGU1
bool
config HAVE_AT91_USART3
bool
config HAVE_AT91_USART4
bool
config HAVE_AT91_USART5
bool
config AT91_SAM9_ALT_RESET
bool
default !ARCH_AT91X40
@ -26,87 +17,121 @@ config AT91_SAM9G45_RESET
bool
default !ARCH_AT91X40
config SOC_AT91SAM9
bool
select GENERIC_CLOCKEVENTS
select CPU_ARM926T
menu "Atmel AT91 System-on-Chip"
choice
prompt "Atmel AT91 Processor"
comment "Atmel AT91 Processor"
config ARCH_AT91RM9200
config SOC_AT91SAM9
bool
select CPU_ARM926T
select AT91_SAM9_TIME
select AT91_SAM9_SMC
config SOC_AT91RM9200
bool "AT91RM9200"
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select HAVE_AT91_USART3
config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select SOC_AT91SAM9
select HAVE_AT91_DBGU0
select HAVE_NET_MACB
help
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
or AT91SAM9G20 SoC.
config SOC_AT91SAM9261
bool "AT91SAM9261 or AT91SAM9G10"
select SOC_AT91SAM9
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
help
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
config SOC_AT91SAM9263
bool "AT91SAM9263"
select SOC_AT91SAM9
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select HAVE_NET_MACB
config SOC_AT91SAM9RL
bool "AT91SAM9RL"
select SOC_AT91SAM9
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
config SOC_AT91SAM9G45
bool "AT91SAM9G45 or AT91SAM9M10 families"
select SOC_AT91SAM9
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select HAVE_NET_MACB
help
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
config SOC_AT91SAM9X5
bool "AT91SAM9x5 family"
select SOC_AT91SAM9
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select HAVE_NET_MACB
help
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
This means that your SAM9 name finishes with a '5' (except if it is
AT91SAM9G45!).
This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
and AT91SAM9X35.
choice
prompt "Atmel AT91 Processor Devices for non DT boards"
config ARCH_AT91_NONE
bool "None"
config ARCH_AT91RM9200
bool "AT91RM9200"
select SOC_AT91RM9200
config ARCH_AT91SAM9260
bool "AT91SAM9260 or AT91SAM9XE"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select HAVE_AT91_USART3
select HAVE_AT91_USART4
select HAVE_AT91_USART5
select HAVE_NET_MACB
select SOC_AT91SAM9260
config ARCH_AT91SAM9261
bool "AT91SAM9261"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU0
select SOC_AT91SAM9261
config ARCH_AT91SAM9G10
bool "AT91SAM9G10"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9261
config ARCH_AT91SAM9263
bool "AT91SAM9263"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_FB_ATMEL
select HAVE_NET_MACB
select HAVE_AT91_DBGU1
select SOC_AT91SAM9263
config ARCH_AT91SAM9RL
bool "AT91SAM9RL"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_USART3
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU0
select SOC_AT91SAM9RL
config ARCH_AT91SAM9G20
bool "AT91SAM9G20"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select HAVE_AT91_USART3
select HAVE_AT91_USART4
select HAVE_AT91_USART5
select HAVE_NET_MACB
select SOC_AT91SAM9260
config ARCH_AT91SAM9G45
bool "AT91SAM9G45"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_USART3
select HAVE_FB_ATMEL
select HAVE_NET_MACB
select HAVE_AT91_DBGU1
config ARCH_AT91SAM9X5
bool "AT91SAM9x5 family"
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_FB_ATMEL
select HAVE_NET_MACB
select HAVE_AT91_DBGU0
select SOC_AT91SAM9G45
config ARCH_AT91X40
bool "AT91x40"
depends on !MMU
select ARCH_USES_GETTIMEOFFSET
endchoice
@ -364,6 +389,7 @@ config MACH_AT91SAM9G20EK_2MMC
Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
onwards.
<http://www.atmel.com/tools/SAM9G20-EK.aspx>
config MACH_CPU9G20
bool "Eukrea CPU9G20 board"
@ -433,9 +459,10 @@ comment "AT91SAM9G45 Board Type"
config MACH_AT91SAM9M10G45EK
bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
help
Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit.
"ES" at the end of the name means that this board is an
Engineering Sample.
Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
<http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
endif
@ -515,41 +542,6 @@ config AT91_TIMER_HZ
system clock (of at least several MHz), rounding is less of a
problem so it can be safer to use a decimal values like 100.
choice
prompt "Select a UART for early kernel messages"
config AT91_EARLY_DBGU0
bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
depends on HAVE_AT91_DBGU0
config AT91_EARLY_DBGU1
bool "DBGU on 9263 and 9g45"
depends on HAVE_AT91_DBGU1
config AT91_EARLY_USART0
bool "USART0"
config AT91_EARLY_USART1
bool "USART1"
config AT91_EARLY_USART2
bool "USART2"
depends on ! ARCH_AT91X40
config AT91_EARLY_USART3
bool "USART3"
depends on HAVE_AT91_USART3
config AT91_EARLY_USART4
bool "USART4"
depends on HAVE_AT91_USART4
config AT91_EARLY_USART5
bool "USART5"
depends on HAVE_AT91_USART5
endchoice
endmenu
endif

26
arch/arm/mach-at91/Makefile
View File

@ -10,17 +10,25 @@ obj- :=
obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o
# CPU-specific support
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o at91sam926x_time.o sam9_smc.o
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o
obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o
obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o
obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o
obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o
obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o
obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261_devices.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
# AT91RM9200 board-specific support

12
arch/arm/mach-at91/Makefile.boot
View File

@ -14,7 +14,19 @@ initrd_phys-y := 0x20410000
endif
# Keep dtb files sorted alphabetically for each SoC
# sam9260
dtb-$(CONFIG_MACH_AT91SAM_DT) += ethernut5.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9260.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9260.dtb
# sam9263
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9263ek.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9263.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9263.dtb
# sam9g20
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek_2mmc.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += kizbox.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9g20.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb
# sam9g45
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb

12
arch/arm/mach-at91/at91rm9200.c
View File

@ -258,18 +258,6 @@ static void __init at91rm9200_register_clocks(void)
clk_register(&pck3);
}
static struct clk_lookup console_clock_lookup;
void __init at91rm9200_set_console_clock(int id)
{
if (id >= ARRAY_SIZE(usart_clocks_lookups))
return;
console_clock_lookup.con_id = "usart";
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
clkdev_add(&console_clock_lookup);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */

12
arch/arm/mach-at91/at91rm9200_devices.c
View File

@ -1152,14 +1152,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
void __init at91_set_serial_console(unsigned portnr)
{
if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
at91rm9200_set_console_clock(at91_uarts[portnr]->id);
}
}
void __init at91_add_device_serial(void)
{
int i;
@ -1168,13 +1160,9 @@ void __init at91_add_device_serial(void)
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
#else
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
void __init at91_add_device_serial(void) {}
#endif

12
arch/arm/mach-at91/at91sam9260.c
View File

@ -268,18 +268,6 @@ static void __init at91sam9260_register_clocks(void)
clk_register(&pck1);
}
static struct clk_lookup console_clock_lookup;
void __init at91sam9260_set_console_clock(int id)
{
if (id >= ARRAY_SIZE(usart_clocks_lookups))
return;
console_clock_lookup.con_id = "usart";
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
clkdev_add(&console_clock_lookup);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */

32
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -702,25 +702,8 @@ static struct platform_device at91sam9260_tcb1_device = {
.num_resources = ARRAY_SIZE(tcb1_resources),
};
#if defined(CONFIG_OF)
static struct of_device_id tcb_ids[] = {
{ .compatible = "atmel,at91rm9200-tcb" },
{ /*sentinel*/ }
};
#endif
static void __init at91_add_device_tc(void)
{
#if defined(CONFIG_OF)
struct device_node *np;
np = of_find_matching_node(NULL, tcb_ids);
if (np) {
of_node_put(np);
return;
}
#endif
platform_device_register(&at91sam9260_tcb0_device);
platform_device_register(&at91sam9260_tcb1_device);
}
@ -1229,14 +1212,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
void __init at91_set_serial_console(unsigned portnr)
{
if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
at91sam9260_set_console_clock(at91_uarts[portnr]->id);
}
}
void __init at91_add_device_serial(void)
{
int i;
@ -1245,13 +1220,9 @@ void __init at91_add_device_serial(void)
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
#else
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
void __init at91_add_device_serial(void) {}
#endif
@ -1376,6 +1347,9 @@ void __init at91_add_device_cf(struct at91_cf_data * data) {}
*/
static int __init at91_add_standard_devices(void)
{
if (of_have_populated_dt())
return 0;
at91_add_device_rtt();
at91_add_device_watchdog();
at91_add_device_tc();

12
arch/arm/mach-at91/at91sam9261.c
View File

@ -239,18 +239,6 @@ static void __init at91sam9261_register_clocks(void)
clk_register(&hck1);
}
static struct clk_lookup console_clock_lookup;
void __init at91sam9261_set_console_clock(int id)
{
if (id >= ARRAY_SIZE(usart_clocks_lookups))
return;
console_clock_lookup.con_id = "usart";
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
clkdev_add(&console_clock_lookup);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */

12
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -1051,14 +1051,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
void __init at91_set_serial_console(unsigned portnr)
{
if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
at91sam9261_set_console_clock(at91_uarts[portnr]->id);
}
}
void __init at91_add_device_serial(void)
{
int i;
@ -1067,13 +1059,9 @@ void __init at91_add_device_serial(void)
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
#else
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
void __init at91_add_device_serial(void) {}
#endif

22
arch/arm/mach-at91/at91sam9263.c
View File

@ -199,6 +199,16 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("pioC", &pioCDE_clk),
CLKDEV_CON_ID("pioD", &pioCDE_clk),
CLKDEV_CON_ID("pioE", &pioCDE_clk),
/* more usart lookup table for DT entries */
CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
/* more tc lookup table for DT entries */
CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@ -255,18 +265,6 @@ static void __init at91sam9263_register_clocks(void)
clk_register(&pck3);
}
static struct clk_lookup console_clock_lookup;
void __init at91sam9263_set_console_clock(int id)
{
if (id >= ARRAY_SIZE(usart_clocks_lookups))
return;
console_clock_lookup.con_id = "usart";
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
clkdev_add(&console_clock_lookup);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */

32
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -953,8 +953,25 @@ static struct platform_device at91sam9263_tcb_device = {
.num_resources = ARRAY_SIZE(tcb_resources),
};
#if defined(CONFIG_OF)
static struct of_device_id tcb_ids[] = {
{ .compatible = "atmel,at91rm9200-tcb" },
{ /*sentinel*/ }
};
#endif
static void __init at91_add_device_tc(void)
{
#if defined(CONFIG_OF)
struct device_node *np;
np = of_find_matching_node(NULL, tcb_ids);
if (np) {
of_node_put(np);
return;
}
#endif
platform_device_register(&at91sam9263_tcb_device);
}
#else
@ -1461,14 +1478,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
void __init at91_set_serial_console(unsigned portnr)
{
if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
at91sam9263_set_console_clock(at91_uarts[portnr]->id);
}
}
void __init at91_add_device_serial(void)
{
int i;
@ -1477,13 +1486,9 @@ void __init at91_add_device_serial(void)
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
#else
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
void __init at91_add_device_serial(void) {}
#endif
@ -1495,6 +1500,9 @@ void __init at91_add_device_serial(void) {}
*/
static int __init at91_add_standard_devices(void)
{
if (of_have_populated_dt())
return 0;
at91_add_device_rtt();
at91_add_device_watchdog();
at91_add_device_tc();

12
arch/arm/mach-at91/at91sam9g45.c
View File

@ -288,18 +288,6 @@ static void __init at91sam9g45_register_clocks(void)
clk_register(&pck1);
}
static struct clk_lookup console_clock_lookup;
void __init at91sam9g45_set_console_clock(int id)
{
if (id >= ARRAY_SIZE(usart_clocks_lookups))
return;
console_clock_lookup.con_id = "usart";
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
clkdev_add(&console_clock_lookup);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */

42
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -69,15 +69,7 @@ static struct platform_device at_hdmac_device = {
void __init at91_add_device_hdmac(void)
{
#if defined(CONFIG_OF)
struct device_node *of_node =
of_find_node_by_name(NULL, "dma-controller");
if (of_node)
of_node_put(of_node);
else
#endif
platform_device_register(&at_hdmac_device);
platform_device_register(&at_hdmac_device);
}
#else
void __init at91_add_device_hdmac(void) {}
@ -1094,25 +1086,8 @@ static struct platform_device at91sam9g45_tcb1_device = {
.num_resources = ARRAY_SIZE(tcb1_resources),
};
#if defined(CONFIG_OF)
static struct of_device_id tcb_ids[] = {
{ .compatible = "atmel,at91rm9200-tcb" },
{ /*sentinel*/ }
};
#endif
static void __init at91_add_device_tc(void)
{
#if defined(CONFIG_OF)
struct device_node *np;
np = of_find_matching_node(NULL, tcb_ids);
if (np) {
of_node_put(np);
return;
}
#endif
platform_device_register(&at91sam9g45_tcb0_device);
platform_device_register(&at91sam9g45_tcb1_device);
}
@ -1741,14 +1716,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
void __init at91_set_serial_console(unsigned portnr)
{
if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
at91sam9g45_set_console_clock(at91_uarts[portnr]->id);
}
}
void __init at91_add_device_serial(void)
{
int i;
@ -1757,13 +1724,9 @@ void __init at91_add_device_serial(void)
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
#else
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
void __init at91_add_device_serial(void) {}
#endif
@ -1775,6 +1738,9 @@ void __init at91_add_device_serial(void) {}
*/
static int __init at91_add_standard_devices(void)
{
if (of_have_populated_dt())
return 0;
at91_add_device_hdmac();
at91_add_device_rtc();
at91_add_device_rtt();

12
arch/arm/mach-at91/at91sam9rl.c
View File

@ -232,18 +232,6 @@ static void __init at91sam9rl_register_clocks(void)
clk_register(&pck1);
}
static struct clk_lookup console_clock_lookup;
void __init at91sam9rl_set_console_clock(int id)
{
if (id >= ARRAY_SIZE(usart_clocks_lookups))
return;
console_clock_lookup.con_id = "usart";
console_clock_lookup.clk = usart_clocks_lookups[id].clk;
clkdev_add(&console_clock_lookup);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */

12
arch/arm/mach-at91/at91sam9rl_devices.c
View File

@ -1192,14 +1192,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
void __init at91_set_serial_console(unsigned portnr)
{
if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
}
}
void __init at91_add_device_serial(void)
{
int i;
@ -1208,13 +1200,9 @@ void __init at91_add_device_serial(void)
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
if (!atmel_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
#else
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
void __init at91_add_device_serial(void) {}
#endif

24
arch/arm/mach-at91/board-1arm.c
View File

@ -47,20 +47,6 @@ static void __init onearm_init_early(void)
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata onearm_eth_data = {
@ -82,6 +68,16 @@ static struct at91_udc_data __initdata onearm_udc_data = {
static void __init onearm_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&onearm_eth_data);

28
arch/arm/mach-at91/board-afeb-9260v1.c
View File

@ -52,22 +52,6 @@ static void __init afeb9260_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR
| ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -183,6 +167,18 @@ static struct at91_cf_data afeb9260_cf_data = {
static void __init afeb9260_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR
| ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&afeb9260_usbh_data);

8
arch/arm/mach-at91/board-cam60.c
View File

@ -49,12 +49,6 @@ static void __init cam60_init_early(void)
{
/* Initialize processor: 10 MHz crystal */
at91_initialize(10000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -175,6 +169,8 @@ static void __init cam60_add_device_nand(void)
static void __init cam60_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* SPI */
at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));

18
arch/arm/mach-at91/board-carmeva.c
View File

@ -44,17 +44,6 @@ static void __init carmeva_init_early(void)
{
/* Initialize processor: 20.000 MHz crystal */
at91_initialize(20000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata carmeva_eth_data = {
@ -139,6 +128,13 @@ static struct gpio_led carmeva_leds[] = {
static void __init carmeva_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&carmeva_eth_data);

52
arch/arm/mach-at91/board-cpu9krea.c
View File

@ -52,34 +52,6 @@ static void __init cpu9krea_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* USART3 on ttyS4. (Rx, Tx) */
at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
/* USART4 on ttyS5. (Rx, Tx) */
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
/* USART5 on ttyS6. (Rx, Tx) */
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -352,6 +324,30 @@ static void __init cpu9krea_board_init(void)
/* NOR */
cpu9krea_add_device_nor();
/* Serial */
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* USART3 on ttyS4. (Rx, Tx) */
at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
/* USART4 on ttyS5. (Rx, Tx) */
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
/* USART5 on ttyS6. (Rx, Tx) */
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&cpu9krea_usbh_data);

40
arch/arm/mach-at91/board-cpuat91.c
View File

@ -59,28 +59,6 @@ static void __init cpuat91_init_early(void)
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART2 on ttyS3 (Rx, Tx) */
at91_register_uart(AT91RM9200_ID_US2, 3, 0);
/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata cpuat91_eth_data = {
@ -161,6 +139,24 @@ static struct platform_device *platform_devices[] __initdata = {
static void __init cpuat91_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
ATMEL_UART_RTS);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART2 on ttyS3 (Rx, Tx) */
at91_register_uart(AT91RM9200_ID_US2, 3, 0);
/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
ATMEL_UART_RTS);
at91_add_device_serial();
/* LEDs. */
at91_gpio_leds(cpuat91_leds, ARRAY_SIZE(cpuat91_leds));

13
arch/arm/mach-at91/board-csb337.c
View File

@ -47,15 +47,6 @@ static void __init csb337_init_early(void)
{
/* Initialize processor: 3.6864 MHz crystal */
at91_initialize(3686400);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
/* DBGU on ttyS0 */
at91_register_uart(0, 0, 0);
/* make console=ttyS0 the default */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata csb337_eth_data = {
@ -228,7 +219,11 @@ static struct gpio_led csb_leds[] = {
static void __init csb337_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
/* Serial */
/* DBGU on ttyS0 */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&csb337_eth_data);

8
arch/arm/mach-at91/board-csb637.c
View File

@ -44,12 +44,6 @@ static void __init csb637_init_early(void)
{
/* Initialize processor: 3.6864 MHz crystal */
at91_initialize(3686400);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* make console=ttyS0 (ie, DBGU) the default */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata csb637_eth_data = {
@ -118,6 +112,8 @@ static void __init csb637_board_init(void)
/* LED(s) */
at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&csb637_eth_data);

8
arch/arm/mach-at91/board-dt.c
View File

@ -1,10 +1,6 @@
/*
* Setup code for AT91SAM Evaluation Kits with Device Tree support
*
* Covers: * AT91SAM9G45-EKES board
* * AT91SAM9M10-EKES board
* * AT91SAM9M10G45-EK board
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
*
@ -49,9 +45,7 @@ static void __init at91_dt_device_init(void)
}
static const char *at91_dt_board_compat[] __initdata = {
"atmel,at91sam9m10g45ek",
"atmel,at91sam9x5ek",
"calao,usb-a9g20",
"atmel,at91sam9",
NULL
};

24
arch/arm/mach-at91/board-eb9200.c
View File

@ -44,20 +44,6 @@ static void __init eb9200_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART2 on ttyS2. (Rx, Tx) - IRDA */
at91_register_uart(AT91RM9200_ID_US2, 2, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata eb9200_eth_data = {
@ -101,6 +87,16 @@ static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
static void __init eb9200_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART2 on ttyS2. (Rx, Tx) - IRDA */
at91_register_uart(AT91RM9200_ID_US2, 2, 0);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&eb9200_eth_data);

20
arch/arm/mach-at91/board-ecbat91.c
View File

@ -50,18 +50,6 @@ static void __init ecb_at91init_early(void)
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx & Tx only) */
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata ecb_at91eth_data = {
@ -151,7 +139,15 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = {
static void __init ecb_at91board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx & Tx only) */
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
at91_add_device_serial();
/* Ethernet */

13
arch/arm/mach-at91/board-eco920.c
View File

@ -37,15 +37,6 @@ static void __init eco920_init_early(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
/* DBGU on ttyS0. (Rx & Tx only */
at91_register_uart(0, 0, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata eco920_eth_data = {
@ -103,6 +94,10 @@ static struct spi_board_info eco920_spi_devices[] = {
static void __init eco920_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
/* DBGU on ttyS0. (Rx & Tx only */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
at91_add_device_eth(&eco920_eth_data);
at91_add_device_usbh(&eco920_usbh_data);

8
arch/arm/mach-at91/board-flexibity.c
View File

@ -41,12 +41,6 @@ static void __init flexibity_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/* USB Host port */
@ -143,6 +137,8 @@ static struct gpio_led flexibity_leds[] = {
static void __init flexibity_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&flexibity_usbh_data);

71
arch/arm/mach-at91/board-foxg20.c
View File

@ -61,44 +61,6 @@ static void __init foxg20_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS
| ATMEL_UART_RTS
| ATMEL_UART_DTR
| ATMEL_UART_DSR
| ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx & Tx only) */
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
/* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US3, 4,
ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART4 on ttyS5. (Rx & Tx only) */
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
/* USART5 on ttyS6. (Rx & Tx only) */
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
/* Set the internal pull-up resistor on DRXD */
at91_set_A_periph(AT91_PIN_PB14, 1);
}
/*
@ -241,6 +203,39 @@ static struct i2c_board_info __initdata foxg20_i2c_devices[] = {
static void __init foxg20_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS
| ATMEL_UART_RTS
| ATMEL_UART_DTR
| ATMEL_UART_DSR
| ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx & Tx only) */
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
/* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US3, 4,
ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART4 on ttyS5. (Rx & Tx only) */
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
/* USART5 on ttyS6. (Rx & Tx only) */
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
/* Set the internal pull-up resistor on DRXD */
at91_set_A_periph(AT91_PIN_PB14, 1);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&foxg20_usbh_data);

63
arch/arm/mach-at91/board-gsia18s.c
View File

@ -41,38 +41,6 @@
static void __init gsia18s_init_early(void)
{
stamp9g20_init_early();
/*
* USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
* Used for Internal Analog Modem.
*/
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS | ATMEL_UART_RTS |
ATMEL_UART_DTR | ATMEL_UART_DSR |
ATMEL_UART_DCD | ATMEL_UART_RI);
/*
* USART1 on ttyS2 (Rx, Tx, CTS, RTS).
* Used for GPS or WiFi or Data stream.
*/
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS | ATMEL_UART_RTS);
/*
* USART2 on ttyS3 (Rx, Tx, CTS, RTS).
* Used for External Modem.
*/
at91_register_uart(AT91SAM9260_ID_US2, 3,
ATMEL_UART_CTS | ATMEL_UART_RTS);
/*
* USART3 on ttyS4 (Rx, Tx, RTS).
* Used for RS-485.
*/
at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
/*
* USART4 on ttyS5 (Rx, Tx).
* Used for TRX433 Radio Module.
*/
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
}
/*
@ -558,6 +526,37 @@ static int __init gsia18s_power_off_init(void)
static void __init gsia18s_board_init(void)
{
/*
* USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
* Used for Internal Analog Modem.
*/
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS | ATMEL_UART_RTS |
ATMEL_UART_DTR | ATMEL_UART_DSR |
ATMEL_UART_DCD | ATMEL_UART_RI);
/*
* USART1 on ttyS2 (Rx, Tx, CTS, RTS).
* Used for GPS or WiFi or Data stream.
*/
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS | ATMEL_UART_RTS);
/*
* USART2 on ttyS3 (Rx, Tx, CTS, RTS).
* Used for External Modem.
*/
at91_register_uart(AT91SAM9260_ID_US2, 3,
ATMEL_UART_CTS | ATMEL_UART_RTS);
/*
* USART3 on ttyS4 (Rx, Tx, RTS).
* Used for RS-485.
*/
at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
/*
* USART4 on ttyS5 (Rx, Tx).
* Used for TRX433 Radio Module.
*/
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
stamp9g20_board_init();
at91_add_device_usbh(&usbh_data);
at91_add_device_udc(&udc_data);

20
arch/arm/mach-at91/board-kafa.c
View File

@ -47,18 +47,6 @@ static void __init kafa_init_early(void)
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata kafa_eth_data = {
@ -79,7 +67,15 @@ static struct at91_udc_data __initdata kafa_udc_data = {
static void __init kafa_board_init(void)
{
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&kafa_eth_data);

32
arch/arm/mach-at91/board-kb9202.c
View File

@ -50,24 +50,6 @@ static void __init kb9202_init_early(void)
/* Initialize processor: 10 MHz crystal */
at91_initialize(10000000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1 (Rx & Tx only) */
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
/* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
at91_register_uart(AT91RM9200_ID_US1, 2, 0);
/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata kb9202_eth_data = {
@ -115,7 +97,21 @@ static struct atmel_nand_data __initdata kb9202_nand_data = {
static void __init kb9202_board_init(void)
{
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1 (Rx & Tx only) */
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
/* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
at91_register_uart(AT91RM9200_ID_US1, 2, 0);
/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&kb9202_eth_data);

14
arch/arm/mach-at91/board-neocore926.c
View File

@ -55,15 +55,6 @@ static void __init neocore926_init_early(void)
{
/* Initialize processor: 20 MHz crystal */
at91_initialize(20000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -341,6 +332,11 @@ static struct ac97c_platform_data neocore926_ac97_data = {
static void __init neocore926_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */

21
arch/arm/mach-at91/board-pcontrol-g20.c
View File

@ -40,17 +40,6 @@
static void __init pcontrol_g20_init_early(void)
{
stamp9g20_init_early();
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
}
static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
@ -199,6 +188,16 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = {
static void __init pcontrol_g20_board_init(void)
{
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
| ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
stamp9g20_board_init();
at91_add_device_usbh(&usbh_data);
at91_add_device_eth(&macb_data);

18
arch/arm/mach-at91/board-picotux200.c
View File

@ -48,17 +48,6 @@ static void __init picotux200_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata picotux200_eth_data = {
@ -106,6 +95,13 @@ static struct platform_device picotux200_flash = {
static void __init picotux200_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&picotux200_eth_data);

31
arch/arm/mach-at91/board-qil-a9260.c
View File

@ -52,24 +52,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 12.000 MHz crystal */
at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS1 (ie, USART0) */
at91_set_serial_console(1);
}
/*
@ -235,6 +217,19 @@ static struct gpio_led ek_leds[] = {
static void __init ek_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

24
arch/arm/mach-at91/board-rm9200dk.c
View File

@ -50,20 +50,6 @@ static void __init dk_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata dk_eth_data = {
@ -190,7 +176,17 @@ static struct gpio_led dk_leds[] = {
static void __init dk_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&dk_eth_data);

24
arch/arm/mach-at91/board-rm9200ek.c
View File

@ -50,20 +50,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static struct macb_platform_data __initdata ek_eth_data = {
@ -161,7 +147,17 @@ static struct gpio_led ek_leds[] = {
static void __init ek_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&ek_eth_data);

36
arch/arm/mach-at91/board-rsi-ews.c
View File

@ -35,26 +35,6 @@ static void __init rsi_ews_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9);
/* DBGU on ttyS0. (Rx & Tx only) */
/* This one is for debugging */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
/* Dialin/-out modem interface */
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART3 on ttyS4. (Rx, Tx, RTS) */
/* RS485 communication */
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -204,7 +184,23 @@ static struct platform_device rsiews_nor_flash = {
*/
static void __init rsi_ews_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
/* This one is for debugging */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
/* Dialin/-out modem interface */
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART3 on ttyS4. (Rx, Tx, RTS) */
/* RS485 communication */
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);
at91_add_device_serial();
at91_set_gpio_output(AT91_PIN_PA21, 0);
/* Ethernet */

30
arch/arm/mach-at91/board-sam9-l9260.c
View File

@ -48,23 +48,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -184,7 +167,20 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
static void __init ek_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

24
arch/arm/mach-at91/board-sam9260ek.c
View File

@ -54,20 +54,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -320,6 +306,16 @@ static void __init ek_add_device_buttons(void) {}
static void __init ek_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

14
arch/arm/mach-at91/board-sam9261ek.c
View File

@ -58,15 +58,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -577,7 +568,12 @@ static struct gpio_led ek_leds[] = {
static void __init ek_board_init(void)
{
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

14
arch/arm/mach-at91/board-sam9263ek.c
View File

@ -57,15 +57,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 16.367 MHz crystal */
at91_initialize(16367660);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -412,6 +403,11 @@ static struct at91_can_data ek_can_data = {
static void __init ek_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

24
arch/arm/mach-at91/board-sam9g20ek.c
View File

@ -65,20 +65,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -372,6 +358,16 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
static void __init ek_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

16
arch/arm/mach-at91/board-sam9m10g45ek.c
View File

@ -53,16 +53,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 12.000 MHz crystal */
at91_initialize(12000000);
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 not connected on the -EK board */
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -457,6 +447,12 @@ static struct platform_device *devices[] __initdata = {
static void __init ek_board_init(void)
{
/* Serial */
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 not connected on the -EK board */
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB HS Host */
at91_add_device_usbh_ohci(&ek_usbh_hs_data);

14
arch/arm/mach-at91/board-sam9rlek.c
View File

@ -42,15 +42,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 12.000 MHz crystal */
at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -296,6 +287,11 @@ static void __init ek_add_device_buttons(void) {}
static void __init ek_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_add_device_serial();
/* USB HS */
at91_add_device_usba(&ek_usba_udc_data);

18
arch/arm/mach-at91/board-snapper9260.c
View File

@ -43,16 +43,6 @@
static void __init snapper9260_init_early(void)
{
at91_initialize(18432000);
/* Debug on ttyS0 */
at91_register_uart(0, 0, 0);
at91_set_serial_console(0);
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
}
static struct at91_usbh_data __initdata snapper9260_usbh_data = {
@ -168,6 +158,14 @@ static void __init snapper9260_board_init(void)
snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);
i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1);
/* Debug on ttyS0 */
at91_register_uart(0, 0, 0);
at91_register_uart(AT91SAM9260_ID_US0, 1,
ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_register_uart(AT91SAM9260_ID_US1, 2,
ATMEL_UART_CTS | ATMEL_UART_RTS);
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
at91_add_device_serial();
at91_add_device_usbh(&snapper9260_usbh_data);
at91_add_device_udc(&snapper9260_udc_data);

64
arch/arm/mach-at91/board-stamp9g20.c
View File

@ -36,44 +36,6 @@ void __init stamp9g20_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
static void __init stamp9g20evb_init_early(void)
{
stamp9g20_init_early();
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR
| ATMEL_UART_DCD | ATMEL_UART_RI);
}
static void __init portuxg20_init_early(void)
{
stamp9g20_init_early();
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR
| ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART4 on ttyS5. (Rx, Tx only) */
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
/* USART5 on ttyS6. (Rx, Tx only) */
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
}
/*
@ -254,6 +216,8 @@ void add_w1(void)
void __init stamp9g20_board_init(void)
{
/* Serial */
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* NAND */
add_device_nand();
@ -269,6 +233,22 @@ void __init stamp9g20_board_init(void)
static void __init portuxg20_board_init(void)
{
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR
| ATMEL_UART_DCD | ATMEL_UART_RI);
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
/* USART4 on ttyS5. (Rx, Tx only) */
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
/* USART5 on ttyS6. (Rx, Tx only) */
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
stamp9g20_board_init();
/* USB Host */
at91_add_device_usbh(&usbh_data);
@ -286,6 +266,10 @@ static void __init portuxg20_board_init(void)
static void __init stamp9g20evb_board_init(void)
{
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR
| ATMEL_UART_DCD | ATMEL_UART_RI);
stamp9g20_board_init();
/* USB Host */
at91_add_device_usbh(&usbh_data);
@ -303,7 +287,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")
/* Maintainer: taskit GmbH */
.timer = &at91sam926x_timer,
.map_io = at91_map_io,
.init_early = portuxg20_init_early,
.init_early = stamp9g20_init_early,
.init_irq = at91_init_irq_default,
.init_machine = portuxg20_board_init,
MACHINE_END
@ -312,7 +296,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")
/* Maintainer: taskit GmbH */
.timer = &at91sam926x_timer,
.map_io = at91_map_io,
.init_early = stamp9g20evb_init_early,
.init_early = stamp9g20_init_early,
.init_irq = at91_init_irq_default,
.init_machine = stamp9g20evb_board_init,
MACHINE_END

12
arch/arm/mach-at91/board-usb-a926x.c
View File

@ -53,12 +53,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 12.00 MHz crystal */
at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -177,6 +171,10 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.name = "bareboxenv2",
.offset = MTDPART_OFS_NXTBLK,
.size = SZ_128K,
}, {
.name = "oftree",
.offset = MTDPART_OFS_NXTBLK,
.size = SZ_128K,
}, {
.name = "kernel",
.offset = MTDPART_OFS_NXTBLK,
@ -325,6 +323,8 @@ static void __init ek_add_device_leds(void)
static void __init ek_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);

36
arch/arm/mach-at91/board-yl-9200.c
View File

@ -58,26 +58,6 @@ static void __init yl9200_init_early(void)
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART0 on ttyS2. (Rx & Tx only to JP3) */
at91_register_uart(AT91RM9200_ID_US0, 2, 0);
/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}
/*
@ -560,7 +540,23 @@ void __init yl9200_add_device_video(void) {}
static void __init yl9200_board_init(void)
{
/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
/* USART0 on ttyS2. (Rx & Tx only to JP3) */
at91_register_uart(AT91RM9200_ID_US0, 2, 0);
/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&yl9200_eth_data);

8
arch/arm/mach-at91/cpuidle.c
View File

@ -21,6 +21,7 @@
#include <linux/export.h>
#include <asm/proc-fns.h>
#include <asm/cpuidle.h>
#include <mach/cpu.h>
#include "pm.h"
@ -33,7 +34,12 @@ static int at91_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
at91_standby();
if (cpu_is_at91rm9200())
at91rm9200_standby();
else if (cpu_is_at91sam9g45())
at91sam9g45_standby();
else
at91sam9_standby();
return index;
}

11
arch/arm/mach-at91/generic.h
View File

@ -40,17 +40,6 @@ extern struct sys_timer at91sam926x_timer;
extern struct sys_timer at91x40_timer;
/* Clocks */
/*
* function to specify the clock of the default console. As we do not
* use the device/driver bus, the dev_name is not intialize. So we need
* to link the clock to a specific con_id only "usart"
*/
extern void __init at91rm9200_set_console_clock(int id);
extern void __init at91sam9260_set_console_clock(int id);
extern void __init at91sam9261_set_console_clock(int id);
extern void __init at91sam9263_set_console_clock(int id);
extern void __init at91sam9rl_set_console_clock(int id);
extern void __init at91sam9g45_set_console_clock(int id);
#ifdef CONFIG_AT91_PMC_UNIT
extern int __init at91_clock_init(unsigned long main_clock);
extern int __init at91_dt_clock_init(void);

5
arch/arm/mach-at91/include/mach/at91rm9200.h
View File

@ -88,11 +88,6 @@
#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */
#define AT91_USART0 AT91RM9200_BASE_US0
#define AT91_USART1 AT91RM9200_BASE_US1
#define AT91_USART2 AT91RM9200_BASE_US2
#define AT91_USART3 AT91RM9200_BASE_US3
/*
* Internal Memory.
*/

7
arch/arm/mach-at91/include/mach/at91sam9260.h
View File

@ -95,13 +95,6 @@
#define AT91SAM9260_BASE_WDT 0xfffffd40
#define AT91SAM9260_BASE_GPBR 0xfffffd50
#define AT91_USART0 AT91SAM9260_BASE_US0
#define AT91_USART1 AT91SAM9260_BASE_US1
#define AT91_USART2 AT91SAM9260_BASE_US2
#define AT91_USART3 AT91SAM9260_BASE_US3
#define AT91_USART4 AT91SAM9260_BASE_US4
#define AT91_USART5 AT91SAM9260_BASE_US5
/*
* Internal Memory.

4
arch/arm/mach-at91/include/mach/at91sam9261.h
View File

@ -79,10 +79,6 @@
#define AT91SAM9261_BASE_WDT 0xfffffd40
#define AT91SAM9261_BASE_GPBR 0xfffffd50
#define AT91_USART0 AT91SAM9261_BASE_US0
#define AT91_USART1 AT91SAM9261_BASE_US1
#define AT91_USART2 AT91SAM9261_BASE_US2
/*
* Internal Memory.

4
arch/arm/mach-at91/include/mach/at91sam9263.h
View File

@ -95,10 +95,6 @@
#define AT91SAM9263_BASE_RTT1 0xfffffd50
#define AT91SAM9263_BASE_GPBR 0xfffffd60
#define AT91_USART0 AT91SAM9263_BASE_US0
#define AT91_USART1 AT91SAM9263_BASE_US1
#define AT91_USART2 AT91SAM9263_BASE_US2
#define AT91_SMC AT91_SMC0
/*

5
arch/arm/mach-at91/include/mach/at91sam9g45.h
View File

@ -106,11 +106,6 @@
#define AT91SAM9G45_BASE_RTC 0xfffffdb0
#define AT91SAM9G45_BASE_GPBR 0xfffffd60
#define AT91_USART0 AT91SAM9G45_BASE_US0
#define AT91_USART1 AT91SAM9G45_BASE_US1
#define AT91_USART2 AT91SAM9G45_BASE_US2
#define AT91_USART3 AT91SAM9G45_BASE_US3
/*
* Internal Memory.
*/

5
arch/arm/mach-at91/include/mach/at91sam9rl.h
View File

@ -89,11 +89,6 @@
#define AT91SAM9RL_BASE_GPBR 0xfffffd60
#define AT91SAM9RL_BASE_RTC 0xfffffe00
#define AT91_USART0 AT91SAM9RL_BASE_US0
#define AT91_USART1 AT91SAM9RL_BASE_US1
#define AT91_USART2 AT91SAM9RL_BASE_US2
#define AT91_USART3 AT91SAM9RL_BASE_US3
/*
* Internal Memory.

8
arch/arm/mach-at91/include/mach/at91sam9x5.h
View File

@ -54,14 +54,6 @@
#define AT91SAM9X5_BASE_USART1 0xf8020000
#define AT91SAM9X5_BASE_USART2 0xf8024000
/*
* Base addresses for early serial code (uncompress.h)
*/
#define AT91_DBGU AT91_BASE_DBGU0
#define AT91_USART0 AT91SAM9X5_BASE_USART0
#define AT91_USART1 AT91SAM9X5_BASE_USART1
#define AT91_USART2 AT91SAM9X5_BASE_USART2
/*
* Internal Memory.
*/

1
arch/arm/mach-at91/include/mach/board.h
View File

@ -121,7 +121,6 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de
#define ATMEL_UART_RI 0x20
extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
extern void __init at91_set_serial_console(unsigned portnr);
extern struct platform_device *atmel_default_console_device;

28
arch/arm/mach-at91/include/mach/cpu.h
View File

@ -54,6 +54,7 @@
#define ARCH_REVISON_9200_BGA (0 << 0)
#define ARCH_REVISON_9200_PQFP (1 << 0)
#ifndef __ASSEMBLY__
enum at91_soc_type {
/* 920T */
AT91_SOC_RM9200,
@ -106,7 +107,7 @@ static inline int at91_soc_is_detected(void)
return at91_soc_initdata.type != AT91_SOC_NONE;
}
#ifdef CONFIG_ARCH_AT91RM9200
#ifdef CONFIG_SOC_AT91RM9200
#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
@ -116,45 +117,37 @@ static inline int at91_soc_is_detected(void)
#define cpu_is_at91rm9200_pqfp() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9260
#ifdef CONFIG_SOC_AT91SAM9260
#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
#else
#define cpu_is_at91sam9xe() (0)
#define cpu_is_at91sam9260() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9G20
#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
#else
#define cpu_is_at91sam9g20() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9261
#ifdef CONFIG_SOC_AT91SAM9261
#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
#else
#define cpu_is_at91sam9261() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9G10
#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
#else
#define cpu_is_at91sam9261() (0)
#define cpu_is_at91sam9g10() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9263
#ifdef CONFIG_SOC_AT91SAM9263
#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
#else
#define cpu_is_at91sam9263() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9RL
#ifdef CONFIG_SOC_AT91SAM9RL
#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
#else
#define cpu_is_at91sam9rl() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9G45
#ifdef CONFIG_SOC_AT91SAM9G45
#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
@ -168,7 +161,7 @@ static inline int at91_soc_is_detected(void)
#define cpu_is_at91sam9m11() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9X5
#ifdef CONFIG_SOC_AT91SAM9X5
#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
@ -189,5 +182,6 @@ static inline int at91_soc_is_detected(void)
* definitions may reduce clutter in common drivers.
*/
#define cpu_is_at32ap7000() (0)
#endif /* __ASSEMBLY__ */
#endif /* __MACH_CPU_H__ */

26
arch/arm/mach-at91/include/mach/hardware.h
View File

@ -22,27 +22,17 @@
/* 9263, 9g45 */
#define AT91_BASE_DBGU1 0xffffee00
#if defined(CONFIG_ARCH_AT91RM9200)
#include <mach/at91rm9200.h>
#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
#include <mach/at91sam9260.h>
#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)
#include <mach/at91sam9261.h>
#elif defined(CONFIG_ARCH_AT91SAM9263)
#include <mach/at91sam9263.h>
#elif defined(CONFIG_ARCH_AT91SAM9RL)
#include <mach/at91sam9rl.h>
#elif defined(CONFIG_ARCH_AT91SAM9G45)
#include <mach/at91sam9g45.h>
#elif defined(CONFIG_ARCH_AT91SAM9X5)
#include <mach/at91sam9x5.h>
#elif defined(CONFIG_ARCH_AT91X40)
#if defined(CONFIG_ARCH_AT91X40)
#include <mach/at91x40.h>
#else
#error "Unsupported AT91 processor"
#endif
#include <mach/at91rm9200.h>
#include <mach/at91sam9260.h>
#include <mach/at91sam9261.h>
#include <mach/at91sam9263.h>
#include <mach/at91sam9rl.h>
#include <mach/at91sam9g45.h>
#include <mach/at91sam9x5.h>
#if !defined(CONFIG_ARCH_AT91X40)
/*
* On all at91 except rm9200 and x40 have the System Controller starts
* at address 0xffffc000 and has a size of 16KiB.

178
arch/arm/mach-at91/include/mach/uncompress.h
View File

@ -1,7 +1,8 @@
/*
* arch/arm/mach-at91/include/mach/uncompress.h
*
* Copyright (C) 2003 SAN People
* Copyright (C) 2003 SAN People
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -25,22 +26,147 @@
#include <linux/atmel_serial.h>
#include <mach/hardware.h>
#if defined(CONFIG_AT91_EARLY_DBGU0)
#define UART_OFFSET AT91_BASE_DBGU0
#elif defined(CONFIG_AT91_EARLY_DBGU1)
#define UART_OFFSET AT91_BASE_DBGU1
#elif defined(CONFIG_AT91_EARLY_USART0)
#define UART_OFFSET AT91_USART0
#elif defined(CONFIG_AT91_EARLY_USART1)
#define UART_OFFSET AT91_USART1
#elif defined(CONFIG_AT91_EARLY_USART2)
#define UART_OFFSET AT91_USART2
#elif defined(CONFIG_AT91_EARLY_USART3)
#define UART_OFFSET AT91_USART3
#elif defined(CONFIG_AT91_EARLY_USART4)
#define UART_OFFSET AT91_USART4
#elif defined(CONFIG_AT91_EARLY_USART5)
#define UART_OFFSET AT91_USART5
#include <mach/at91_dbgu.h>
#include <mach/cpu.h>
void __iomem *at91_uart;
#if !defined(CONFIG_ARCH_AT91X40)
static const u32 uarts_rm9200[] = {
AT91_BASE_DBGU0,
AT91RM9200_BASE_US0,
AT91RM9200_BASE_US1,
AT91RM9200_BASE_US2,
AT91RM9200_BASE_US3,
0,
};
static const u32 uarts_sam9260[] = {
AT91_BASE_DBGU0,
AT91SAM9260_BASE_US0,
AT91SAM9260_BASE_US1,
AT91SAM9260_BASE_US2,
AT91SAM9260_BASE_US3,
AT91SAM9260_BASE_US4,
AT91SAM9260_BASE_US5,
0,
};
static const u32 uarts_sam9261[] = {
AT91_BASE_DBGU0,
AT91SAM9261_BASE_US0,
AT91SAM9261_BASE_US1,
AT91SAM9261_BASE_US2,
0,
};
static const u32 uarts_sam9263[] = {
AT91_BASE_DBGU1,
AT91SAM9263_BASE_US0,
AT91SAM9263_BASE_US1,
AT91SAM9263_BASE_US2,
0,
};
static const u32 uarts_sam9g45[] = {
AT91_BASE_DBGU1,
AT91SAM9G45_BASE_US0,
AT91SAM9G45_BASE_US1,
AT91SAM9G45_BASE_US2,
AT91SAM9G45_BASE_US3,
0,
};
static const u32 uarts_sam9rl[] = {
AT91_BASE_DBGU0,
AT91SAM9RL_BASE_US0,
AT91SAM9RL_BASE_US1,
AT91SAM9RL_BASE_US2,
AT91SAM9RL_BASE_US3,
0,
};
static const u32 uarts_sam9x5[] = {
AT91_BASE_DBGU0,
AT91SAM9X5_BASE_USART0,
AT91SAM9X5_BASE_USART1,
AT91SAM9X5_BASE_USART2,
0,
};
static inline const u32* decomp_soc_detect(u32 dbgu_base)
{
u32 cidr, socid;
cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
socid = cidr & ~AT91_CIDR_VERSION;
switch (socid) {
case ARCH_ID_AT91RM9200:
return uarts_rm9200;
case ARCH_ID_AT91SAM9G20:
case ARCH_ID_AT91SAM9260:
return uarts_sam9260;
case ARCH_ID_AT91SAM9261:
return uarts_sam9261;
case ARCH_ID_AT91SAM9263:
return uarts_sam9263;
case ARCH_ID_AT91SAM9G45:
return uarts_sam9g45;
case ARCH_ID_AT91SAM9RL64:
return uarts_sam9rl;
case ARCH_ID_AT91SAM9X5:
return uarts_sam9x5;
}
/* at91sam9g10 */
if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
return uarts_sam9261;
}
/* at91sam9xe */
else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
return uarts_sam9260;
}
return NULL;
}
static inline void arch_decomp_setup(void)
{
int i = 0;
const u32* usarts;
usarts = decomp_soc_detect(AT91_BASE_DBGU0);
if (!usarts)
usarts = decomp_soc_detect(AT91_BASE_DBGU1);
if (!usarts) {
at91_uart = NULL;
return;
}
do {
/* physical address */
at91_uart = (void __iomem *)usarts[i];
if (__raw_readl(at91_uart + ATMEL_US_BRGR))
return;
i++;
} while (usarts[i]);
at91_uart = NULL;
}
#else
static inline void arch_decomp_setup(void)
{
at91_uart = NULL;
}
#endif
/*
@ -52,28 +178,24 @@
*/
static void putc(int c)
{
#ifdef UART_OFFSET
void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
if (!at91_uart)
return;
while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
barrier();
__raw_writel(c, sys + ATMEL_US_THR);
#endif
__raw_writel(c, at91_uart + ATMEL_US_THR);
}
static inline void flush(void)
{
#ifdef UART_OFFSET
void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
if (!at91_uart)
return;
/* wait for transmission to complete */
while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
barrier();
#endif
}
#define arch_decomp_setup()
#define arch_decomp_wdog()
#endif

12
arch/arm/mach-at91/pm.c
View File

@ -261,7 +261,12 @@ static int at91_pm_enter(suspend_state_t state)
* For ARM 926 based chips, this requirement is weaker
* as at91sam9 can access a RAM in self-refresh mode.
*/
at91_standby();
if (cpu_is_at91rm9200())
at91rm9200_standby();
else if (cpu_is_at91sam9g45())
at91sam9g45_standby();
else
at91sam9_standby();
break;
case PM_SUSPEND_ON:
@ -307,10 +312,9 @@ static int __init at91_pm_init(void)
pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
#ifdef CONFIG_ARCH_AT91RM9200
/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
#endif
if (cpu_is_at91rm9200())
at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
suspend_set_ops(&at91_pm_ops);

15
arch/arm/mach-at91/pm.h
View File

@ -12,7 +12,6 @@
#define __ARCH_ARM_MACH_AT91_PM
#include <mach/at91_ramc.h>
#ifdef CONFIG_ARCH_AT91RM9200
#include <mach/at91rm9200_sdramc.h>
/*
@ -43,10 +42,6 @@ static inline void at91rm9200_standby(void)
"r" (lpr));
}
#define at91_standby at91rm9200_standby
#elif defined(CONFIG_ARCH_AT91SAM9G45)
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
* remember.
*/
@ -75,11 +70,7 @@ static inline void at91sam9g45_standby(void)
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
}
#define at91_standby at91sam9g45_standby
#else
#ifdef CONFIG_ARCH_AT91SAM9263
#ifdef CONFIG_SOC_AT91SAM9263
/*
* FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
* handle those cases both here and in the Suspend-To-RAM support.
@ -102,8 +93,4 @@ static inline void at91sam9_standby(void)
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
}
#define at91_standby at91sam9_standby
#endif
#endif

2
arch/arm/mach-at91/pm_slowclock.S
View File

@ -18,7 +18,7 @@
#include <mach/at91_ramc.h>
#ifdef CONFIG_ARCH_AT91SAM9263
#ifdef CONFIG_SOC_AT91SAM9263
/*
* FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
* handle those cases both here and in the Suspend-To-RAM support.

14
arch/arm/mach-at91/soc.h
View File

@ -26,30 +26,30 @@ static inline int at91_soc_is_enabled(void)
return at91_boot_soc.init != NULL;
}
#if !defined(CONFIG_ARCH_AT91RM9200)
#if !defined(CONFIG_SOC_AT91RM9200)
#define at91rm9200_soc at91_boot_soc
#endif
#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20))
#if !defined(CONFIG_SOC_AT91SAM9260)
#define at91sam9260_soc at91_boot_soc
#endif
#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10))
#if !defined(CONFIG_SOC_AT91SAM9261)
#define at91sam9261_soc at91_boot_soc
#endif
#if !defined(CONFIG_ARCH_AT91SAM9263)
#if !defined(CONFIG_SOC_AT91SAM9263)
#define at91sam9263_soc at91_boot_soc
#endif
#if !defined(CONFIG_ARCH_AT91SAM9G45)
#if !defined(CONFIG_SOC_AT91SAM9G45)
#define at91sam9g45_soc at91_boot_soc
#endif
#if !defined(CONFIG_ARCH_AT91SAM9RL)
#if !defined(CONFIG_SOC_AT91SAM9RL)
#define at91sam9rl_soc at91_boot_soc
#endif
#if !defined(CONFIG_ARCH_AT91SAM9X5)
#if !defined(CONFIG_SOC_AT91SAM9X5)
#define at91sam9x5_soc at91_boot_soc
#endif

2
drivers/char/hw_random/Kconfig
View File

@ -62,7 +62,7 @@ config HW_RANDOM_AMD
config HW_RANDOM_ATMEL
tristate "Atmel Random Number Generator support"
depends on HW_RANDOM && ARCH_AT91SAM9G45
depends on HW_RANDOM && HAVE_CLK
default HW_RANDOM
---help---
This driver provides kernel-side support for the Random Number

4
drivers/input/touchscreen/Kconfig
View File

@ -489,10 +489,10 @@ config TOUCHSCREEN_TI_TSCADC
config TOUCHSCREEN_ATMEL_TSADCC
tristate "Atmel Touchscreen Interface"
depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
depends on ARCH_AT91
help
Say Y here if you have a 4-wire touchscreen connected to the
ADC Controller on your Atmel SoC (such as the AT91SAM9RL).
ADC Controller on your Atmel SoC.
If unsure, say N.

2
drivers/rtc/Kconfig
View File

@ -838,7 +838,7 @@ config RTC_DRV_AT32AP700X
config RTC_DRV_AT91RM9200
tristate "AT91RM9200 or some AT91SAM9 RTC"
depends on ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
depends on ARCH_AT91
help
Driver for the internal RTC (Realtime Clock) module found on
Atmel AT91RM9200's and some AT91SAM9 chips. On AT91SAM9 chips