leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mips/cavium-octeon: Fix typo *must* in comment

Browse Source 
Fixes: 5b3b16880f ("MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.")
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
This commit is contained in:
Paul Menzel
2019-09-02 11:55:06 +02:00
committed by Paul Burton
parent 6fbde6b492
commit 474435a058
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/mips/cavium-octeon/setup.c
View File

@@ -844,7 +844,7 @@ void __init prom_init(void)
* BIST should always be enabled when doing a soft reset. L2 * BIST should always be enabled when doing a soft reset. L2
* Cache locking for instance is not cleared unless BIST is * Cache locking for instance is not cleared unless BIST is
* enabled. Unfortunately due to a chip errata G-200 for * enabled. Unfortunately due to a chip errata G-200 for
* Cn38XX and CN31XX, BIST msut be disabled on these parts. * Cn38XX and CN31XX, BIST must be disabled on these parts.
*/ */
if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2) || if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2) ||
OCTEON_IS_MODEL(OCTEON_CN31XX)) OCTEON_IS_MODEL(OCTEON_CN31XX))