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drm/amdgpu: correct reference clock value on navi10

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remove the divisor 4

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tao Zhou 2019-05-14 11:37:32 +08:00 committed by Alex Deucher
parent c877dff7d9
commit 462a70d87e
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/amdgpu/nv.c
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@ -122,7 +122,7 @@ static u32 nv_get_config_memsize(struct amdgpu_device *adev)
static u32 nv_get_xclk(struct amdgpu_device *adev)
{
return adev->clock.spll.reference_freq / 4;
return adev->clock.spll.reference_freq;
}