drm/radeon: record what is next valid wptr for each ring v4
Before emitting any indirect buffer, emit the offset of the next valid ring content if any. This allow code that want to resume ring to resume ring right after ib that caused GPU lockup. v2: use scratch registers instead of storing it into memory v3: skip over the surface sync for ni and si as well v4: use SET_CONFIG_REG instead of PACKET0 Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -622,6 +622,7 @@ struct radeon_ring {
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unsigned rptr;
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unsigned rptr_offs;
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unsigned rptr_reg;
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unsigned rptr_save_reg;
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unsigned wptr;
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unsigned wptr_old;
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unsigned wptr_reg;
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