forked from Minki/linux
x86, AMD IOMMU: add comments to core code
This patch adds comments about how the AMD IOMMU core code works for the DMA remapping functionality. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Cc: iommu@lists.linux-foundation.org Cc: bhavna.sarathy@amd.com Cc: robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Joerg Roedel
Ingo Molnar
parent
b65233a9c1
commit
431b2a2015
@ -34,6 +34,9 @@
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static DEFINE_RWLOCK(amd_iommu_devtable_lock);
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/*
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* general struct to manage commands send to an IOMMU
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*/
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struct command {
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u32 data[4];
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};
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@ -41,11 +44,22 @@ struct command {
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static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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struct unity_map_entry *e);
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/* returns !0 if the IOMMU is caching non-present entries in its TLB */
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static int iommu_has_npcache(struct amd_iommu *iommu)
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{
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return iommu->cap & IOMMU_CAP_NPCACHE;
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}
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/****************************************************************************
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*
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* IOMMU command queuing functions
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*
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****************************************************************************/
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/*
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* Writes the command to the IOMMUs command buffer and informs the
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* hardware about the new command. Must be called with iommu->lock held.
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*/
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static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
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{
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u32 tail, head;
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@ -63,6 +77,10 @@ static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
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return 0;
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}
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/*
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* General queuing function for commands. Takes iommu->lock and calls
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* __iommu_queue_command().
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*/
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static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
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{
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unsigned long flags;
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@ -75,6 +93,13 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
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return ret;
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}
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/*
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* This function is called whenever we need to ensure that the IOMMU has
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* completed execution of all commands we sent. It sends a
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* COMPLETION_WAIT command and waits for it to finish. The IOMMU informs
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* us about that by writing a value to a physical address we pass with
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* the command.
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*/
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static int iommu_completion_wait(struct amd_iommu *iommu)
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{
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int ret;
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@ -101,6 +126,9 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
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return 0;
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}
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/*
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* Command send function for invalidating a device table entry
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*/
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static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
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{
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struct command cmd;
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@ -116,6 +144,9 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
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return iommu_queue_command(iommu, &cmd);
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}
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/*
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* Generic command send function for invalidaing TLB entries
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*/
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static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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u64 address, u16 domid, int pde, int s)
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{
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@ -127,9 +158,9 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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cmd.data[1] |= domid;
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cmd.data[2] = LOW_U32(address);
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cmd.data[3] = HIGH_U32(address);
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if (s)
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if (s) /* size bit - we flush more than one 4kb page */
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cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
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if (pde)
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if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
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cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
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iommu->need_sync = 1;
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@ -137,6 +168,11 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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return iommu_queue_command(iommu, &cmd);
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}
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/*
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* TLB invalidation function which is called from the mapping functions.
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* It invalidates a single PTE if the range to flush is within a single
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* page. Otherwise it flushes the whole TLB of the IOMMU.
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*/
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static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid,
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u64 address, size_t size)
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{
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@ -159,6 +195,20 @@ static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid,
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return 0;
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}
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/****************************************************************************
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*
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* The functions below are used the create the page table mappings for
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* unity mapped regions.
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*
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****************************************************************************/
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/*
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* Generic mapping functions. It maps a physical address into a DMA
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* address space. It allocates the page table pages if necessary.
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* In the future it can be extended to a generic mapping function
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* supporting all features of AMD IOMMU page tables like level skipping
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* and full 64 bit address spaces.
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*/
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static int iommu_map(struct protection_domain *dom,
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unsigned long bus_addr,
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unsigned long phys_addr,
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@ -209,6 +259,10 @@ static int iommu_map(struct protection_domain *dom,
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return 0;
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}
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/*
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* This function checks if a specific unity mapping entry is needed for
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* this specific IOMMU.
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*/
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static int iommu_for_unity_map(struct amd_iommu *iommu,
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struct unity_map_entry *entry)
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{
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@ -223,6 +277,12 @@ static int iommu_for_unity_map(struct amd_iommu *iommu,
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return 0;
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}
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/*
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* Init the unity mappings for a specific IOMMU in the system
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*
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* Basically iterates over all unity mapping entries and applies them to
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* the default domain DMA of that IOMMU if necessary.
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*/
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static int iommu_init_unity_mappings(struct amd_iommu *iommu)
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{
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struct unity_map_entry *entry;
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@ -239,6 +299,10 @@ static int iommu_init_unity_mappings(struct amd_iommu *iommu)
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return 0;
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}
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/*
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* This function actually applies the mapping to the page table of the
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* dma_ops domain.
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*/
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static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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struct unity_map_entry *e)
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{
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@ -261,6 +325,9 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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return 0;
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}
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/*
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* Inits the unity mappings required for a specific device
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*/
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static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
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u16 devid)
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{
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@ -278,12 +345,26 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
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return 0;
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}
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/****************************************************************************
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*
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* The next functions belong to the address allocator for the dma_ops
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* interface functions. They work like the allocators in the other IOMMU
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* drivers. Its basically a bitmap which marks the allocated pages in
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* the aperture. Maybe it could be enhanced in the future to a more
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* efficient allocator.
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*
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****************************************************************************/
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static unsigned long dma_mask_to_pages(unsigned long mask)
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{
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return (mask >> PAGE_SHIFT) +
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(PAGE_ALIGN(mask & ~PAGE_MASK) >> PAGE_SHIFT);
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}
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/*
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* The address allocator core function.
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*
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* called with domain->lock held
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*/
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static unsigned long dma_ops_alloc_addresses(struct device *dev,
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struct dma_ops_domain *dom,
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unsigned int pages)
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@ -317,6 +398,11 @@ static unsigned long dma_ops_alloc_addresses(struct device *dev,
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return address;
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}
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/*
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* The address free function.
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*
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* called with domain->lock held
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*/
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static void dma_ops_free_addresses(struct dma_ops_domain *dom,
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unsigned long address,
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unsigned int pages)
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@ -325,6 +411,16 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
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iommu_area_free(dom->bitmap, address, pages);
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}
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/****************************************************************************
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*
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* The next functions belong to the domain allocation. A domain is
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* allocated for every IOMMU as the default domain. If device isolation
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* is enabled, every device get its own domain. The most important thing
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* about domains is the page table mapping the DMA address space they
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* contain.
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*
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****************************************************************************/
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static u16 domain_id_alloc(void)
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{
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unsigned long flags;
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@ -342,6 +438,10 @@ static u16 domain_id_alloc(void)
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return id;
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}
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/*
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* Used to reserve address ranges in the aperture (e.g. for exclusion
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* ranges.
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*/
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static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
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unsigned long start_page,
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unsigned int pages)
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@ -382,6 +482,10 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
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free_page((unsigned long)p1);
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}
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/*
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* Free a domain, only used if something went wrong in the
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* allocation path and we need to free an already allocated page table
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*/
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static void dma_ops_domain_free(struct dma_ops_domain *dom)
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{
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if (!dom)
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@ -396,6 +500,11 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom)
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kfree(dom);
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}
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/*
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* Allocates a new protection domain usable for the dma_ops functions.
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* It also intializes the page table and the address allocator data
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* structures required for the dma_ops interface
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*/
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static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
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unsigned order)
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{
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@ -436,6 +545,7 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
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dma_dom->bitmap[0] = 1;
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dma_dom->next_bit = 0;
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/* Intialize the exclusion range if necessary */
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if (iommu->exclusion_start &&
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iommu->exclusion_start < dma_dom->aperture_size) {
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unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT;
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@ -444,6 +554,11 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
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dma_ops_reserve_addresses(dma_dom, startpage, pages);
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}
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/*
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* At the last step, build the page tables so we don't need to
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* allocate page table pages in the dma_ops mapping/unmapping
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* path.
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*/
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num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512);
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dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *),
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GFP_KERNEL);
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@ -472,6 +587,10 @@ free_dma_dom:
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return NULL;
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}
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/*
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* Find out the protection domain structure for a given PCI device. This
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* will give us the pointer to the page table root for example.
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*/
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static struct protection_domain *domain_for_device(u16 devid)
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{
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struct protection_domain *dom;
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@ -484,6 +603,10 @@ static struct protection_domain *domain_for_device(u16 devid)
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return dom;
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}
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/*
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* If a device is not yet associated with a domain, this function does
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* assigns it visible for the hardware
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*/
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static void set_device_domain(struct amd_iommu *iommu,
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struct protection_domain *domain,
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u16 devid)
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@ -508,6 +631,19 @@ static void set_device_domain(struct amd_iommu *iommu,
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iommu->need_sync = 1;
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}
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/*****************************************************************************
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*
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* The next functions belong to the dma_ops mapping/unmapping code.
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*
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*****************************************************************************/
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/*
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* In the dma_ops path we only have the struct device. This function
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* finds the corresponding IOMMU, the protection domain and the
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* requestor id for a given device.
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* If the device is not yet associated with a domain this is also done
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* in this function.
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*/
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static int get_device_resources(struct device *dev,
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struct amd_iommu **iommu,
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struct protection_domain **domain,
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@ -522,6 +658,7 @@ static int get_device_resources(struct device *dev,
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pcidev = to_pci_dev(dev);
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_bdf = (pcidev->bus->number << 8) | pcidev->devfn;
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/* device not translated by any IOMMU in the system? */
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if (_bdf >= amd_iommu_last_bdf) {
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*iommu = NULL;
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*domain = NULL;
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@ -547,6 +684,10 @@ static int get_device_resources(struct device *dev,
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return 1;
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}
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/*
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* This is the generic map function. It maps one 4kb page at paddr to
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* the given address in the DMA address space for the domain.
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*/
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static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu,
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struct dma_ops_domain *dom,
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unsigned long address,
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@ -578,6 +719,9 @@ static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu,
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return (dma_addr_t)address;
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}
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/*
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* The generic unmapping function for on page in the DMA address space.
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*/
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static void dma_ops_domain_unmap(struct amd_iommu *iommu,
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struct dma_ops_domain *dom,
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unsigned long address)
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@ -597,6 +741,12 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
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*pte = 0ULL;
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}
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/*
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* This function contains common code for mapping of a physically
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* contiguous memory region into DMA address space. It is uses by all
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* mapping functions provided by this IOMMU driver.
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* Must be called with the domain lock held.
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*/
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static dma_addr_t __map_single(struct device *dev,
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struct amd_iommu *iommu,
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struct dma_ops_domain *dma_dom,
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@ -628,6 +778,10 @@ out:
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return address;
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}
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/*
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* Does the reverse of the __map_single function. Must be called with
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* the domain lock held too
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*/
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static void __unmap_single(struct amd_iommu *iommu,
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struct dma_ops_domain *dma_dom,
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dma_addr_t dma_addr,
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@ -652,6 +806,9 @@ static void __unmap_single(struct amd_iommu *iommu,
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dma_ops_free_addresses(dma_dom, dma_addr, pages);
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}
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/*
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* The exported map_single function for dma_ops.
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*/
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static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
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size_t size, int dir)
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{
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@ -664,6 +821,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
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get_device_resources(dev, &iommu, &domain, &devid);
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if (iommu == NULL || domain == NULL)
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/* device not handled by any AMD IOMMU */
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return (dma_addr_t)paddr;
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spin_lock_irqsave(&domain->lock, flags);
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@ -683,6 +841,9 @@ out:
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return addr;
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}
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/*
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* The exported unmap_single function for dma_ops.
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*/
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static void unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size, int dir)
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{
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@ -692,6 +853,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
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u16 devid;
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if (!get_device_resources(dev, &iommu, &domain, &devid))
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/* device not handled by any AMD IOMMU */
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return;
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spin_lock_irqsave(&domain->lock, flags);
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@ -706,6 +868,10 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
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spin_unlock_irqrestore(&domain->lock, flags);
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}
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/*
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* This is a special map_sg function which is used if we should map a
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* device which is not handled by an AMD IOMMU in the system.
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*/
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static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist,
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int nelems, int dir)
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{
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@ -720,6 +886,10 @@ static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist,
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return nelems;
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}
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/*
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* The exported map_sg function for dma_ops (handles scatter-gather
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* lists).
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*/
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static int map_sg(struct device *dev, struct scatterlist *sglist,
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int nelems, int dir)
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{
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@ -775,6 +945,10 @@ unmap:
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goto out;
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}
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/*
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* The exported map_sg function for dma_ops (handles scatter-gather
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* lists).
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*/
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static void unmap_sg(struct device *dev, struct scatterlist *sglist,
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int nelems, int dir)
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{
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@ -804,6 +978,9 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
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spin_unlock_irqrestore(&domain->lock, flags);
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}
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/*
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* The exported alloc_coherent function for dma_ops.
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*/
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static void *alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_addr, gfp_t flag)
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{
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@ -851,6 +1028,11 @@ out:
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return virt_addr;
|
||||
}
|
||||
|
||||
/*
|
||||
* The exported free_coherent function for dma_ops.
|
||||
* FIXME: fix the generic x86 DMA layer so that it actually calls that
|
||||
* function.
|
||||
*/
|
||||
static void free_coherent(struct device *dev, size_t size,
|
||||
void *virt_addr, dma_addr_t dma_addr)
|
||||
{
|
||||
@ -879,6 +1061,8 @@ free_mem:
|
||||
}
|
||||
|
||||
/*
|
||||
* The function for pre-allocating protection domains.
|
||||
*
|
||||
* If the driver core informs the DMA layer if a driver grabs a device
|
||||
* we don't need to preallocate the protection domains anymore.
|
||||
* For now we have to.
|
||||
@ -921,12 +1105,20 @@ static struct dma_mapping_ops amd_iommu_dma_ops = {
|
||||
.unmap_sg = unmap_sg,
|
||||
};
|
||||
|
||||
/*
|
||||
* The function which clues the AMD IOMMU driver into dma_ops.
|
||||
*/
|
||||
int __init amd_iommu_init_dma_ops(void)
|
||||
{
|
||||
struct amd_iommu *iommu;
|
||||
int order = amd_iommu_aperture_order;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* first allocate a default protection domain for every IOMMU we
|
||||
* found in the system. Devices not assigned to any other
|
||||
* protection domain will be assigned to the default one.
|
||||
*/
|
||||
list_for_each_entry(iommu, &amd_iommu_list, list) {
|
||||
iommu->default_dom = dma_ops_domain_alloc(iommu, order);
|
||||
if (iommu->default_dom == NULL)
|
||||
@ -936,6 +1128,10 @@ int __init amd_iommu_init_dma_ops(void)
|
||||
goto free_domains;
|
||||
}
|
||||
|
||||
/*
|
||||
* If device isolation is enabled, pre-allocate the protection
|
||||
* domains for each device.
|
||||
*/
|
||||
if (amd_iommu_isolate)
|
||||
prealloc_protection_domains();
|
||||
|
||||
@ -947,6 +1143,7 @@ int __init amd_iommu_init_dma_ops(void)
|
||||
gart_iommu_aperture = 0;
|
||||
#endif
|
||||
|
||||
/* Make the driver finally visible to the drivers */
|
||||
dma_ops = &amd_iommu_dma_ops;
|
||||
|
||||
return 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user