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spi: pxa2xx: Introduce is_mmp2_ssp() helper

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Introduce is_mmp2_ssp() helper to be consistent with the rest
helper function to distinguish SSP type.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200227162556.3152-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Andy Shevchenko 2020-02-27 18:25:56 +02:00 committed by Mark Brown
parent 6c4a3372f0
commit 41c9884170
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GPG Key ID: 24D68B725D5487D0
1 changed files with 9 additions and 4 deletions
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13
drivers/spi/spi-pxa2xx.c
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@ -185,6 +185,11 @@ static bool is_quark_x1000_ssp(const struct driver_data *drv_data)
return drv_data->ssp_type == QUARK_X1000_SSP; return drv_data->ssp_type == QUARK_X1000_SSP;
} }
static bool is_mmp2_ssp(const struct driver_data *drv_data)
{
return drv_data->ssp_type == MMP2_SSP;
}
static u32 pxa2xx_spi_get_ssrc1_change_mask(const struct driver_data *drv_data) static u32 pxa2xx_spi_get_ssrc1_change_mask(const struct driver_data *drv_data)
{ {
switch (drv_data->ssp_type) { switch (drv_data->ssp_type) {
@ -463,8 +468,8 @@ int pxa2xx_spi_flush(struct driver_data *drv_data)
static void pxa2xx_spi_off(struct driver_data *drv_data) static void pxa2xx_spi_off(struct driver_data *drv_data)
{ {
/* On MMP, disabling SSE seems to corrupt the rx fifo */ /* On MMP, disabling SSE seems to corrupt the Rx FIFO */
if (drv_data->ssp_type == MMP2_SSP) if (is_mmp2_ssp(drv_data))
return; return;
pxa2xx_spi_write(drv_data, SSCR0, pxa2xx_spi_write(drv_data, SSCR0,
@ -1070,7 +1075,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
|| (pxa2xx_spi_read(drv_data, SSCR1) & change_mask) || (pxa2xx_spi_read(drv_data, SSCR1) & change_mask)
!= (cr1 & change_mask)) { != (cr1 & change_mask)) {
/* stop the SSP, and update the other bits */ /* stop the SSP, and update the other bits */
if (drv_data->ssp_type != MMP2_SSP) if (!is_mmp2_ssp(drv_data))
pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE); pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE);
if (!pxa25x_ssp_comp(drv_data)) if (!pxa25x_ssp_comp(drv_data))
pxa2xx_spi_write(drv_data, SSTO, chip->timeout); pxa2xx_spi_write(drv_data, SSTO, chip->timeout);
@ -1084,7 +1089,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
pxa2xx_spi_write(drv_data, SSTO, chip->timeout); pxa2xx_spi_write(drv_data, SSTO, chip->timeout);
} }
if (drv_data->ssp_type == MMP2_SSP) { if (is_mmp2_ssp(drv_data)) {
u8 tx_level = (pxa2xx_spi_read(drv_data, SSSR) u8 tx_level = (pxa2xx_spi_read(drv_data, SSSR)
& SSSR_TFL_MASK) >> 8; & SSSR_TFL_MASK) >> 8;