x86: set strong uncacheable where UC is really desired
Also use _PAGE_PWT for all the mappings which need uncache mapping. Instead of existing PAT2 which is UC- (and can be overwritten by MTRRs), we now use PAT3 which is strong uncacheable. This makes it consistent with pgprot_noncached() Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -119,7 +119,7 @@ EXPORT_SYMBOL(__ioremap);
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void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
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void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
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{
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{
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unsigned long last_addr;
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unsigned long last_addr;
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void __iomem *p = __ioremap(phys_addr, size, _PAGE_PCD);
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void __iomem *p = __ioremap(phys_addr, size, _PAGE_PCD | _PAGE_PWT);
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if (!p)
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if (!p)
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return p;
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return p;
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@ -138,7 +138,7 @@ EXPORT_SYMBOL(__ioremap);
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void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
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void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
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{
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{
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return __ioremap(phys_addr, size, _PAGE_PCD);
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return __ioremap(phys_addr, size, _PAGE_PCD | _PAGE_PWT);
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}
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}
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EXPORT_SYMBOL(ioremap_nocache);
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EXPORT_SYMBOL(ioremap_nocache);
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