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drm/radeon/kms: respect TOM on rs100->rs480 IGP variants.

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Normally we are free to place VRAM where we want in the GPUs
memory address space, however on IGP chips the VRAM is actual RAM,
and no special translation or aperture is used inside the GPU MC.

So when you move the VRAM aperture away from the TOM register,
you actually move it into main memory and can trash things quite badly.

This commit makes the code respect the TOM location for MC_FB_LOCATION.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2009-07-09 15:04:18 +10:00
parent 4162338a1d
commit 3e43d82125
2 changed files with 8 additions and 3 deletions
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5
drivers/gpu/drm/radeon/r100.c
View File

@ -215,7 +215,6 @@ int r100_mc_init(struct radeon_device *rdev)
r100_pci_gart_disable(rdev); r100_pci_gart_disable(rdev);
/* Setup GPU memory space */ /* Setup GPU memory space */
rdev->mc.vram_location = 0xFFFFFFFFUL;
rdev->mc.gtt_location = 0xFFFFFFFFUL; rdev->mc.gtt_location = 0xFFFFFFFFUL;
if (rdev->flags & RADEON_IS_AGP) { if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev); r = radeon_agp_init(rdev);
@ -1265,6 +1264,8 @@ void r100_vram_info(struct radeon_device *rdev)
/* read NB_TOM to get the amount of ram stolen for the GPU */ /* read NB_TOM to get the amount of ram stolen for the GPU */
tom = RREG32(RADEON_NB_TOM); tom = RREG32(RADEON_NB_TOM);
rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
/* for IGPs we need to keep VRAM where it was put by the BIOS */
rdev->mc.vram_location = (tom & 0xffff) << 16;
WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
} else { } else {
rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
@ -1275,6 +1276,8 @@ void r100_vram_info(struct radeon_device *rdev)
rdev->mc.vram_size = 8192 * 1024; rdev->mc.vram_size = 8192 * 1024;
WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
} }
/* let driver place VRAM */
rdev->mc.vram_location = 0xFFFFFFFFUL;
} }
rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);

6
drivers/gpu/drm/radeon/rs400.c
View File

@ -235,7 +235,6 @@ int rs400_mc_init(struct radeon_device *rdev)
rdev->mc.gtt_location = rdev->mc.vram_size; rdev->mc.gtt_location = rdev->mc.vram_size;
rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
rdev->mc.vram_location = 0xFFFFFFFFUL;
r = radeon_mc_setup(rdev); r = radeon_mc_setup(rdev);
if (r) { if (r) {
return r; return r;
@ -305,7 +304,10 @@ void rs400_vram_info(struct radeon_device *rdev)
rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
/* Could aper size report 0 ? */ /* RS480 IGPs don't seem to translate to main RAM, they
* just reserve and scan out of it. So setting VRAM location
* to say 0, will actually trash the OS. */
rdev->mc.vram_location = (tom & 0xffff) << 16;
rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
} }