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drm/amdgpu: add mode1 (psp) reset for navi asic

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add mode1 (by psp) reset for navi asic.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang 2019-07-05 12:51:45 +08:00 committed by Alex Deucher
parent f1c1314be4
commit 3e2bb60ab2
1 changed files with 36 additions and 2 deletions
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38
drivers/gpu/drm/amd/amdgpu/nv.c
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@ -256,6 +256,39 @@ static void nv_gpu_pci_config_reset(struct amdgpu_device *adev)
}
#endif
static int nv_asic_mode1_reset(struct amdgpu_device *adev)
{
u32 i;
int ret = 0;
amdgpu_atombios_scratch_regs_engine_hung(adev, true);
dev_info(adev->dev, "GPU mode1 reset\n");
/* disable BM */
pci_clear_master(adev->pdev);
pci_save_state(adev->pdev);
ret = psp_gpu_reset(adev);
if (ret)
dev_err(adev->dev, "GPU mode1 reset failed\n");
pci_restore_state(adev->pdev);
/* wait for asic to come out of reset */
for (i = 0; i < adev->usec_timeout; i++) {
u32 memsize = adev->nbio_funcs->get_memsize(adev);
if (memsize != 0xffffffff)
break;
udelay(1);
}
amdgpu_atombios_scratch_regs_engine_hung(adev, false);
return ret;
}
static int nv_asic_reset(struct amdgpu_device *adev)
{
@ -270,9 +303,10 @@ static int nv_asic_reset(struct amdgpu_device *adev)
int ret = 0;
struct smu_context *smu = &adev->smu;
if (smu_baco_is_support(smu)) {
if (smu_baco_is_support(smu))
ret = smu_baco_reset(smu);
}
else
ret = nv_asic_mode1_reset(adev);
return ret;
}