leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge branch 'fix-some-bugs-in-stmmac'

Browse Source 
Biao Huang says:

====================
fix some bugs in stmmac

changes in v4:
        since MTL_OPERATION_MODE write back issue has be fixed in the latest driver,
remove original patch#3

changes in v3:
        add a Fixes:tag for each patch

changes in v2:
        1. update rx_tail_addr as Jose's comment
        2. changes clk_csr condition as Alex's proposition
        3. remove init lines in dwmac-mediatek, get clk_csr from dts instead.

v1:
This series fix some bugs in stmmac driver
3 patches are for common stmmac or dwmac4:
        1. update rx tail pointer to fix rx dma hang issue.
        2. change condition for mdc clock to fix csr_clk can't be zero issue.
        3. write the modified value back to MTL_OPERATION_MODE.
1 patch is for dwmac-mediatek:
        modify csr_clk value to fix mdio read/write fail issue for dwmac-mediatek
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2019-05-25 11:02:31 -07:00
commit 3d92410a22
3 changed files with 8 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
View File

@ -346,8 +346,6 @@ static int mediatek_dwmac_probe(struct platform_device *pdev)
return PTR_ERR(plat_dat);
plat_dat->interface = priv_plat->phy_mode;
/* clk_csr_i = 250-300MHz & MDC = clk_csr_i/124 */
plat_dat->clk_csr = 5;
plat_dat->has_gmac4 = 1;
plat_dat->has_gmac = 0;
plat_dat->pmt = 0;

7
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@ -3338,6 +3338,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
entry = STMMAC_GET_ENTRY(entry, DMA_RX_SIZE);
}
rx_q->dirty_rx = entry;
stmmac_set_rx_tail_ptr(priv, priv->ioaddr, rx_q->rx_tail_addr, queue);
}
/**
@ -4379,10 +4380,10 @@ int stmmac_dvr_probe(struct device *device,
* set the MDC clock dynamically according to the csr actual
* clock input.
*/
if (!priv->plat->clk_csr)
stmmac_clk_csr_set(priv);
else
if (priv->plat->clk_csr >= 0)
priv->clk_csr = priv->plat->clk_csr;
else
stmmac_clk_csr_set(priv);
stmmac_check_pcs_mode(priv);

5
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
View File

@ -408,7 +408,10 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
/* Default to phy auto-detection */
plat->phy_addr = -1;
/* Get clk_csr from device tree */
/* Default to get clk_csr from stmmac_clk_crs_set(),
* or get clk_csr from device tree.
*/
plat->clk_csr = -1;
of_property_read_u32(np, "clk_csr", &plat->clk_csr);
/* "snps,phy-addr" is not a standard property. Mark it as deprecated