forked from Minki/linux
[AVR32] SPI platform code update
Move stuff in spi.c into ATSTK1002 board code and update SPI platform device definitions according to the new GPIO API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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7f9f467863
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3d60ee1b04
@ -1,2 +1,2 @@
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obj-y += setup.o spi.o flash.o
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obj-y += setup.o flash.o
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obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
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@ -8,15 +8,18 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/etherdevice.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/spi/spi.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/arch/at32ap7000.h>
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#include <asm/arch/board.h>
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#include <asm/arch/init.h>
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#include <asm/arch/portmux.h>
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@ -33,6 +36,16 @@ static struct eth_addr __initdata hw_addr[2];
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static struct eth_platform_data __initdata eth_data[2];
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extern struct lcdc_platform_data atstk1000_fb0_data;
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static struct spi_board_info spi_board_info[] __initdata = {
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{
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.modalias = "ltv350qv",
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.controller_data = (void *)GPIO_PIN_PA(4),
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.max_speed_hz = 16000000,
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.bus_num = 0,
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.chip_select = 1,
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},
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};
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/*
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* The next two functions should go away as the boot loader is
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* supposed to initialize the macb address registers with a valid
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@ -136,6 +149,7 @@ static int __init atstk1002_init(void)
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
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at32_add_device_spi(0);
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at32_add_device_lcdc(0, &atstk1000_fb0_data);
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@ -1,27 +0,0 @@
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/*
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* ATSTK1000 SPI devices
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*
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* Copyright (C) 2005 Atmel Norway
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/device.h>
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#include <linux/spi/spi.h>
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static struct spi_board_info spi_board_info[] __initdata = {
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{
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.modalias = "ltv350qv",
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.max_speed_hz = 16000000,
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.bus_num = 0,
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.chip_select = 1,
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},
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};
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static int board_init_spi(void)
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{
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spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
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return 0;
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}
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arch_initcall(board_init_spi);
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@ -736,12 +736,19 @@ at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
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/* --------------------------------------------------------------------
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* SPI
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* -------------------------------------------------------------------- */
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static struct resource spi0_resource[] = {
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static struct resource atmel_spi0_resource[] = {
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PBMEM(0xffe00000),
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IRQ(3),
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};
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DEFINE_DEV(spi, 0);
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DEV_CLK(mck, spi0, pba, 0);
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DEFINE_DEV(atmel_spi, 0);
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DEV_CLK(spi_clk, atmel_spi0, pba, 0);
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static struct resource atmel_spi1_resource[] = {
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PBMEM(0xffe00400),
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IRQ(4),
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};
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DEFINE_DEV(atmel_spi, 1);
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DEV_CLK(spi_clk, atmel_spi1, pba, 1);
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struct platform_device *__init at32_add_device_spi(unsigned int id)
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{
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@ -749,13 +756,33 @@ struct platform_device *__init at32_add_device_spi(unsigned int id)
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switch (id) {
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case 0:
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pdev = &spi0_device;
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pdev = &atmel_spi0_device;
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select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
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select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
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select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
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select_peripheral(PA(3), PERIPH_A, 0); /* NPCS0 */
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select_peripheral(PA(4), PERIPH_A, 0); /* NPCS1 */
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select_peripheral(PA(5), PERIPH_A, 0); /* NPCS2 */
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/* NPCS[2:0] */
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at32_select_gpio(GPIO_PIN_PA(3),
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AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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at32_select_gpio(GPIO_PIN_PA(4),
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AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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at32_select_gpio(GPIO_PIN_PA(5),
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AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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break;
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case 1:
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pdev = &atmel_spi1_device;
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select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
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select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
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select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
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/* NPCS[2:0] */
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at32_select_gpio(GPIO_PIN_PB(2),
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AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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at32_select_gpio(GPIO_PIN_PB(3),
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AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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at32_select_gpio(GPIO_PIN_PB(4),
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AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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break;
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default:
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@ -877,7 +904,8 @@ struct clk *at32_clock_list[] = {
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&macb0_pclk,
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&macb1_hclk,
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&macb1_pclk,
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&spi0_mck,
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&atmel_spi0_spi_clk,
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&atmel_spi1_spi_clk,
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&lcdc0_hclk,
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&lcdc0_pixclk,
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};
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