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ARM: OMAP5: Enable arch timer support

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Enable Cortex A15 generic timer support for OMAP5 based SOCs.
The CPU local timers run on the free running real time counter clock.

Acked-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
Santosh Shilimkar 2012-08-13 14:39:03 +05:30
parent fa6d79d276
commit 3c7c5dab44
3 changed files with 20 additions and 0 deletions
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12
arch/arm/boot/dts/omap5.dtsi
View File

@ -33,9 +33,21 @@
cpus { cpus {
cpu@0 { cpu@0 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
timer {
compatible = "arm,armv7-timer";
/* 14th PPI IRQ, active low level-sensitive */
interrupts = <1 14 0x308>;
clock-frequency = <6144000>;
};
}; };
cpu@1 { cpu@1 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
timer {
compatible = "arm,armv7-timer";
/* 14th PPI IRQ, active low level-sensitive */
interrupts = <1 14 0x308>;
clock-frequency = <6144000>;
};
}; };
}; };

1
arch/arm/mach-omap2/Kconfig
View File

@ -74,6 +74,7 @@ config SOC_OMAP5
select HAVE_SMP select HAVE_SMP
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND if PM
select SOC_HAS_REALTIME_COUNTER select SOC_HAS_REALTIME_COUNTER
select ARM_ARCH_TIMER
comment "OMAP Core Type" comment "OMAP Core Type"
depends on ARCH_OMAP2 depends on ARCH_OMAP2

7
arch/arm/mach-omap2/timer.c
View File

@ -41,6 +41,7 @@
#include <plat/dmtimer.h> #include <plat/dmtimer.h>
#include <asm/smp_twd.h> #include <asm/smp_twd.h>
#include <asm/sched_clock.h> #include <asm/sched_clock.h>
#include <asm/arch_timer.h>
#include "common.h" #include "common.h"
#include <plat/omap_hwmod.h> #include <plat/omap_hwmod.h>
#include <plat/omap_device.h> #include <plat/omap_device.h>
@ -488,9 +489,15 @@ OMAP_SYS_TIMER(4)
#ifdef CONFIG_SOC_OMAP5 #ifdef CONFIG_SOC_OMAP5
static void __init omap5_timer_init(void) static void __init omap5_timer_init(void)
{ {
int err;
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
omap2_clocksource_init(2, OMAP4_MPU_SOURCE); omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
realtime_counter_init(); realtime_counter_init();
err = arch_timer_of_register();
if (err)
pr_err("%s: arch_timer_register failed %d\n", __func__, err);
} }
OMAP_SYS_TIMER(5) OMAP_SYS_TIMER(5)
#endif #endif