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pinctrl: single: Use a separate lockdep class

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The single pinmux controller can be cascaded to the other interrupt
controllers. Hence when propagating wake-up settings to its parent
interrupt controller, there's possiblity of detecting possible recursive
locking and getting lockdep warning.

This patch avoids this false positive by using a separate lockdep class
for this single pinctrl interrupts.

Cc: linux-gpio@vger.kernel.org
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Sudeep Holla 2016-02-01 18:28:17 +00:00 committed by Linus Walleij
parent 96851d391d
commit 3c177a1662
1 changed files with 8 additions and 0 deletions
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8
drivers/pinctrl/pinctrl-single.c
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@ -254,6 +254,13 @@ static enum pin_config_param pcs_bias[] = {
PIN_CONFIG_BIAS_PULL_UP, PIN_CONFIG_BIAS_PULL_UP,
}; };
/*
* This lock class tells lockdep that irqchip core that this single
* pinctrl can be in a different category than its parents, so it won't
* report false recursion.
*/
static struct lock_class_key pcs_lock_class;
/* /*
* REVISIT: Reads and writes could eventually use regmap or something * REVISIT: Reads and writes could eventually use regmap or something
* generic. But at least on omaps, some mux registers are performance * generic. But at least on omaps, some mux registers are performance
@ -1713,6 +1720,7 @@ static int pcs_irqdomain_map(struct irq_domain *d, unsigned int irq,
irq_set_chip_data(irq, pcs_soc); irq_set_chip_data(irq, pcs_soc);
irq_set_chip_and_handler(irq, &pcs->chip, irq_set_chip_and_handler(irq, &pcs->chip,
handle_level_irq); handle_level_irq);
irq_set_lockdep_class(irq, &pcs_lock_class);
irq_set_noprobe(irq); irq_set_noprobe(irq);
return 0; return 0;